Class 326/86 - Bus driving

Subclass of Class 326 - Electronic digital logic circuitry
Definition: Subject matter including a common path for connecting a
No. of patents: 1757
Last issue date: 05/29/2012

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Number	Title	Issue Date
4488066	Databus coupling arrangement using transistors of complementary conductivity type To improve the speed of transfer of information to the databus in data processing apparatus, the bus is periodically precharged and the coupling to the databus is by way of a special clocked CMOS buffer circuit....	12/11/1984
4479067	Output buffer circuit An output buffer circuit for use in a bidirectional input/output circuit comprising an inverter circuit including a pull-up load and a driver transistor, and a charging circuit for charging an external input/output line for a predetermined time-period whe...	10/23/1984
4475049	Redundant serial communication circuit A circuit for carrying data between a host system and a remote unit includes first and second edge-triggered delay-type flip-flops coupled to first and second input lines, respectively. Combinational logic coupled to the output of the first flip-flop and ...	10/02/1984
4471243	Bidirectional interface A bidirectional interface circuit whose signal terminals can function as either input or output terminals whereby the interface circuit can couple signals from a microprocessor to a load module or from a source module to the microprocessor....	09/11/1984
4467455	Buffer circuit An input buffer circuit for a memory uses two transistors interposed between a push-pull pair of transistors to control the enabling of the buffer in response to a chip write signal generated from a logical combination of chip select and write enable sign...	08/21/1984
4450370	Active termination for a transmission line A tri-state buffer having the output thereof electrically connected to the input thereof is utilized to provide an active termination for a transmission line carrying data, addresses, commands or other information. The tri-state buffer is enabled by a str...	05/22/1984
4449207	Byte-wide dynamic RAM with multiplexed internal buses An MOS dynamic RAM organized in a byte-wide arrangement is described. An internal bus is used for multiplexed column address signals and data. Other multiplexing reduced the lines associated with the input/output circuits. A unique power-on circuit automa...	05/15/1984
4441039	Input buffer circuit for semiconductor memory An address input buffer for a cross-coupled latch of the type including two switching transistors with output nodes "a" and "b". The address input buffer circuit structure includes a first depletion device having its source electrode connected to latch no...	04/03/1984
4438352	TTL Compatible CMOS input buffer A circuit for converting a digital signal from TTL to CMOS levels. The circuit delay is reduced by providing a transmission gate between the P and N type transistors in the first stage. This transmission gate has a high impedance during transistions and a...	03/20/1984
4437024	Actively controlled input buffer An interface circuit for producing output signals of first and second levels in response to input signals intermediate said first and second levels. The circuit includes a controllable impedance means, normally set to a high impedance condition, connected...	03/13/1984
4417162	Tri-state logic buffer circuit A first MOS (metal-oxide-semiconductor) NOR-gate device feeding a second MOS NOR-gate device feeding an MOS output load device is arranged to yield a three output level buffer circuit, that is, whose output to a common data bus line can be "high" ("1"), "...	11/22/1983
4414480	CMOS Circuit using transmission line interconnections A CMOS output circuit for an integrated circuit chip used in high speed computers is designed so that it can drive transmission line interconnects to thereby increase the speed of the transfer of signals between chips. The CMOS circuit can drive either a ...	11/08/1983
4406957	Input buffer circuit A first insulated-gate field-effect transistor (IGFET) having its conduction path connected between a first power terminal and an output terminal and a second IGFET of complementary conductivity to said first IGFET connected between the output terminal an...	09/27/1983
4387308	Semiconductor circuit An improved dynamic-type digital circuit provided with a level refresh means for refreshing a logic signal retained at a high impedance is disclosed. The circuit comprises a signal node, a control node, a voltage source, switching means coupled between th...	06/07/1983
4380709	Switched-supply three-state circuit An MOS switched-supply three-state buffer circuit includes first and second inverter means. When an enabling signal is in the predetermined state, a source voltage is applied to the first and second inverter means to permit the generation of true and comp...	04/19/1983
4345171	Adaptable nonlinear transmission line terminator A nonlinear transmission line terminator terminates a transmission line having an input from any one of a plurality of logic types. Emitter coupled logic (ECL), transistor logic (TTL), Schottky transistor logic (STTL), low power Schottky transistor transi...	08/17/1982
4339673	Driver circuits for automatic digital testing apparatus A driver circuit for use in testing either ECL (emitter-coupled logic) or TTL (transistor-transistor logic) devices. The circuit has a pair of variable reference voltages (VH,VL) for determining the logic levels 0 and 1. The circuit ...	07/13/1982
4313064	Integrated circuit detecting the characteristic of an external system The integrated circuit comprises an output circuit feeding an external system connected to an output terminal of the integrated circuit and a detection circuit of the characteristic of the external system. The detection circuit includes a comparator for c...	01/26/1982
4306163	Programmable single chip MOS computer A buffer utilizing MOS devices for coupling a computer input data line and a computer output data line to a single input/output port is disclosed. The buffer receives a control signal generated by computer port control means at the beginning of any buffer...	12/15/1981
4305106	System for short circuit protection using electronic logic in a feedback arrangement Electronic logic circuitry operates to detect and correct a short circuit condition, be it a short to system ground or supply voltage, in a circuit output. In one application, the short protection circuitry is incorporated into a high power CMOS driver. I...	12/08/1981
4280070	Balanced input buffer circuit for semiconductor memory A random access read/write MOS memory device employs bistable latch or buffer circuits as the address inputs, data inputs, and the like. The buffers function to latch the data or address to allow the inputs to change states. The buffer is activated by TTL...	07/21/1981
4195238	Address buffer circuit in semiconductor memory In an address buffer circuit in a semiconductor memory including a flip-flop formed of MISFETs and an output circuit consisting of two drivers each formed of MISFETs, and producing a binary address signal, the flip-flop is supplied with a constant operati...	03/25/1980
4183095	High density memory device A high density memory system is formed by reducing the number of electrical conductors that are needed to connect individual memory devices into an operable memory system. The reduction is accomplished by serially reading and writing data from and into se...	01/08/1980
4178620	Three state bus driver with protection circuitry A protective circuit arrangement for three state bus drivers, incorporating insulated gate field effect transistors, affords protection against short circuiting of the output bus. The protective circuit senses the short circuit condition at the output bus...	12/11/1979
4159540	Memory array address buffer with level shifting An improved electrically alterable non-volatile memory for storing information is described incorporating an array of memory cells composed of variable threshold field effect transistors, means for writing and reading information into and out of the array...	06/26/1979
4158891	Transparent tri state latch Tri state logic gates in series are disclosed for permitting the latching of information from a first circuit by enabling a second circuit at the time information from the first circuit becomes valid. At the start of the memory cycle the second circuit is...	06/19/1979
4148015	Electronic timepiece with an electrochromic display A driver circuit for an electrochromic display device for an electronic timepiece. In a first preferred embodiment, drive signals are applied through a plurality of source follower first and second metal oxide semiconductor field effect transistors to seg...	04/03/1979
4063113	Logic transfer circuit employing MOS transistors This relates to an MOS logic synchronizing circuit operating with a single phase clock waveform. A logic inverter has two parallel-connected switching MOST's, the gate of one (M4) being connected to clock and the gate of the other (M2) being coupled to th...	12/13/1977
4051358	Apparatus and method for composing digital information on a data bus Logical and arithmetic shifts, rotations, and compositions of digital words can be performed directly on the data bus by use of registers which are selectively coupled to the data bus through bidirectional devices. The registers may be buffered latches ha...	09/27/1977
4038567	Memory input signal buffer circuit A memory input signal dynamic logic buffer circuit for providing FET level complementary output signals in response to low level input signals. The circuit is compatible with a variety of bipolar transistor driving logic families as the input signal sensi...	07/26/1977
4016431	Optimal driver for LSI An intermediate driver circuit comprising at least five stages which are cascaded between a signal driver, such as a logic circuit on an LSI chip, and a high capacity load driver, such as a driver for long off chip interconnection lines, wherein the total...	04/05/1977
3993954	Electric communication system A data transmission system for transmitting data and subsidiary information by means of pulses of different widths corresponding to a multiple of a signal propagation time delay of a NAND gate. The system makes it possible to simplify the construction of ...	11/23/1976
3983543	Random access memory read/write buffer circuits incorporating complementary field effect transistors Disclosed is a Read/Write Buffer circuit for a random access memory integrated circuit chip based upon complementary enhancement mode field effect transistor technology....	09/28/1976
3938008	Common bus driver complementary protect circuit An over current protect circuit for a common bus driver having a complementary pair FET output includes a pair of AND circuits responsive to the gate-source and drain-source voltages for charging separate time integrating capacitors. If a threshold charge...	02/10/1976
3935476	Combination output/input logic for integrated circuit Method and circuit for both outputting and inputting data by way of a single pin connector for an integrated circuit chip is disclosed. Data from the chip is fed through an output buffer on the chip and a standard pin connector to external circuitry. The ...	01/27/1976

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Class 326/86 - Bus driving