Bizarre Patents
Wearable Device For Feeding and Observing Birds and Other Flying Animals
A device for feeding and observing flying animals comprising a hat, a support mounted on the hat and extending outward from the hat, and a feeder mounted on the support.
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| Number | Title | Issue Date |
| 8098084 | Transmission apparatus for differential communication A transmission apparatus for differential communication includes a driver bridge circuit and a pair of noise protection circuits. The driver bridge circuit includes four output devices that are independently connected between each of a pair of transmission lines and... | 01/17/2012 |
| 8081012 | Semiconductor buffer circuit with variable driving capability according to external voltage A semiconductor buffer circuit that operates stably against PVT fluctuation is disclosed. The disclosed semiconductor buffer unit of the present invention includes: a detecting block configured to generate a plurality of code signals by detecting an external voltage... | 12/20/2011 |
| 8072242 | Merged programmable output driver Embodiments provide input/output devices having programmable logic that is programmable to operate input/output devices in one of two drive modes. In various embodiments, to operate an input/output device in a first drive mode, logic circuitry is programmable to cou... | 12/06/2011 |
| 8063665 | Programmable buffer circuit A buffer circuit includes an input configured to receive an input signal; and a buffer configured to generate an output signal based on the input signal. In an embodiment, the output signal has a linear relationship with the input signal when the input signal is wit... | 11/22/2011 |
| 8058904 | System for transmission line termination by signal cancellation A communication system having first and second states for use with a shared transmission line composed of at least two conductors and composed of first and second transmission line segments connected to each other at a single connection point. In the first state, a ... | 11/15/2011 |
| 8054102 | Interface device and interface system An interface device includes a differential signal transmitter, a differential signal receiver, a first coupling capacitor, a second coupling capacitor, a direct current (DC) signal transmitter, and a DC signal receiver. The differential signal transmitter transmits... | 11/08/2011 |
| 8035417 | Output buffer circuit with variable drive strength An output buffer circuit has a variable output drive strength, depending on a buffer enable signal. Multiple output buffer circuits have a variable combined output drive strength, depending on a set of buffer enable signals. ... | 10/11/2011 |
| 8022730 | Driving circuit with slew-rate enhancement circuit A driving auxiliary circuit receiving an input voltage to control an output voltage of an operational amplifier via a first switch and a second switch is provided. A pull-low circuit turns on the first switch, including a first input terminal coupled to a high volta... | 09/20/2011 |
| 8018252 | Circuit with enhanced mode and normal mode Circuit with enhanced mode and normal mode is provided and described. In one embodiment, switches are set to a first switch position to operate the circuit in the enhanced mode. In another embodiment, switches are set to a second switch position to operate the circu... | 09/13/2011 |
| 8013634 | LVDS data input circuit with multiplexer selecting data out input First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input ... | 09/06/2011 |
| 7973563 | Programmable IO architecture A buffer device coupled to at least one input/output port of an integrated circuit has a plurality of control inputs configured to receive configuration programming information. The at least one input/output circuit is capable of: (a) being configured in a direction... | 07/05/2011 |
| 7969197 | Output buffer circuit and differential output buffer circuit, and transmission method An output buffer includes inverters, a delay circuit for delaying an input signal, buffers and switches. The output buffer transmits a logic signal to a transmission path and, in accordance with an amount of signal attenuation in the transmission path, creates a wav... | 06/28/2011 |
| 7965105 | Input buffer with optimal biasing and method thereof A method and circuit of a biased input buffer is described to maximize the quality in the output signals. The input buffer includes a first stage for receiving differential input signals and generating differential internal signals as biased in response to an averag... | 06/21/2011 |
| 7961007 | Receiver to match delay for single ended and differential signals In one embodiment, a receiver circuit is provide that may receive either a differential input or a single-ended input corresponding to an interface. The receiver circuit may include at least two current sources to control a gain of an amplification stage in the rece... | 06/14/2011 |
| 7956644 | Peak power reduction using fixed bit inversion A semiconductor device includes a first circuit block, a second circuit block, and a data bus. The data bus is coupled between the first and second circuit blocks. A first data inverter on the data bus inverts a selected segment of data that is transferred onto the ... | 06/07/2011 |
| 7956645 | Low power high-speed output driver Low power high-speed output driver. An array of switches (some of which are inverting switches whose connectivity is governed oppositely as the control signal provided to it) is implemented such that an input signal governs the connectivity of those switches. A resi... | 06/07/2011 |
| 7944240 | Buffer of semiconductor memory apparatus A buffer of a semiconductor memory apparatus includes a buffering section configured to generate an output signal by buffering an input signal. A mismatch compensation section generates a control voltage in correspondence with sizes of a second transistor of the sam... | 05/17/2011 |
| 7940086 | Interface circuit that can switch between single-ended transmission and differential transmission An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between ... | 05/10/2011 |
| 7932749 | Hybrid driving apparatus and method thereof A hybrid driving apparatus and a method thereof are provided. The hybrid driving apparatus includes a first driving unit, a second driving unit, and a resistor. The first driving unit has a first output end. The second driving unit has a second output end coupled to... | 04/26/2011 |
| 7906989 | Apparatus for detecting a USB host A multi-interface integrated circuit (IC) comprises a plurality of transistors, and a level detection block. At least one transistor of the plurality of transistors is in communication with a first terminal and either a first or a second lead of the multi-interface ... | 03/15/2011 |
| 7902874 | Combined full speed and high speed driver The separate high speed and full speed drivers used in a Universal Serial Bus 2.0 application can be combined into one driver which functions both as full speed/high speed driver and as a result provides output impedance for the full speed/high speed modes which is ... | 03/08/2011 |
| 7898295 | Hot-pluggable differential signaling driver Apparatus and methods provide low voltage differential signaling (LVDS) driver with replica circuit biasing and protection for hot plugging. The replica biasing is non-intrusive in nature, and can control the voltage swing tightly over parametric variations. The abs... | 03/01/2011 |
| 7893719 | Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications A digital data transmitting device is disclosed having differential signaling circuitry, a current source controller and a pair of transistor-implemented current sources is disclosed. The current source controller generates a current source control signal based on a... | 02/22/2011 |
| 7893720 | Bus low voltage differential signaling (BLVDS) circuit A differential signaling circuit and a control circuit. The differential signaling circuit includes a first positive driver and a first negative driver. The first negative driver has different impedance than the first positive driver. The first positive driver and t... | 02/22/2011 |
| 7888969 | Driver circuit for a two-wire conductor and method for generating two output currents for a two-wire conductor A driver circuit and method for generating two complementary output currents from a two-state logic input signal at two outputs for connecting a two-wire conductor provide the following actions: generating from the input signal, an output signal at each output, the ... | 02/15/2011 |
| 7884648 | Pseudo-differential interfacing device having a switching circuit The invention relates to an interfacing device for pseudo-differential transmission through interconnections used for sending a plurality of electrical signals. The interfacing device of the invention includes signal terminals and a common terminal. A transmitting c... | 02/08/2011 |
| 7863936 | Driving circuit with impedence calibration and pre-emphasis functionalities A driving circuit includes at least a driving unit, a first processing unit and a second processing unit. The driving circuit includes a first bias component, a second bias component, a first pre-emphasis unit, a second pre-emphasis unit, and a transmitter unit. The... | 01/04/2011 |
| 7863935 | Line driver architecture for 10/100/1000 BASE-T Ethernet A multimode line driver circuit is provided having improved performance. The multimode line driver comprises at least first and second driver circuits that, when “active,” respectively transmit data using first and second modes. The multimode line driver further... | 01/04/2011 |
| 7859307 | High speed transient active pull-up IC An I2C-bus compatible device when functioning as a clock master comprises a transient active pull-up I2C (“TAP-I2C”) logic module having high side driver transistors, e.g., P-channel field effect transistors (FETs), coupled betwe... | 12/28/2010 |
| 7855577 | Using a single buffer for multiple I/O standards A buffer circuit for using one buffer for multiple differential I/O standards is disclosed. The buffer circuit includes a differential input buffer. The first input of the differential input buffer may receive an input and the second input is coupled to a switch. Th... | 12/21/2010 |
| 7843225 | Protocol-based bus termination for multi-core processors A multi-core bus termination apparatus includes a protocol analyzer and a plurality of drivers. The protocol analyzer is disposed within a processor core and configured to receive one or more protocol signals, and is configured to indicate whether or not the process... | 11/30/2010 |
| 7843224 | Interface circuit that can switch between single-ended transmission and differential transmission An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between ... | 11/30/2010 |
| 7830177 | Low power output driver A low power output driver includes one of a regulated reduced voltage source that receives a supply voltage and outputs a regulated reduced voltage that is a lower voltage than the supply voltage. The driver also includes a first driver input that receives a first l... | 11/09/2010 |
| 7830176 | Controlling signal levels on a signal line within an integrated circuit A signal line 12 has at a first location a first driver 14 to drive a first signal level on that signal line 12. A second driver 16 is provided at a second location, separated from the first location, and serves to drive the line signal t... | 11/09/2010 |
| 7825695 | OR gate connecting LVDS comparators to multiplexer First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input ... | 11/02/2010 |
| 7821297 | Low power output driver A low power output driver includes one of a regulated reduced voltage source that receives a supply voltage and outputs a regulated reduced voltage that is a lower voltage than the supply voltage. The driver also includes a first driver input that receives a first l... | 10/26/2010 |
| 7816949 | Signal transmission circuit and signal transmission system using the same A signal transmission circuit includes first and second power source wirings, and a plurality of differential circuits connected in series between the first and second power source wirings. A signal transmission system includes a plurality of pairs of signal wirings... | 10/19/2010 |
| 7812641 | Wireline transmission circuit A wireline transmission circuit includes a first circuit that produces a first variable current, a second circuit that produces a first static current, a trans-impedance amplifier that outputs a first analog signal at a first output node in response to the first var... | 10/12/2010 |
| 7812640 | Bridge design for SD and MMC data buses A circuit with bi-directional signal transmission, including a first signal source, for generating a first signal comprising one bit per clock cycle during a first plurality of clock cycles, a second signal source, for generating a second signal including one bit pe... | 10/12/2010 |
| 7812639 | Extending drive capability in integrated circuits utilizing programmable-voltage output circuits An integrated circuit (IC) includes an output driver circuit portion that is electrically configurable, via a configuration input, to operate in either a first mode or a second mode corresponding to an indication of a condition of the IC, such as a supply voltage in... | 10/12/2010 |
