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| Number | Title | Issue Date |
| 7236018 | Programmable low-voltage differential signaling output driver The present invention relates to a programmable low-voltage differential signaling (LVDS) output driver. The programmable LVDS output driver may include circuitry for tri-stating the output to allow several programmable LVDS output drivers to be coupled to a single ... | 06/26/2007 |
| 7236013 | Configurable output buffer and method to provide differential drive A configurable output buffer capable of providing differential drive having complementary pairs of CMOS transistors having a common output terminal and a common control terminal, and with the second terminal of each CMOS transistor connected to its corresponding sup... | 06/26/2007 |
| 7236019 | Low current wide VREF range input buffer A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing assists in reducing current consumption. The combination of N and P-channel differential pairs results in symme... | 06/26/2007 |
| 7235937 | Traction motor control system For controlling a traction motor of a vehicle, a current command value is determined based on a torque command and a load value representative of running load of the vehicle. A voltage command value is calculated in such a manner that a difference between the curren... | 06/26/2007 |
| 7236002 | Digital CMOS-input with N-channel extended drain transistor for high-voltage protection A circuit and a method are given, to realize an electronic system for combined usage at differing voltage ranges as defined by a low-voltage range for operating standard CMOS devices and a high-voltage range exceeding said standard CMOS low-voltage operating range s... | 06/26/2007 |
| 7236012 | Data output driver that controls slew rate of output signal according to bit organization A data output driver of a semiconductor memory device can minimize a difference in slew rate of an output signal according to a selected bit organization. The data output driver includes a pull-up driver and a pull-down driver. The pull-up driver pulls up an output ... | 06/26/2007 |
| 7236001 | Redundancy circuits hardened against single event upsets A decision block is incorporated into a circuit design to provide hardening against single event upset and to store data. The decision block includes a storage element that stores data as long as inputs to the decision block remain constant. The decision block recei... | 06/26/2007 |
| 7236011 | High-speed differential logic buffer A circuit for a high speed digital buffer has an active load circuit connected to an output of the digital buffer. The active load circuit loads the buffer output with an active inductance to reduce the RC time constant at the buffer output. The active load circuit ... | 06/26/2007 |
| 7233177 | Precision tuning of a phase-change resistive element The present invention comprises a method and structure for programming an on-chip phase-change resistor to a target resistance. Using an off-chip precision resistor as a reference, a state-machine determines a difference between the resistance of an on-chip resistor... | 06/19/2007 |
| 7233176 | CMOS input buffer and a method for supporting multiple I/O standards A CMOS input buffer supporting multiple I/O standards and having a pair of NMOS and PMOS differential receivers, each having a first input connected to an input pad and a second input connected to a reference voltage, a first multiplexer connected to the control ter... | 06/19/2007 |
| 7230453 | Output buffer providing multiple voltages The present invention provides an output buffer providing multiple voltages including an arrangement of bootstrapping capacitors, and a charge replenishing mechanism which provides continuous pulses to the arrangement of bootstrapping capacitors, thereby, maintainin... | 06/12/2007 |
| 7230452 | Driver circuit A driver circuit includes a first transistor coupled between an input supply node and an output node. The first transistor operates in one of a conductive state to couple the output node with the input supply node and non-conductive state according to cooperative op... | 06/12/2007 |
| 7230454 | Serial audio output driver circuits and methods An output driver circuit including a transistor for pulling down an output terminal voltage and a charge pump for driving an input of the transistor to pull-down the output terminal voltage substantially to zero volts in response to a selected level of an input sign... | 06/12/2007 |
| 7230457 | Programmable dual drive strength output buffer with a shared boot circuit An integrated circuit device is discussed that includes a data output driver having two modes of operation for driving a data bus. The output driver includes a circuit to produce a full drive output high signal, a partial drive output high signal, a full drive outpu... | 06/12/2007 |
| 7227375 | DAC based driver with selectable pre-emphasis signal levels A Transmit line driver with selectable pre-emphasis and driver signal magnitudes comprises a primary current driver for setting a primary current level and a pre-emphasis current driver that provides an additional amount of current that is superimposed with or added... | 06/05/2007 |
| 7227381 | Input buffer and semiconductor device including the same An input buffer includes a control circuit that generates first control signals depending on a signal type of at least one input signal. The input buffer also includes a receiver that generates at least one output signal of a predetermined signal type from the at le... | 06/05/2007 |
| 7227390 | Apparatus and method for a driver with an adaptive drive strength for a class D amplifier A circuit for adaptively adjusting the drive strength of output power transistors in a class D amplifier is provided. The circuit includes a driver circuit and a low-voltage detect circuit. The low-voltage detect circuit is arranged to assert a low-voltage detect si... | 06/05/2007 |
| 7227385 | Actuation circuit for MEMS structures An actuation circuit which actuates force electrodes using an open loop transconductance stage. The actuation circuit includes at least a first output and a second output, and a first input. The circuit includes a current sink coupled to the first output which is en... | 06/05/2007 |
| 7227382 | Transmit based equalization using a voltage mode driver A driver circuit. In one embodiment, the driver circuit includes a plurality of pull-up circuits and a plurality of pull-down circuits. The driver circuit also includes control logic that is coupled to activate/deactivate the pull-up and pull-down circuits. The driv... | 06/05/2007 |
| 7227380 | Synchronous first-in/first-out block memory for a field programmable gate array The present invention comprises a field programmable gate array that has a plurality of dedicated first-in/first-out memory logic components. The field programmable gate array includes a plurality of synchronous random access memory blocks that are coupled to a plur... | 06/05/2007 |
| 7224186 | Semiconductor circuit device The present invention relates to a semiconductor circuit device including a logic circuit and a signal line driving circuit. The logic circuit is operated at high supply voltage and outputs a signal with a high voltage amplitude. The signal line driving circuit rece... | 05/29/2007 |
| 7224224 | Thin film semiconductor device and manufacturing method When n-channel thin film transistors(TFTs) and p-channel TFTs are formed on a polycrystalline silicon film formed on a glass substrate, a process is included in which P-dopant or N-dopant is introduced at the same time to the channel region of a part of the n-channe... | 05/29/2007 |
| 7224187 | CMOS buffer circuits and integrated circuits using the same CMOS buffer circuits with reduced short circuit current. In the CMOS buffer circuit, an output stage drives an output terminal and comprises a first output transistor of a first conductive type and a second output transistor of a second conductive type. An output dr... | 05/29/2007 |
| 7221218 | MOSFET amplifier having feedback controlled transconductance A signal is applied to the body of a MOSFET to enhance the transconductance of the MOSFET. The signal applied to the body of the MOSFET has essentially the same waveform as an input signal supplied to the gate of the MOSFET, and is shifted by approximately 180 degre... | 05/22/2007 |
| 7221192 | Voltage access circuit configured for outputting a selected analog voltage signal for testing external to an integrated circuit Access is provided to internal analog voltage signals on internal analog nodes of an integrated circuit, without distortion of the internal analog voltage signals. An integrated circuit includes a voltage access circuit having buffered multiplexer circuits in proxim... | 05/22/2007 |
| 7221196 | Low-power low-voltage multi-level variable-resistor line driver A low-power multi-level pulse amplitude modulation (PAM) line driver using variable resistors is disclosed for transmitting digital data over controlled-impedance transmission lines. This invention discloses the design of a multi-level PAM driver for high-speed wire... | 05/22/2007 |
| 7222208 | Simultaneous bidirectional port with synchronization circuit to synchronize the port with another port A simultaneous bidirectional port coupled to a bus includes a synchronization circuit that synchronizes the port with another simultaneous data port coupled to the same bus. The synchronization circuit includes an output driver having an imbalanced output impedance,... | 05/22/2007 |
| 7221193 | On-chip termination with calibrated driver strength Techniques are provided for controlling an on-chip termination resistance in an input or output (IO) buffer using calibration circuits. Each calibration circuit monitors the voltage between an external resistor and a group of on-chip transistors. When the effective ... | 05/22/2007 |
| 7218149 | Output or bidirectional buffer circuit which tolerates an external input voltage that is higher than an internal power supply voltage A semiconductor integrated circuit includes a first transistor coupled between the electrical source terminal and the output terminal. The first transistor provides an output signal based on a power supply voltage to the output terminal. The semiconductor integrated... | 05/15/2007 |
| 7218145 | Level conversion circuit An input circuit (a first transistor pair) that receives complementary input signals is connected to a latch circuit (a second transistor pair) that converts the amplitude of an input signal into second amplitude higher than first amplitude. A current mirror circuit... | 05/15/2007 |
| 7219282 | Boundary scan with strobed pad driver enable A circuit and a method are provided for testing the enable function of Boundary Scan Register bits that control the driver of unconnected I/O pins of an 1149.1-compliant IC during the IC's reduced pin-count access manufacturing test, and to test the connections to t... | 05/15/2007 |
| 7218146 | Transmitter circuit, receiver circuit, interface circuit, and electronic instrument A transmitter circuit including: a current driver which current-drives differential signal lines; and a voltage driver which is electrically disconnected from at least one of the differential signal lines in a normal transfer mode, and is electrically connected to t... | 05/15/2007 |
| 7218169 | Reference compensation circuit A compensation circuit comprises a reference circuit including a reference NMOS device and a reference PMOS device. The reference circuit is operative to generate a first reference signal and a second reference signal, the first reference signal being a function of ... | 05/15/2007 |
| 7218150 | Semiconductor integrated circuit device and differential small-amplitude data transmission apparatus An output driving circuit has a first and second differential output nodes connected to a first and second external output terminals, respectively. A capacitance connection circuit is connected between the first and second differential output nodes. The capacitance ... | 05/15/2007 |
| 7218155 | Techniques for controlling on-chip termination resistance using voltage range detection Techniques are provided for controlling an on-chip termination resistance in an input or output (IO) buffer using a calibration circuit. The calibration circuit monitors the voltage between an external resistor and a group of on-chip transistors. When voltage betwee... | 05/15/2007 |
| 7215128 | Output circuit for semiconductor device, semiconductor device having output circuit, and method of adjusting characteristics of output circuit To decrease the circuit scale necessary for the calibration of the output circuit and to decrease the time required for the calibration operation. The invention includes a first output buffer and a second output buffer that are connected to a data pin, and a calibra... | 05/08/2007 |
| 7215149 | Interface circuitry for electrical systems An electrical system has a master circuit and an interface (I/F) circuit. The master circuit generates a master output signal. The I/F circuit receives an I/F input signal and a flag signal and generates an I/F output signal for application to a slave circuit, where... | 05/08/2007 |
| 7214985 | Integrated circuit incorporating higher voltage devices and low voltage devices therein An integrated circuit formed on a semiconductor substrate and configured to accommodate higher voltage devices and low voltage devices therein. In one embodiment, the integrated circuit includes a transistor having a gate located over a channel region recessed into ... | 05/08/2007 |
| 7215151 | Multi-stage light emitting diode driver circuit A multi-stage light emitting diode (LED) driver circuit is provided. The circuit includes a driver transistor coupled to an LED. The LED is coupled at a drain of the driver transistor and the driver transistor drives current to the LED. A first transistor stack is c... | 05/08/2007 |
| 7215150 | Method and circuit for maintaining I/O pad characteristics across different I/O supply voltages A circuit implements a method to adjust input/output (I/O) characteristics of an I/O pad circuit (10) depending upon which value of an I/O supply voltage is used within a range of supply voltages. An I/O supply voltage being supplied to the pad circuit is det... | 05/08/2007 |
