Class 326/81 - CMOS

Subclass of Class 326 - Electronic digital logic circuitry
Definition: Subject matter including a device having a p-channel and
No. of patents: 1236
Last issue date: 05/08/2012

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Number	Title	Issue Date
8174289	Level shifter and level shifting method thereof A level shifter includes a first level-switching device and a second level-switching device. The first level-switching device includes a first switch device, a second switch device, a first control switch and a third switch device. The first switch device is for rec...	05/08/2012
8174288	Voltage conversion and integrated circuits with stacked voltage domains An integrated circuit (IC) system includes a plurality of ICs configured in a stacked voltage domain arrangement such that a low side supply rail of at least one of ICs is common with a high side supply rail of at least another of the ICs; a reversible voltage conve...	05/08/2012
8169234	No stress level shifter A voltage level shifting circuit may include a differential first-stage level shifter that receives a binary input signal and generates a non-inverted first-stage shifted output signal and an inverted first-stage shifted output signal, a second-stage level shifter t...	05/01/2012
8067961	Level conversion circuit for converting voltage amplitude of signal In a level conversion circuit, two P channel MOS transistors form a current mirror circuit. When an input signal rises from the “L” level to the “H” level, an N channel MOS transistor connected to a drain of one P channel MOS transistor is brought out of con...	11/29/2011
8044684	Input and output buffer including a dynamic driver reference generator A system having an input and output buffer includes a dynamic driver reference generator to generate dynamic driver reference signals based on a data signal and an IO buffer supply voltage, a level shifter to generate level shifted signals based, in part, on the dyn...	10/25/2011
8044683	Logic circuit capable of level shifting A logic circuit includes a logic gate unit, an inverter, and a switching circuit. The logic gate unit receives a power supply voltage and an input signal to output a first signal. The inverter receives the first signal to output a second signal. The switching circui...	10/25/2011
8030964	Techniques for level shifting signals A level shifter circuit includes an input circuit, an inverter, a pull-up circuit, and a pull-down circuit. The input circuit generates a pull-up signal in response to an input signal using charge from a supply voltage. The inverter inverts the input signal to gener...	10/04/2011
8030965	Level shifter using SR-flip flop A level shifter receives an input signal of either a first lower voltage or a first upper voltage which form a voltage pair, and level-shifts the input signal to output an output signal of either a second lower voltage or a second upper voltage. An SR flip-flop gene...	10/04/2011
8013631	CMOS input buffer circuit Provided is a complementary metal oxide semiconductor (CMOS) input buffer circuit that is capable of lower voltage operation with lower current consumption. The CMOS input buffer circuit includes: a depletion type NMOS transistor including a drain connected to a pow...	09/06/2011
8004310	Power supply regulation Power supply regulation. A power supply regulation system includes a transistor through which power is carried. The system also includes a switch connected to a gate of the transistor. Further, the system includes a transmission gate responsive to an input signal to...	08/23/2011
8004311	Input/output circuit and integrated circuit apparatus including the same An input/output circuit includes an I/O node connected to a pull up and pull down circuit having a pull up and pull down transistors. Data is sent and received at through the I/O node. A level shifter provides voltages including a supply voltage and a high voltage h...	08/23/2011
7994821	Level shifter circuits and methods A level shifter circuit includes first and second transistors coupled in series and third and fourth transistors coupled in series. The fourth transistor is coupled to a first node between the first and the second transistors. The level shifter circuit also includes...	08/09/2011
7982500	Low-noise PECL output driver An integrated circuit output driver is provided that exhibits improved performance and signal integrity. In one embodiment, circuitry for producing an oscillatory output signal having a peak voltage of V volts uses MOS transistor circuitry transistors of which are d...	07/19/2011
7982499	Capacitive node isolation for electrostatic discharge circuit Capacitive node isolation circuitry in an integrated circuit eliminates the creation of hot spots (stored charge) on high capacitive nodes during a test of electrostatic discharge (ESD) protection circuitry of the integrated circuit or during any ESD event occurring...	07/19/2011
7969191	Low-swing CMOS input circuit The invention relates to a CMOS input circuit for receiving low-swing input signals, which is an alternative to the CMOS input circuits as known from the prior art. The CMOS input circuit according to the invention comprises a leveling circuit (LC) that is construct...	06/28/2011
7969190	Input stage for mixed-voltage-tolerant buffer with reduced leakage A mixed-voltage buffer circuit coupled between a first circuit operative at a first power supply voltage and a second circuit operative at a second power supply voltage. The buffer circuit is connectable to the second power supply voltage and a third power supply vo...	06/28/2011
7932748	2×VDD-tolerant logic circuits and a related 2×VDD-tolerant I/O buffer with PVT compensation A 2×VDD-tolerant input/output (I/O) buffer circuit with process, voltage, and temperature (PVT) compensation suitable for CMOS technology is disclosed. A 2×VDD-tolerant I/O buffer with a PVT compensation circuit is implemented with novel 2×VDD-tolerant logic gate...	04/26/2011
7928767	Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof A method for increasing responding speed and lifespan of a buffer includes detecting an edge of an input signal of the buffer, triggering a pulse signal with a predetermined period according to the detected edge, and driving the buffer for generating an output signa...	04/19/2011
7919983	Multiple output level shifter A level shifter for integrated circuits includes input stage transistors, reference stage transistors, a cascode stage coupled to the input stage and the reference stage transistors and a pair of comparators. The cascode stage generates a first cascode output and a ...	04/05/2011
7915921	Circuits and methods for level shifting a signal In one embodiment, the present disclosure includes a level shift circuit. The level shift circuit includes a clocked latch to receive a digital data signal and a complement of the digital data signal. Outputs of the clocked latch are coupled to inputs of a second la...	03/29/2011
7915922	Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof A method for increasing responding speed and lifespan of a buffer includes detecting an edge of an input signal of the buffer, triggering a pulse signal with a predetermined period according to the detected edge, and driving the buffer for generating an output signa...	03/29/2011
7902871	Level shifter and semiconductor device having off-chip driver Provided are a level shifter and a semiconductor device having an OFF-chip driver (OCD) using the same. The level shifter includes a plurality of series connected logic gates receiving a first-state input signal having a first power supply voltage level and generati...	03/08/2011
7884646	No stress level shifter A voltage level shifting circuit may include a differential first-stage level shifter that receives a binary input signal and generates a non-inverted first-stage shifted output signal and an inverted first-stage shifted output signal, a second-stage level shifter t...	02/08/2011
7884645	Voltage level shifting circuit and method In a particular embodiment, a method includes receiving an input voltage at an input to a level shifting circuit that includes voltage pull-up logic. The method includes providing an output signal from the level shifting circuit. The method also includes selectively...	02/08/2011
7872499	Level shift circuit, and driver and display system using the same Disclosed is a level shift circuit that includes a first level shifter which is connected between an output terminal and a first power supply terminal that supplies a first voltage and sets the output terminal to a level of the first voltage when an input signal rec...	01/18/2011
7872500	Semiconductor device According to an aspect of the present invention, there is provided a semiconductor device including: a first circuit portion including: a first circuit that is connected between a first high-side power line and a low-side power line and that outputs a second signal ...	01/18/2011
7872501	Device for transforming input in output signals with different voltage ranges Arrangement for accepting an input signal in a first voltage range and producing an output signal in a second voltage range. A transition detection circuit (230) detects a transition from a high level to a low level of the input signal and a control circuit (...	01/18/2011
7868659	I/O buffer with twice the supply voltage tolerance using normal supply voltage devices The invention relates to an I/O buffer with twice the supply voltage tolerance using normal supply voltage devices. The I/O buffer of the invention includes a driver, a first level converter, a gate-controlled circuit and a dynamic source output stage. Signals of th...	01/11/2011
7863933	Tri-state I/O port The present invention discloses a tri-state I/O port. The tri-state I/O port comprises a tri-state logic block, a weak buffer and a delay block. The input terminals of the tri-state logic block are connected to data and OE (output enable) signals. When OE signal is ...	01/04/2011
7852119	SR-flip flop with level shift function A cross-coupled inverter includes a first inverter and a second inverter cross-coupled such that the input terminal of each inverter is connected to the output terminal of the other inverter. A set signal is input to the gate of a first set transistor, and an invert...	12/14/2010
7843222	Buffer-driving circuit capable of increasing responding speed and prolonging lifespan, buffer, and method thereof A method for increasing responding speed and lifespan of a buffer includes detecting an edge of an input signal of the buffer, triggering a pulse signal with a predetermined period according to the detected edge, and driving the buffer for generating an output signa...	11/30/2010
7839173	High speed, low power signal level shifter A system for signal level shifting in an IC can include a first inverter having a first pull-up device and a pull-down device, wherein the first inverter is operable to receive an input signal having a voltage potential at a logic high that does not disable the firs...	11/23/2010
7791372	Level shifter and level shifting method thereof A level shifter includes a first level-switching device and a second level-switching device. The first level-switching device includes a first switch device, a second switch device, a first control switch and a third switch device. The first switch device is for rec...	09/07/2010
7791373	Semiconductor device and display device The invention provides a low cost and high performance functional circuit by reducing time required for the repetition of logic synthesis and routing of layout in a functional circuit design. A standard cell used for the logic synthesis and the routing of layout is ...	09/07/2010
7777525	Input buffer in ultradeep submicron process An input buffer for an Ultradeep Sub Micron (UDSM) process which allows the UDSM process to interface with a 3V input. The input voltage is applied to a degenerated transistor which forms part of the input buffer. The input buffer effectively drops the input voltage...	08/17/2010
7768309	Low-noise PECL output driver An integrated circuit output driver is provided that exhibits improved performance and signal integrity. In one embodiment, the integrated circuit output driver is fabricated in a process having thin-gate MOS transistors and thick-gate MOS transistors and includes a...	08/03/2010
7755394	Circuit combining level shift function with gated reset A circuit (01) combining level shift function with gated reset is described, performing a simple logic function with inputs supplied from a lower voltage (VD) and a drive out at its output (05) with a higher voltage (VC). Said circuit (01) compr...	07/13/2010
7710152	Multistage dual logic level voltage translator A multistage dual logic level voltage translator for translating both high and low input logic levels to higher levels, at least one of which levels is above the maximum recommended voltage of transistors implementing the stages, includes an input stage for receivin...	05/04/2010
7705631	Level shifter circuit A level shifter comprises a voltage converting circuit, a voltage pull-up circuit, and a control signal generating circuit. The voltage converting circuit is configured to receive an input signal of a first voltage level and to output an output signal of a second vo...	04/27/2010
7679402	Methods and apparatus for monitoring power gating circuitry and for controlling circuit operations in dependence on monitored power gating conditions A circuit incorporating a current starved ring oscillator is coupled to a power gate switch in an integrated circuit. The circuit incorporating the current starved ring oscillator amplifies a voltage difference between a virtual ground associated with the power gate...	03/16/2010

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Class 326/81 - CMOS