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| Number | Title | Issue Date |
| 8030960 | Converting dynamic repeaters to conventional repeaters A method for converting a repeater circuit from a dynamic repeater circuit to a static repeater circuit. The method includes disconnecting a feedback path coupled to a first stage of the dynamic repeater circuit and electrically shorting gate terminals of first and ... | 10/04/2011 |
| 7768295 | Advanced repeater utilizing signal distribution delay An advanced repeater utilizing signal distribution delay. In accordance with a first embodiment of the present invention, such an advanced repeater circuit comprises an output stage for driving an output signal line responsive to an input signal and a feedback loop ... | 08/03/2010 |
| 7412635 | Utilizing multiple bitstreams to avoid localized defects in partially defective programmable integrated circuits Methods and structures utilizing multiple configuration bitstreams to program integrated circuits (ICs) such as programmable logic devices (PLDs), thereby enabling the utilization of partially defective ICs. A user design is implemented two or more times, preferably... | 08/12/2008 |
| 7375556 | Advanced repeater utilizing signal distribution delay An advanced repeater utilizing signal distribution delay. In accordance with a first embodiment of the present invention, such an advanced repeater circuit comprises an output stage for driving an output signal line responsive to an input signal and a feedback loop ... | 05/20/2008 |
| 7362126 | Floating CMOS input circuit that does not draw DC current A floating CMOS input circuit is disclosed that does not draw direct current. The floating CMOS input circuit comprises a first inverter circuit that is capable of being coupled to an input voltage (Vin) and an n-channel pull-down transistor (N1) that is coup... | 04/22/2008 |
| 7321238 | Over-voltage tolerant multifunction input stage An over-voltage tolerant input stage in a semiconductor device is disclosed. The input stage includes: an input pad for receiving an input signal to the semiconductor device, a buffer coupled to the input pad for buffering the input signal, a pullup circuit for limi... | 01/22/2008 |
| 7304503 | Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability, is provided and described. In one embodiment, switches are set to a first switch position to operate the repeater circuit... | 12/04/2007 |
| 7295041 | Circuits and methods for detecting and assisting wire transitions A circuit for assisting signal transitions on a wire, and a method thereof. The circuit includes a first subcircuit that causes a first transistor that is coupled to the circuit's output to turn on during a rising transition and then turn off. The first transistor d... | 11/13/2007 |
| 7282946 | Delay-insensitive data transfer circuit using current-mode multiple-valued logic The present invention relates to a delay-insensitive DI data transfer circuit based on a current-mode multiple-valued logic for transferring data regardless of a delay time of transmission according to a length of wire. The delay-insensitive data transfer cir... | 10/16/2007 |
| 7262636 | Method and system for a circuit for timing sensitive applications Systems and methods for circuits with substantially equal propagation delay while providing different drive strengths are disclosed. These systems and methods may allow for a circuit with a drive strength that is some ratio of an arbitrary strength full drive streng... | 08/28/2007 |
| 7256609 | Data acceleration device and data transmission apparatus using the same There is provided a data acceleration device comprising a pull-up driver for driving a pull-up in response to the signal level on a first node, a pull-down driver for driving a pull-down in response to the signal level on the first node, a first pull-up circuit for ... | 08/14/2007 |
| 7215135 | Single event upset hardened circuitry without sensitivity to overshoot and/or undershoot conditions An apparatus for hardening logic circuitry against a Single-Event-Effect condition and for providing immunity to an overshoot and undershoot condition is provided. The apparatus includes undershoot-blocking and overshoot-blocking modules that are configured to be co... | 05/08/2007 |
| 7196538 | Data acceleration device and data transmission apparatus using the same There is provided a data acceleration device comprising a pull-up driver for driving a pull-up in response to the signal level on a first node, a pull-down driver for driving a pull-down in response to the signal level on the first node, a first pull-up circuit for ... | 03/27/2007 |
| 7180325 | Data input buffer in semiconductor device A data input buffer for use in a semiconductor device, including: a detection unit for receiving a reference voltage signal and an input data signal through a first input terminal and a second input terminal respectively in order to detect a voltage level of the inp... | 02/20/2007 |
| 7173455 | Repeater circuit having different operating and reset voltage ranges, and methods thereof A circuit for assisting signal transitions on a wire, and a method thereof. A first subcircuit causes a first transistor that is coupled to the circuit's output to turn on during a rising transition and drive the output to a high state to assist in the rising transi... | 02/06/2007 |
| 7164292 | Reducing electrical noise during bus turnaround in signal transfer systems Systems and methods for reducing electrical noise generated during bus turnaround in signal transfer systems are provided. These systems include differential drivers having current sources continuously coupled to a signal bus during all operating modes of the driver... | 01/16/2007 |
| 7142018 | Circuits and methods for detecting and assisting wire transitions A circuit for assisting signal transitions on a wire, and a method thereof. The circuit includes a first subcircuit that causes a first transistor that is coupled to the circuit's output to turn on during a rising transition and then turn off. The first transistor d... | 11/28/2006 |
| 7123045 | Semiconductor integrated circuit device When an output voltage output from a buffer approaches a ground voltage, a MOS transistor turns off, so that clamp for a gate of the MOS transistor is released. ... | 10/17/2006 |
| 7119580 | Repeater circuit with high performance repeater mode and normal repeater mode Repeater circuit with high performance repeater mode and normal repeater mode is provided and described. In one embodiment, switches are set to a first switch position to operate repeater circuit in the high performance repeater mode. In another embodiment, switches... | 10/10/2006 |
| 7116126 | Intelligent delay insertion based on transition A method of transmitting adjacent signals is disclosed. Sensing is performed on signals in the group and adjacent signals are either switched or delayed if the adjacent signals are switching at the same time. The method is used in networks where coupling and capacit... | 10/03/2006 |
| 7107552 | Method and apparatus to analyze noise in a pulse logic digital circuit design A method and apparatus to analyze noise in a pulse logic digital circuit comprising identifying a channel connected component (CCC) in the pulse logic digital circuit design, said CCC comprising a pulse generator. Modifying the pulse logic digital circuit by disconn... | 09/12/2006 |
| 7091741 | Input buffer capable of reducing input capacitance seen by input signal Provided is an input buffer whose input capacitance presented to input signals can be reduced. The input buffer includes a first differential amplifier which compares the sizes of a first input signal and a second input signal and outputs an output signal as the res... | 08/15/2006 |
| 7087877 | Auto focus for a flow imaging system A pair of optical gratings are used to modulate light from an object, and the modulated light from either grating is used to determine the velocity of the object. Each optical grating is offset from a reference focal point by the same distance, one grating being off... | 08/08/2006 |
| 6888370 | Dynamically adjustable termination impedance control techniques The on-chip impedance termination circuits can be dynamically adjusted to match transmission line impedance values. A network of termination resistors on an integrated circuit provides termination impedance to a transmission line coupled to an IO pin. The terminatio... | 05/03/2005 |
| 6870389 | Differential circuit with current overshoot suppression A differential driver circuit that suppresses current overshoot and allows current switching to proceed at near the maximum speed includes: a differential pair Q5 and Q6 having a tail current source I56; a first buffer Q3 providing a firs... | 03/22/2005 |
| 6825687 | Selective cooling of an integrated circuit for minimizing power loss An apparatus and method for reducing leakage current of transistors used in an integrated circuit, which selectively switch a processor circuit in the integrated circuit to a standby state. A cooling device is included and selectively located in an area of the integ... | 11/30/2004 |
| 6823293 | Hierarchical power supply noise monitoring device and system for very large scale integrated circuits A hierarchical power supply noise monitoring device and system for very large scale integrated circuits. The noise-monitoring device is fabricated on-chip to measure the noise on the chip. The noise-monitoring system includes a plurality of on-chip noise-monitoring ... | 11/23/2004 |
| 6798236 | Output buffer circuit with power supply voltages different from a power supply voltage applied to an internal circuit A semiconductor integrated circuit which is supplied with a first power supply voltage and a second power supply voltage from outside so as to operate incorporated circuits, and outputs data at an output terminal, includes an internal circuit that carries out a pred... | 09/28/2004 |
| 6720803 | Driver circuit A technique includes, in response to a first signal transitioning to a first logic state and first drive circuit being deactivated, activating a second drive circuit to provide a second signal. In response to the second drive circuit being deactivated and the first ... | 04/13/2004 |
| 6710627 | Dynamic CMOS circuits with individually adjustable noise immunity A technique to individually adjust noise immunity of each input of a dynamic circuit including parallel or series-parallel pull-down network includes identifying precharge nodes of the dynamic circuit that require a reduction of noise. The technique further includes... | 03/23/2004 |
| 6631487 | On-line testing of field programmable gate array resources A method of testing field programmable gate array (FPGA) resources and identifying faulty FPGA resources during normal on-line operation includes configuring an FPGA into a working area and an initial self-testing area. The working area maintains normal o... | 10/07/2003 |
| 6577152 | Noise suppression circuit for suppressing above-ground noises A noise suppression circuit for suppressing above-ground noise is disclosed. The noise suppression circuit for suppressing noises includes a first inverter, a second inverter, and a one-shot circuit. The first inverter, connected to an input line, switche... | 06/10/2003 |
| 6525559 | Fail-safe circuit with low input impedance using active-transistor differential-line terminators A fail-safe circuit for a pair of differential input lines detects when one or both lines are open. Each line has a pull-up of a switched p-channel transistor in series with a resistor or another p-channel transistor that has its effective resistance cont... | 02/25/2003 |
| 6496031 | Method for calculating the P/N ratio of a static gate based on input voltages A method for calculating the P/N ratios of static gates based on the voltages presented at the inputs of these static gates. The method identifies the PFETs and NFETs that are used when a particular voltage pattern drives the input of a static gate. After... | 12/17/2002 |
| 6456111 | Receiver circuit for a complementary signal A receiver circuit in a communication system receives a complementary potential signal having a ground level or a floating level from a transmitter circuit through a pair of transmission lines. The receiver circuit includes first and second switching tran... | 09/24/2002 |
| 6429690 | Programmable linear transconductor circuit A programmable linear transconductor circuit is disclosed. The programmable linear transconductor circuit includes a first current source and a second current source, a first group of transistors and a second group of transistors, a first load coupled to ... | 08/06/2002 |
| 6188244 | Hysteresis input buffer An hysteresis input buffer includes a first CMOS inverter generating a node signal, a second CMOS inverter coupled to the first CMOS inverter, inverting the node signal from the first CMOS inverter, and producing an intermediate signal, and a hysteresis c... | 02/13/2001 |
| 6157203 | Input circuit with improved operating margin using a single input differential circuit A semiconductor integrated circuit including an input circuit constituted as a single-input differential circuit which has a first MOSFET to whose gate a reception signal with a small amplitude with respect to a power supply voltage is supplied and a seco... | 12/05/2000 |
| 6154059 | High performance output buffer An output buffer has internal circuitry connected between an input node and an output node. The internal circuitry includes a quiet voltage supply connected to a first set of transistors of the internal circuitry and a noisy voltage supply connected to a ... | 11/28/2000 |
| 6114872 | Differential input circuit A differential input circuit includes a first differential circuit of a current mirror type for generating a first differential voltage by using an input voltage and a reference voltage, a second differential circuit of a current mirror type for generatin... | 09/05/2000 |