A self defense weapon formed as a memo pad and which is easily held by a person's fingers, therefore making it possible to provide protection from a mugger and also to quickly and easily write a record or a message without failure of missing or forgetting significant information under a stressful situation.
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7408384 | Drive circuit of computer system for driving a mode indicator A drive circuit of a computer system is for driving a mode indicator. The computer system includes a first port and a second port. The mode indicator includes a first receiving end and a second receiving end. The drive circuit includes a first input end connected to... | 08/05/2008 |
| 7158359 | Circuit configuration having a semiconductor switch and a protection circuit A circuit configuration has a first semiconductor switch and a first protection circuit. The protection circuit has a second semiconductor switch whose load path is connected between a control terminal and a load path terminal of the first semiconductor switch. The ... | 01/02/2007 |
| 7106093 | Semiconductor device A semiconductor device having a plurality of cascaded IC's (14, 15, 16), wherein the matching impedance between a signal transmission path (12) connected to an external signal transmission path and an input-side or output-side IC (14, 16) is set... | 09/12/2006 |
| 6888378 | Semiconductor integrated circuit This invention prevents a cross talk caused by intersection of interconnections, and offers a semiconductor integrated circuit with improved circuit characteristics. By disposing a pair of emitter follower circuits symmetrically with respect to a center line of a di... | 05/03/2005 |
| 6876934 | Method for determining fault coverage from RTL description A method for evaluating the upper bound fault coverage of an integrated circuit (IC) or a portion thereof from register transfer level (RTL) description is provided. The method requires the analysis of a circuit described in RTL consisting of primary input and outpu... | 04/05/2005 |
| 6753703 | Resetable cascadable divide-by-two circuit A cascadable divide-by-two binary counter circuit (120) that has particular application for use as a synchronous divider circuit (50, 54) in a phase lock loop (26). The counter circuit (120) employs a D flip-flop (122) that receive... | 06/22/2004 |
| 6400184 | Transistor output circuit A transistor output circuit featuring a low power consumption, high speed and stabilized operation is realized. The transistor output circuit of the invention is comprised of: transistors Q59 and Q57 having respective bases supplied with input signals in ... | 06/04/2002 |
| 6266800 | System and method for eliminating effects of parasitic bipolar transistor action in dynamic logic using setup time determination A method and apparatus of eliminating the unwanted effects of parasitic bipolar discharge in dynamic logic circuits including silicon-on-insulator (SOI) field effect transistors (FET) by measuring setup time in a logic partition of a dynamic logic circuit... | 07/24/2001 |
| 6255857 | Signal level shifting circuits A signal level shifting circuit comprises an emitter-follower transistor with a base supplied with an input signal, a collector coupled to a supply voltage, and an emitter coupled via a level shifter to a bias circuit, whereby a level shifted signal is pr... | 07/03/2001 |
| 6249148 | Low power variable base drive circuit A variable base drive output circuit that is operational for low-potential power supplies. The output circuit includes a current regulating branch and a base drive branch. A control transistor is logically coupled to an enable signal and an input signal t... | 06/19/2001 |
| 6222391 | Semiconductor integrated circuit A circuit for shifting the potential level of an input signal toward higher potentials is added to a conventional differential ECL circuit in order to shift levels of emitter potentials of npn bipolar transistors forming a current switch toward higher pot... | 04/24/2001 |
| 5847576 | Low power, variable logic threshold voltage, logic gates A logic gate arrangement having a master gate or section for controlling the logic threshold voltage of slave gates responsive to the master. Both the master and slave gates have two opposite conductivity type transistors disposed in combination with a lo... | 12/08/1998 |
| 5693978 | Reset signal output circuit and semiconductor integrated circuit device A logic circuit (3) comprises IIL aggregates (4a, 4b, 4c) each consisting of a plurality of IIL elements. Each of the IIL aggregates (4a, 4b, 4c) is supplied with an injector current (Iinj) from an injector current source (2) through a wiring (... | 12/02/1997 |
| 5537064 | Logic circuit capable of handling large input current A protection circuit for a semiconductor switch for switching a load is disclosed. Control circuitry is used for switching the semiconductor switch on in response to a switching signal and for switching the semiconductor switch off in response to a deacti... | 07/16/1996 |
| 5532619 | Precision level shifter w/current mirror A level shifter circuit for converting an input signal referenced to the least positive power supply (typically ground) to an output signal referenced to a higher, more usable voltage. The level shifter circuit generally includes a current mirror arrangem... | 07/02/1996 |
| 5506521 | ECL driver with adjustable rise and fall times, and method therefor A series-gated ECL driver, such as a series-gated ECL cut-off driver, is provided with settable output rise time and settable output fall time, in order to reduce noise at the output of the driver while limiting the delay resulting from such noise reducti... | 04/09/1996 |
| 5495099 | High speed super push-pull logic (SPL) circuit using bipolar technology A PNP bipolar transistor is connected to both ends of a resistive element of a Super Push-Pull Logic (SPL) circuit so as to place an emitter thereof at the side of a power supply source. Resistive elements and an NPN bipolar transistor forms a bias circui... | 02/27/1996 |
| 5473272 | Digital differential amplifier switching stage with current switch A digital switching stage includes a differential amplifier having a first and a second differential amplifier branch. A first resistor is connected in the first differential amplifier branch and has a first terminal and a second terminal. The first termi... | 12/05/1995 |
| 5463332 | Multiple differential input ECL or/nor gate An ECL circuit including first and second transistors driven by differential input signals. Both transistors include emitters connected to a common node. The first transistor has a first collector connected to a first output terminal and a first base conn... | 10/31/1995 |
| 5438284 | Basic logic circuit having multi-emitter transistor A basic logic circuit 10 which functions as a data selector consists of a basic circuit 11, a HET (hot electron transistor) 12, the first and second emitters of which are connected to the first emitter of a HET 16 and a data input end A respectively, and ... | 08/01/1995 |
| 5382843 | One or two transistor logic with temperature compensation and minimized supply voltage The logic ensures a smallest achievable propagation delay, lowest achievable supply voltage and low power consumption. Silicon or GaAs can be used. The gain of each gate is preferably low. A local supply voltage E depends on temperature and is provided fo... | 01/17/1995 |
| 5357151 | Intrinsically safe logic and-circuit having two inputs A logic AND circuit comprises, in a cascade arrangement, a threshold oscillator having a power supply input connected to a first circuit input and a clamping amplifier providing an output signal only when simultaneously the voltage on a second circuit inp... | 10/18/1994 |
| 5317208 | Integrated circuit employing inverse transistors Relatively constant current sources and current mirrors are formed with vertical bipolar transistors operated in the inverse mode. In one embodiment of the invention, an integrated circuit current mirror includes a dual collector vertical NPN bipolar tran... | 05/31/1994 |
| 5309044 | Modified widlar source and logic circuit using same A modified Widlar current source (74) includes a first transistor (84) having a collector providing a first terminal of the current source (74), a base, and an emitter connected through a first resistor (85) to a second terminal of the current source (74)... | 05/03/1994 |
| 5300827 | Noise immune NTL logic network An NTL (Non-Threshold Logic) NOR logic circuit exhibits a small signal swing, effected by establishing a pseudo threshold level by utilizing a low voltage power supply and a combination of NPN bipolar devices arranged to provide an essentially noise immun... | 04/05/1994 |
| 5281871 | Majority logic circuit A logic circuit including a transistor having a control electrode connected to three input terminals at which are received three respective input signals, each having, selectively, either a high or a low voltage level, and first and second electrodes, one... | 01/25/1994 |
| 5260609 | Logic circuit uising transistor having negative differential conductance A logic circuit first, second and third input terminals, an output terminal, a load resistance element, and a transistor having a negative differential conductance. The collector is connected to the output terminal and coupled to a first power source via ... | 11/09/1993 |
| 5214318 | Semiconductor integrated circuit device having a signal transmission line pair interconnected by propagation delay time control resistance A semiconductor integrated circuit device has, in one embodiment, a pair of signal transmission lines formed over and insulated from a semiconductor substrate, a first circuit formed in the semiconductor substrate and electrically connected with one end o... | 05/25/1993 |
| 5126597 | High speed IC device empolying non-threshold logic circuits to provide logic gates having different power and load requirements A unitary semiconductor integrated circuit is constructed using a non-threshold logic NTL circuit for a circuit which has a light load or a light load driving capability, using an NTL circuit additionally provided with an emitter-follower output circuit f... | 06/30/1992 |
| 5121004 | Input buffer with temperature compensated hysteresis and thresholds, including negative input voltage protection An input buffer apparatus receives data from a single ended transmission line and provides an output signal in one or two states in response to the state of the signal on the input. The apparatus has hysteresis with temperature stable upper and lower thre... | 06/09/1992 |
| 5091659 | Composite logic gate circuit with means to reduce voltage required by logic transistors from external source A logic circuit has a plurality of serially connected logic units wherein each unit is a gate comprising a resistor serially connected to a combination of a plurality of transistors connected together in parallel. The transistors of the logic circuit are ... | 02/25/1992 |
| 5089724 | High-speed low-power ECL/NTL circuits with AC-coupled complementary push-pull output stage High-speed low-power emitter coupled logic (ECL) and non-threshold logic (NTL) circuits are disclosed wherein an ac-coupled complementary push-pull output stage is utilized. The circuits utilize two capacitors to couple an ac-pulse derived from a replica ... | 02/18/1992 |
| 5079448 | Emitter-follower circuit in which load capacitance is quickly discharged An emitter-follower circuit suitable for use in an emitter-coupled logic circuit includes an emitter-follower NPN transistor having a first emitter and a second emitter, a biasing circuit having a diode and a first resistor, a load capacitance discharging... | 01/07/1992 |
| 5039874 | Method and apparatus for driving an integrated-circuit output pad A binarily programmable IC output pad driver includes a pair of FET drivers, one of which is always drivingly connected to the chip output pad. A second driver is selectively connected to the pad for driving the same in concert with the first driver in or... | 08/13/1991 |
| 5032744 | High speed comparator with offset cancellation A regenerative latch includes a fully differential amplifier with two inputs and two outputs and two positive feedback paths, each path coupling each of the two outputs to one of the two inputs through a capacitor. Hence, during the reset phase, the two c... | 07/16/1991 |
| 5015874 | Status holding circuit and logic circuit using the same A status holding circuit includes a transistor having an emitter coupled to a negative power source, a collector and a base coupled to said collector and having a negative conductance range, first and second input terminals to which first and second input... | 05/14/1991 |
| 5012129 | Line driver A line driver is provided for driving a twisted pair of lines with complementary data signals. The driver comprises NPN and PNP transistors arranged as complementary emitter followers with their emitters connected to a biasing resistor network to provide ... | 04/30/1991 |
| 4897705 | Lateral bipolar transistor for logic circuit A semiconductor integrated circuit device comprises a lateral pnp transistor having a base to which an input signal is applied and a first npn transistor having a base to which a potential appearing at the emitter of the pnp transistor is applied, which t... | 01/30/1990 |
| 4891729 | Semiconductor integrated-circuit apparatus A semiconductor integrated-circuit apparatus includes a electro-conductive layer formed on a substrate, a plurality of internal cells formed on the electro-conductive layer, a plurality of bonding pads arranged around the internal cells, and a plurality o... | 01/02/1990 |
| 4857762 | Digital 2-of-3 selection and output circuit For the operation of a technical system having increased safety requirements, all of the apparatus for increasing the safety and the availbility are provided in triple redundancy. As selection and output circuit, three redundant data channels (DE1, DE2, D... | 08/15/1989 |