Did You Know...
...that the video game, Pong, was invented by a guy who graduated at the bottom of his engineering class? Nolan Bushnell spent more time running the games at a local amusement park than he did on his studies at the University of Utah. His dreams of working for Disney's amusement empire were dashed when the company wouldn't hire him. Taking a boring job, Nolan daydreamed about electronic versions of popular games. He invented Pong, the first video game, and went on to found Atari Co.
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| Number | Title | Issue Date |
| 7186001 | LED flashlight having clip extending from frame A flashlight having a light-emitting diode light source with first and second leads extending therefrom, a power source, a power source frame enclosing at least a portion of the power source; a housing containing the light source and power source, a switch located a... | 03/06/2007 |
| 7176739 | Circuit to improve data bus performance A circuit comprising an active pull-up device coupled to a level shift circuit is coupled to a one-wire bus to allow communication devices coupled to the bus to better detect digital communication signals propagating through the bus. The level shift circuit provides... | 02/13/2007 |
| 7106093 | Semiconductor device A semiconductor device having a plurality of cascaded IC's (14, 15, 16), wherein the matching impedance between a signal transmission path (12) connected to an external signal transmission path and an input-side or output-side IC (14, 16) is set... | 09/12/2006 |
| 7088161 | Semiconductor integrated circuit with reduced leakage current A combination circuit is switched between an active state where power is supplied thereto in response to a control signal and an inactive state where power thereto is interrupted. A flip-flop circuit connected to an input terminal of the combination circuit stores a... | 08/08/2006 |
| 6933751 | Integrated Schottky transistor logic configuration A logic gate is described that has an N-type region, which may be an N-well or N-tub, forming a cathode of one or more Schottky diodes and a collector of an NPN bipolar transistor. Accordingly, the Schottly diodes and transistor do not need to be isolated from one a... | 08/23/2005 |
| 6727730 | High speed on-chip signaling system and method An improved signaling system and method are provided that uses transconductance signaling rather than voltage or current signaling. A transient voltage applied to a first end of a conductor can produce a varying current placed into a low impedance node at a second e... | 04/27/2004 |
| 6529034 | Integrated series schottky and FET to allow negative drain voltage A high side driver chip for MOSgated devices which controls a non resistive, or non inductive load has a vertical conduction refresh MOSFET integrated into the chip for connecting a Vs node to ground to discharge the load capacitance. A Schottk... | 03/04/2003 |
| 6366142 | Buffer circuit having Schottky gate transistors adjusting amplitude of output signal A buffer circuit having an input and output terminals includes a first Schottky gate transistor connected between a voltage setting node and ground, a load device connected between a power supply and the voltage setting node, a second Schottky gate transi... | 04/02/2002 |
| 6111430 | Circuit for interfacing a first type of logic circuit with a second type of logic circuit A circuit for interfacing CMOS logic devices, having an output level range associated therewith, with MESFET logic devices, having an input level range associated therewith, comprises a depletion mode MESFET device, coupled between at least one CMOS devic... | 08/29/2000 |
| 6078194 | Logic gates for reducing power consumption of gallium arsenide integrated circuits A method and apparatus for reducing power consumption by gallium arsenide integrated circuits divides the integrated circuit into higher and lower frequency sections. The high frequency sections require a substantial portion of the system clock period to ... | 06/20/2000 |
| 5909128 | FETs logic circuit A semiconductor integrated circuit having a field effect transistor formed on a compound semiconductor is disclosed, that comprises a first power supply, a second power supply for supplying a voltage lower than a voltage that the first power supplies, and... | 06/01/1999 |
| 5592108 | Interface circuit adapted for connection to following circuit using metal-semiconductor type transistor An interface circuit includes an input current limiting circuit for limiting a current of an input signal fed from a preceding circuit, thereby outputting the current-limited signal to a following circuit which is constituted using a MES type transistor. ... | 01/07/1997 |
| 5420527 | Temperature and supply insensitive TTL or CMOS to 0/-5 V translator Voltage translator apparatus to translate TTL or CMOS logic level inputs to 0/-5 V logic levels that is insensitive to temperative and bias supply variation. A unique circuit structure comprises a level shift stage employing transistors configured to leve... | 05/30/1995 |
| 5343091 | Semiconductor logic integrated circuit having improved noise margin over DCFL circuits A semiconductor logic integrated circuit of this invention comprises a source follower-type switching stage A in which loads MESFET-QLU and MESFET-QLD are provided for the drain and source of a switching MESFET-QSW, respec... | 08/30/1994 |
| 5293085 | GaAs driver circuit The invention comprises a gallium arsenide driver with float capability for logic high and logic low signals including logic means for receiving an input signal and providing logic high and low signals therefrom. Level shift means responsive to the high a... | 03/08/1994 |
| 5256915 | Compound semiconductor integrated circuit A semiconductor integrated circuit produces a driving signal for driving a load. The semiconductor integrated circuit includes a compound semiconductor substrate, a logic part including at least a first field effect transistor formed on the compound semic... | 10/26/1993 |
| 5233205 | Quantum wave circuit A novel concept and structure of a semiconductor circuit are disclosed which utilize the fact that the interaction between the carriers such as electrons and holes supplied in a meso-scopic region and the potential field formed in the meso-scopic region l... | 08/03/1993 |
| 5191238 | Dual FET circuits having floating voltage bias Prior art single FET switches suffer the disadvantage of uncertainties in the turning on and off thereof due to the high back bias voltage required. In the present system, by using a dual FET configuration, with the respective source regions of the FETs c... | 03/02/1993 |
| 5030852 | Quasicomplementary MESFET logic circuit with increased noise imunity Disclosed is a logic circuit performing a quasi-complementary operation. This logic circuit includes a load transistor having a drain connected to a first power supply, a drive transistor having a source connected to a second power supply, a level shift d... | 07/09/1991 |
| 4969018 | Quantum-well logic using self-generated potentials A new kind of electronic logic circuit, wherein potential wells (e.g. islands of GaAs in an AlGaAs lattice) are made small enough that the energy levels of carriers within the wells are discretely quantized. This means that, when the bias between the well... | 11/06/1990 |
| 4968904 | MESFET circuit with threshold-compensated source-follower output A logic circuit made up of FET's is disclosed in which an output interface circuit is formed of a source follower circuit including a signal transmitting FET and a constant-current supplying FET, and a ratio of the gate width of the signal transmitting FE... | 11/06/1990 |
| 4967105 | Load current control-type logic circuit An inverter portion, which is to be basic logic circuit, includes switching FETs corresponding to input terminals and a load FET. A logic signal inputted into each of the input terminals drives each corresponding switching FET, thereby to output a prescri... | 10/30/1990 |
| 4965863 | Gallium arsenide depletion made MESFIT logic cell A gallium arsenide logic design system is described for designing custom or semi-custom LSI integrated circuits using standard cells from a cell library. D-MESFET transistors and Schottky diodes are used for implementing the cell types in gallium arsenide... | 10/23/1990 |
| 4924116 | Feedback source coupled FET logic A feedback source coupled FET logic (FSCL) circuit having an internal reference voltage provided by the output of one FET of a pair of FET's, connected via a source follower FET to the input of the other FET of the pair. FSCL logic circuitry has advantage... | 05/08/1990 |
| 4897565 | Logic circuit using Schottky barrier FETs Disclosed is a logic circuit using Schottky barrier FETs comprising a plurality of circuits connected in series between first and second power supply terminals, the plurality of circuits being DCFL and/or SCFL circuits, the DCFL circuit containing a switc... | 01/30/1990 |
| 4896057 | High-speed dynamic domino circuit implemented with gaas mesfets A dynamic logic circuit (AND or OR) utilizes one depletion-mode metal-semiconductor FET for precharging an internal node A, and a plurality of the same type of FETs in series, or a FET in parallel with one or more of the series connected FETs for implemen... | 01/23/1990 |
| 4845681 | GaAs SCFL RAM A GaAs SCFL RAM having a unique three-voltage-level write circuit, direct-read circuitry with only one gate delay, diode-coupled FET logic cells, and peripheral circuitry with SCFL gates. The memory module architecture and plan of the RAM allow for severa... | 07/04/1989 |
| 4831284 | Two level differential current switch MESFET logic A GaAs differential current switch (DCS) logic family is disclosed. Two cross-coupled, push-pull output buffer stages are coupled to the DCS logic circuit to increase the gain and to improve noise margins. The circuit is compatible with other GaAs logic f... | 05/16/1989 |
| 4810969 | High speed logic circuit having feedback to prevent current in the output stage An improved FET capacitance driver logic circuit having an inverter feedback stage 22 connected from output to input of output FET 23 to allow the output FET to have a large capacitance charging current surge followed by a reduced conduction thereafter.... | 03/07/1989 |
| 4760288 | Temperature compensation for semiconductor logic gates A temperature compensation system for semiconductor digital or analog circuits where the temperature compensation is accomplished by two depletion mode MESFETs. A first MESFET is adapted to operate as a level shifter in the linear region of operation only... | 07/26/1988 |
| 4755695 | Logic gate having low power consumption A semiconductor logic circuit device uses a plurality of MESFETs and a Schottky barrier diode (11) interconnected in such a way that one MESFET forms a switching input (9), another MESFET may form a load (8), still another MESFET forms a buffer amplifier ... | 07/05/1988 |
| 4737837 | Ring topology for an integrated circuit logic cell An improved topology for a multi-input Boolean logic circuit whereby the circuit can be realized in integrated circuit form while consuming less area on the semiconductor wafer and exhibiting lower parasitic capacitance than equivalent integrated circuits... | 04/12/1988 |
| 4713676 | Logic circuit arrangement with field effect transistors matched thereto A logic circuit arrangement has direct coupling of a drain and gate of two successive stages. At least one of the FET's has a buried electrode layer with adjacent, non-tunnelable insulator layers. The electrode layer is electrically charged from the outsi... | 12/15/1987 |
| 4712023 | Buffered FET logic gate using depletion-mode MESFET's. A buffered FET logic gate circuit has a bias diode (9), which is connected across the gate and the source of a current source FET (4) of a buffer part (3, 4), and a capacitor (8), which is connected across the gate of said FET (4) and an input terminal (V... | 12/08/1987 |
| 4703204 | Logic coincidence gate and logic sequential circuits using said coincidence gate The invention relates to a coincidence gate, whose output only changes state if the inputs are of the same logic level. It has two parallel-connected NOT circuits, each constituted by a transistor, whose source is at earth and the drain supplied by a resi... | 10/27/1987 |
| 4682055 | CFET inverter having equal output signal rise and fall times by adjustment of the pull-up and pull-down transconductances A circuit comprises P-channel and N-channel field effect transistors. A conduction electrode, such as a drain, of one of the transistors is coupled to a conduction electrode of the other transistor. Means are provided for ensuring that the currents in the... | 07/21/1987 |
| 4661725 | Elementary logic circuit obtained by means of field effect transistors of gallium arsenide and compatible with the ECL 100 K technology An elementary logic circuit obtained by means of Schottky barrier field effect transistors of gallium arsenide includes a differential amplifier, whose first branch, controlled by the input signal E, supplies an output signal S1, and whose seco... | 04/28/1987 |
| 4638188 | Phase modulated pulse logic for gallium arsenide A logic system preferably for gallium arsenide integrated circuits uses dynamic pulsed logic gates which switch on each clock pulse, with the logical state of an output or data line being indicated by the phase of the pulsed output, which may be shifted o... | 01/20/1987 |
| 4558235 | MESFET logic gate having both DC and AC level shift coupling to the output A MESFET logic gate wherein a logic switch node is both a-c coupled to the output node, preferably by a capacitor network and is also separately DC coupled to it, preferably by a voltage level shifter circuit. The direct capacitative coupling increases th... | 12/10/1985 |
| 4518871 | Ga/As NOR/NAND gate circuit using enhancement mode FET's In an integrated logic circuit employing normally-off type FET's, it is difficult, but desirable to realize a NAND gate due to unwanted flow of the forward current to the next stage. In accordance with the invention, a stable NAND gate operation can be re... | 05/21/1985 |
