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| Number | Title | Issue Date |
| 7868643 | Proportional regulation for optimized current sensor performance An integrated circuit device comprises a first transistor having a gate coupled to an output of a first operational amplifier, a second transistor having a threshold voltage proportional to a threshold voltage of the first transistor, the second transistor having a ... | 01/11/2011 |
| 7863925 | Test circuit, wafer, measuring apparatus, and measuring method There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequential... | 01/04/2011 |
| 7859290 | Apparatus and method for measuring effective channel An apparatus and a method for measuring an effective channel. The apparatus includes an automatic measurement system including a testing terminal for a substrate, a switching matrix disposed at one side of the automatic measurement system, a leakage current measurin... | 12/28/2010 |
| 7859291 | Method of measuring on-resistance in backside drain wafer A method of measuring on-resistance in a backside drain wafer includes providing a wafer having a first MOS transistor and a second MOS transistor each having a source and also sharing a drain provided at a backside of the wafer, and then forming a current flow path... | 12/28/2010 |
| 7839160 | Stress programming of transistors Methods for stressing transistors in order to program the transistors and for determining whether such transistors have indeed been programmed are described herein. The novel methods may include initially stressing a transistor by applying to the transistor a voltag... | 11/23/2010 |
| 7768290 | Circuit and apparatus for detecting electric current A circuit for detecting electric current is provided. The circuit includes a MOSFET having a gate terminal, a source terminal, and a drain terminal, the drain terminal and the source terminal are connected in series in a loop through which an electric current flows.... | 08/03/2010 |
| 7764080 | Methods of operating an electronic circuit for measurement of transistor variability and the like An electronic circuit includes an output terminal and at least a first measuring FET. The second drain-source terminals of a plurality of FETS to be tested are interconnected with the first drain-source terminal of the first measuring FET and the output terminal. Th... | 07/27/2010 |
| 7759963 | Method for determining threshold voltage variation using a device array A method of measuring threshold voltage variation using a device array provides accurate threshold voltage distribution values for process verification and improvement. The characterization array imposes a fixed drain-source voltage and a constant channel current at... | 07/20/2010 |
| 7737717 | Current-voltage-based method for evaluating thin dielectrics based on interface traps A method for evaluating gate dielectrics (100) includes providing a test structure (101). The test structure includes a gate stack that includes a gate electrode on a gate dielectric on a substrate, and at least one diffusion region diffused in the sub... | 06/15/2010 |
| 7692442 | Apparatus for detecting a current and temperature for an integrated circuit The present invention discloses an apparatus for detecting a current flowing from a first node to a second node. One or more MOS devices are serially coupled between the first and second nodes. Each of the MOS devices has its body connected to its source and its gat... | 04/06/2010 |
| 7671621 | Closed loop feedback control of integrated circuits Systems and methods for closed loop feedback control of integrated circuits. In one embodiment a plurality of controllable inputs to an integrated circuit is adjusted to achieve a predetermined value of a dynamic operating indicator of the integrated circuit. An ope... | 03/02/2010 |
| 7656183 | Method to extract gate to source/drain and overlap capacitances and test key structure therefor A method to extract gate to source/drain and overlap capacitances is disclosed. A first capacitance of a first test key having a reference structure and a second capacitance of a second test key having a novel structure are measured. The second test key may comprise... | 02/02/2010 |
| 7619435 | Method and system for derivation of breakdown voltage for MOS integrated circuit devices A method and system for multi-point (e.g., double-point) GOI test that can efficiently judge failure modes by testing only two points. We can measure leakage currents at only two voltages, which are the cut points of mode A-B and B-C, instead of the whole ramped vol... | 11/17/2009 |
| 7616022 | Circuit and method for detecting skew of transistors in a semiconductor device A circuit and method for easily detecting skew of a transistor within a semiconductor device are provided. The circuit for detecting the skew of the transistor includes a linear voltage generating unit for outputting a linear voltage by using a first supply voltage,... | 11/10/2009 |
| 7605598 | Undercurrent sense arrangement and method An on-state low current detector uses a transistor with main (32) and sense (34) cells. Feedback circuit (36) acts to keep the voltage across main cells (32) at a substantially constant target value when the load current falls below a lev... | 10/20/2009 |
| 7602206 | Method of forming a transistor diagnostic circuit In one embodiment, a diagnostic circuit is used to test the on-resistance of a transistor. ... | 10/13/2009 |
| 7598764 | Transistor arrangement A transistor arrangement having a multiplicity of transistors interconnected with one another, having a noise detection device, which is set up for detecting the 1/f noise of at least one portion of the transistors, having a selection device, which is set up for sel... | 10/06/2009 |
| 7589550 | Semiconductor device test system having reduced current leakage A test circuit tests a device under test (DUT) uses a first switching device and a second switching device. The device under test (DUT) has a terminal for receiving a test signal. The first switching device has an output terminal for use in coupling the test signal ... | 09/15/2009 |
| 7589551 | On-wafer AC stress test circuit To make an alternating current (AC) stress test easier to perform in a wafer, an AC stress test circuit for performing the AC stress test on a test device fabricated in a test region of the wafer includes an oscillator module fabricated in the test region, a diode m... | 09/15/2009 |
| 7586322 | Test structure and method for measuring mismatch and well proximity effects The present invention is directed to a test structure and method to determine the effects of the well proximity effect on the gate threshold voltage of FETs at different distances from the edge of the well. ... | 09/08/2009 |
| 7579859 | Method for determining time dependent dielectric breakdown The current invention provides a method of determining the lifetime of a semiconductor device due to time dependent dielectric breakdown (TDDB). This method includes providing a plurality of samples of dielectric layer disposed as a gate dielectric layer of a MOS tr... | 08/25/2009 |
| 7573285 | Multiple point gate oxide integrity test method and system for the manufacture of semiconductor integrated circuits A method for testing a semiconductor wafer using an in-line process control, e.g., within one or more manufacturing processes in a wafer fabrication facility and/or test/sort operation. The method includes transferring a semiconductor wafer to a test station. The me... | 08/11/2009 |
| 7560951 | Characterization array circuit A characterization array circuit provides accurate threshold voltage distribution values for process verification and improvement. The characterization array includes a circuit for imposing a fixed drain-source voltage and a constant channel current at individual de... | 07/14/2009 |
| 7557599 | Apparatus and method for determining a current through a power semiconductor component A circuit configuration includes a power switch and a measuring configuration for detecting the load current through the power switch. The circuit configuration utilizes a voltage drop across a connecting line, in particular a bonding wire, which is connected in ser... | 07/07/2009 |
| 7550990 | Method and apparatus for testing integrated circuits for susceptibility to latch-up In an example embodiment, there is a test module for testing the susceptibility of an integrated circuit design to latch-up. The test module comprises a plurality of test blocks, connected in parallel. Each test block includes an injector block for applying a stress... | 06/23/2009 |
| 7535246 | Computing the characteristics of a field-effect-transistor (FET) A coefficient indicating the relationship between a measurement voltage of voltage measuring unit and a voltage drop in a drain bias voltage due to drain current is determined based on at least an S parameter of a measuring system and an input impedance of the measu... | 05/19/2009 |
| 7525333 | Current sense circuit A current sense circuit that measures current passing through a multi-transistor switch, each transistor in configured in parallel. The current sense circuit mirrors the current in the switch through a mirror current branch that includes a mirror transistor. The cur... | 04/28/2009 |
| 7521955 | Method and system for device characterization with array and decoder A system and method for testing devices. The system includes a plurality of pads and a decoder coupled to a plurality of devices. The decoder is configured to receive a plurality of selection signals from the plurality of pads and select a device from the plurality ... | 04/21/2009 |
| 7511527 | Methods and apparatus to test power transistors Methods and apparatus to test power transistors of integrated circuits on a wafer are disclosed. An example method comprises measuring a drain-source on resistance of a first transistor, measuring a drain-source on resistance of a second transistor, computing a scal... | 03/31/2009 |
| 7489157 | System and method for automatically measuring carrier density distribution by using capacitance-voltage characteristics of a MOS transistor device Disclosed is a system and method for automatically measuring carrier density distribution by using capacitance-voltage characteristics of a MOS transistor device. System comprises an automatic probe station for measurement of an object wafer, the automatic probe sta... | 02/10/2009 |
| 7471102 | Measuring threshold voltage of transistors in a circuit In one embodiment, the present invention includes an oscillator to generate a first frequency and a second frequency. The oscillator includes a plurality of stage cells, each stage cell including a first transistor of a first polarity and a second transistor of a se... | 12/30/2008 |
| 7439755 | Electronic circuit for measurement of transistor variability and the like An electronic circuit includes an output terminal and at least a first measuring FET. The second drain-source terminals of a plurality of FETS to be tested are interconnected with the first drain-source terminal of the first measuring FET and the output terminal. Th... | 10/21/2008 |
| 7436200 | Apparatus for testing a power supply The present invention is an apparatus for testing a power supply. A power supply testing apparatus may include a remote load which may sink an adjustable amount of current with an adjustable slew rate and may test the response of the power supply to determine its op... | 10/14/2008 |
| 7436169 | Mechanical stress characterization in semiconductor device Methods of characterizing a mechanical stress level in a stressed layer of a transistor and a mechanical stress characterizing test structure are disclosed. In one embodiment, the test structure includes a first test transistor including a first stress level; and at... | 10/14/2008 |
| 7429869 | Method for measuring FET characteristics A coefficient indicating the relationship between a measurement voltage of voltage measuring unit and a voltage drop in a drain bias voltage due to drain current is determined based on an S parameter of a bias tee and an input impedance of the measuring unit. A volt... | 09/30/2008 |
| 7423446 | Characterization array and method for determining threshold voltage variation A method for determining threshold voltage variation rapidly provides accurate threshold voltage distribution values for process verification and improvement. The method operates a characterization away including a circuit for imposing a fixed drain-source voltage a... | 09/09/2008 |
| 7408372 | Method and apparatus for measuring device mismatches A test structure for statistical characterization of local device mismatches contains densely populated SRAM devices arranged in a row/column addressable array that enables resource sharing of many devices. The test structure includes a built-in sensing mechanism to... | 08/05/2008 |
| 7405090 | Method of measuring an effective channel length and an overlap length in a metal-oxide semiconductor field effect transistor In a method of measuring an effective channel length and an overlap length, first to third metal-oxide semiconductor field effect transistors (MOSFETs) including first to third gate patterns, respectively, are formed on a substrate. A parasitic capacitance between t... | 07/29/2008 |
| 7403031 | Measurement apparatus for FET characteristics A measurement apparatus for FET characteristics comprises a divider connected to a pulse generator for dividing pulses from the pulse generator into first and second pulses; a first SMU; a first switch for selecting pulses from the divider or voltage from the first ... | 07/22/2008 |
| 7397265 | MOS transistor characteristic detection apparatus and CMOS circuit characteristic automatic adjustment apparatus A CMOS circuit characteristic automatic adjustment apparatus includes a replica signal generation circuit for generating a replica signal capable of minimizing a drain voltage of an MOS transistor in a target circuit, a replica circuit for receiving the replica sign... | 07/08/2008 |
