Class 257/E29.281 - For preventing kink or snapback effect (e.g., discharging minority carriers of channel region for preventing bipolar effect) (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.276. This subclass
No. of patents: 217
Last issue date: 03/09/2004

«First «Previous1 2 3 4 5 6 Next»Last»

Number	Title	Issue Date
6703264	Method of manufacturing a semiconductor device A method of manufacturing a semiconductor device that forms laminate layers includes the steps of reducing contamination containing the single bond of carbon on at least one part of a surface on which the laminate films are formed by activated hydrogen be...	03/09/2004
6703280	SOI semiconductor integrated circuit for eliminating floating body effects in SOI MOSFETs and method of fabricating the same A silicon-on-insulator (SOI) integrated circuit and a method of fabricating the SOI integrated circuit are provided. At least one isolated transistor active region and a body line are formed on an SOI substrate. The transistor active region and the body l...	03/09/2004
6700430	Method to reduce time to dynamic steady-state condition A method for reducing the time for a partially depleted/silicon-on-insulator (PD/SOI) based circuit to reach a dynamic steady state pre-conditions the PD/SOI-based circuit by initially charging the circuit at a voltage greater than the normal operating vo...	03/02/2004
6693326	Semiconductor device of SOI structure A semiconductor device of SOI structure comprises a surface semiconductor layer in a floating state, which is stacked on a buried insulating film so as to construct an SOI substrate, source/drain regions of second conductivity type which are formed in the...	02/17/2004
6693328	Semiconductor device formed in a semiconductor layer provided on an insulating film A semiconductor device includes an insulating film provided on a semiconductor substrate and a semiconductor layer provided on the insulating film. An element separating insulating film separates element area. A first gate insulating film is provided on t...	02/17/2004
6693329	Semiconductor devices having a field effect transistor and a bi-polar transistor A semiconductor device may include an element isolation region 14, an npn-type bipolar transistor 200, and a p-type field effect transistor 100, which are formed on a SOI substrate. The bi-polar transistor 200 and the field effect transistor 100 are forme...	02/17/2004
6677190	Self-aligned body contact in a semiconductor device A method of forming an electrical contact is provided. The method includes forming a gate dielectric layer adjacent a body region of a transistor structure and forming a layer of dielectric material at least partially defining a trench adjacent the body r...	01/13/2004
6677645	Body contact MOSFET A body contact structure utilizing an insulating structure between the body contact portion of the active area and the transistor portion of the active area is disclosed. In one embodiment, the present invention substitutes an insulator for at least a por...	01/13/2004
6673661	Self-aligned method for forming dual gate thin film transistor (TFT) device A method for fabricating a dual gate thin film transistor (TFT) device provides for forming a pair of source/drain layers self-aligned with respect to a first gate electrode and forming a second gate electrode self-aligned with respect to both the pair of...	01/06/2004
6674127	Semiconductor integrated circuit A semiconductor integrated circuit includes: a logic circuit section including transistors formed on an SOI substrate; and a partially-depletion-type transistor, which is formed on the SOI substrate as a switching transistor for controlling ON/OFF states ...	01/06/2004
6674130	High performance PD SOI tunneling-biased MOSFET A new type of partially-depleted SOI MOSFET is described in which a tunneling connection between the gate and the base is introduced. This is achieved by using a gate dielectric whose thickness is below its tunneling threshold. The gate pedestal is made s...	01/06/2004
6670675	Deep trench body SOI contacts with epitaxial layer formation A silicon-on-insulation (SOI) body contact is formed within a device region of an SOI substrate so that no space of the SOI substrate is wasted for implementing a body contact. The body contact is formed by epitaxially growing silicon and depositing polys...	12/30/2003
6667517	Electrooptical device and electronic device An electrooptical device including a semiconductor device which is formed in a semiconductor layer on an insulating layer in such a manner that floating substrate effects which are essential in a SOI structure is suppressed without reducing the aperture r...	12/23/2003
6664150	Active well schemes for SOI technology A semiconductor device fabricated on a silicon-on-insulator substrate and having an active well scheme as well as methods, including a non-self-aligned and self-aligned, of fabricating such a device are disclosed herein. The semiconductor device includes ...	12/16/2003
6660598	Method of forming a fully-depleted SOI ( silicon-on-insulator) MOSFET having a thinned channel region A sub-0.05 μm channel length fully-depleted SOI MOSFET device having low source and drain resistance and minimal overlap capacitance and a method of fabricating the same are provided. In accordance with the method of the present invention, at least one d...	12/09/2003
6653221	Method of forming a ground in SOI structures An SOI device structure is provided which facilitates mitigation of charge build up caused by floating body effects. A ground contact is formed from a top insulating layer to a bottom silicon layer. The ground contact extends through the insulating layer,...	11/25/2003
6653656	Semiconductor device formed on insulating layer and method of manufacturing the same In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an uppe...	11/25/2003
6649460	Fabricating a substantially self-aligned MOSFET The present invention includes methods and structures for forming at least a substantially self-aligned MOSFET. According to the present invention, a method of fabricating a semiconductor device includes providing a substrate; providing first materials (s...	11/18/2003
6642119	Silicide MOSFET architecture and method of manufacture The present invention relates to a method of forming a transistor and a transistor structure. The invention comprises forming the transistor using a double silicide process which reduces resistance and reduces the floating-body-effect when employed in con...	11/04/2003
6642579	Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET As the silicon-on-insulator field effect transistor (SOI FET) CMOS technology continues migrating towards thinner SOI thicknesses to reduce the parasitic capacitance and improve the short channel effects, it is known that the body resistance of body conta...	11/04/2003
6635542	Compact body for silicon-on-insulator transistors requiring no additional layout area A non-critical block mask exposes one of the source and drain in an SOI FET, which is implanted with a leakage implant that increases the leakage in the exposed element, thus providing a conductive path to draw away holes from the transistor body....	10/21/2003
6633066	CMOS integrated circuit devices and substrates having unstrained silicon active layers CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si	10/14/2003
6630376	Body-tied-to-body SOI CMOS inverter circuit An SOI CMOS inverter circuit in which a silicide layer in combination with body tie regions tie a p-type body region and an n-type body region together. At the same time, however, the body regions remain floating electrically so that the benefits of SOI a...	10/07/2003
6627952	Silicon oxide insulator (SOI) semiconductor having selectively linked body A silicon oxide insulator (SOI) device includes an SOI layer supported on a silicon substrate. A body region is disposed on the SOI layer, and the body region is characterized by a first conductivity type. Source and drain regions are juxtaposed with the ...	09/30/2003
6628159	SOI voltage-tolerant body-coupled pass transistor A method and device for A pass transistor device which includes a source; a drain opposite the source, a body between the source and the drain, and a circuit control network connected between the drain and the source, wherein the circuit control network c...	09/30/2003
6627505	Method of producing SOI MOSFET having threshold voltage of central and edge regions in opposite directions A method of producing a SOI MOSFET which includes a fully depleted channel region of a first conductivity type formed in a top semiconductor layer disposed on an insulative substrate, source/drain regions of a second conductivity type formed to sandwich t...	09/30/2003
6624475	SOI low capacitance body contact An FET device and method of making comprising a first dielectric layer; a substrate layer on the dielectric layer; a channel region of a first conductivity type formed in the substrate layer; a gate formed above the substrate layer over the channel region...	09/23/2003
6624663	Low threshold voltage silicon-on-insulator clock gates A clock driver is disclosed that minimizes propagation delay, and thus improves the integrity of a clock distribution network. The clock driver preferably is implemented with silicon-on-insulator (SOI) technology, and comprises an inverter with an nFET an...	09/23/2003
6621101	Thin-film transistor The present invention provides, in a TFT, a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite the source region...	09/16/2003
6611027	Protection transistor with improved edge structure A metal-oxide-semiconductor protection transistor is formed in an active region of a semiconductor layer. The active region includes source and drain diffusion layers, which may be partly silicided, and a body region. A gate electrode extends across the a...	08/26/2003
6611300	Semiconductor element and liquid crystal display device using the same To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode. A thin polysilicon film 10 is provided with a p-type semiconductor region 13 in contact with a channel region 14. The p-type semicon...	08/26/2003
6583474	Semiconductor device There is provided a semiconductor device having a new structure which allows a high reliability and a high field effect mobility to be realized in the same time. In an insulated gate transistor having an SOI structure utilizing a mono-crystal semiconducto...	06/24/2003
6580129	Thin-film transistor and its manufacturing method The present invention provides, in a TFT, a gate electrode and a channel domain that are plurally divided in the channel-length direction, a low-concentration domain that is formed between the divided channel domains, and a low-concentration drain domain ...	06/17/2003
6548356	Thin film transistor A semiconductor transistor comprising a substrate having an active layer formed thereon, a source and a drain formed in the active layer, a gate insulating layer formed on the active layer and a gate electrode formed on the insulating layer, wherein the g...	04/15/2003
6541821	SOI device with source/drain extensions and adjacent shallow pockets A Silicon-on-Insulator (SOI) transistor includes an intrinsic body layer that is fully depleted when in a conductive state. The transistor includes a shallow pocket of dopants adjacent to each of its source and drain regions. The shallow pockets are of a ...	04/01/2003
6538284	SOI device with body recombination region, and method A transistor on an SOI wafer has a subsurface recombination area within its body. The recombination area includes one or more doped subsurface islands, the doped islands having the same conductivity type as that of a source and a drain on opposite sides o...	03/25/2003
6537861	SOI transistor with body contact and method of forming same An SOI field effect transistor is provided comprising a body contact that is isolated by a shallow trench that is formed into the body portion of the transistor, thereby eliminating any increase in gate capacitance or delay. A method of forming such a tra...	03/25/2003
6531743	SOI MOS field effect transistor and manufacturing method therefor A device isolation region made up of a silicon oxide film, which is perfectly isolated up to the direction of the thickness of an SOI silicon layer, and an activation region of the SOI silicon layer, whose only ends are locally thinned, are formed on an S...	03/11/2003
6528851	Post-silicidation implant for introducing recombination center in body of SOI MOSFET A semiconductor-on-insulator (SOI) transistor is disclosed. The SOI transistor includes a source region, a drain region and a body region disposed therebetween, the body region including a gate disposed thereon, the source and drain regions including resp...	03/04/2003
6528830	Thin film transistor A semiconductor transistor comprising a substrate having an active layer formed thereon, a source and a drain formed in the active layer, a gate insulating layer formed on the active layer and a gate electrode formed on the insulating layer, wherein the a...	03/04/2003

«First «Previous1 2 3 4 5 6 Next»Last»

PatentStorm

Bizarre Patents

PatentStorm News

Class 257/E29.281 - For preventing kink or snapback effect (e.g., discharging minority carriers of channel region for preventing bipolar effect) (EPO)