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| Number | Title | Issue Date |
| 7180095 | Display device and manufacturing method thereof In a display device including thin film transistors formed on an insulation substrate, the thin film transistor includes a semiconductor layer, a gate electrode and a gate insulation film which is interposed between the semiconductor layer and the gate electrode. Th... | 02/20/2007 |
| 7180139 | Pixel structure A pixel structure controlled by a scan line and a data line on a substrate is provided. The pixel structure comprises a thin film transistor, a resistance wire, a first pixel electrode, and a second pixel electrode, which are disposed on the substrate. Additionally,... | 02/20/2007 |
| 7087505 | Semiconductor device including semiconductor thin films having different crystallinity, substrate of the same, and manufacturing method of the same, and liquid crystal display and manufacturing method of the same A method of manufacturing a thin-film semiconductor device substrate includes a step of forming a non-single crystalline semiconductor thin film on a base layer, and an annealing step of irradiating the non-single crystalline semiconductor thin film with an energy b... | 08/08/2006 |
| 6927435 | Semiconductor device and its production process A semiconductor device comprising a semiconductor substrate, gate insulators formed on the substrate, and gate electrodes formed on the gate insulators, the gate insulators which are mainly composed of a material selected from titanium oxide, zirconium oxide and haf... | 08/09/2005 |
| 6693324 | Semiconductor device having a thin film transistor and manufacturing method thereof A semiconductor layer has one end placed on top of a first conductive layer and in contact with the first conductive layer, and the other end placed on top of a second conductive layer and in contact with the second conductive layer. At the central portio... | 02/17/2004 |
| 6689649 | Methods of forming transistors An electrical interconnection method includes: a) providing two conductive layers separated by an insulating material on a semiconductor wafer; b) etching the conductive layers and insulating material to define and outwardly expose a sidewall of each cond... | 02/10/2004 |
| 6683350 | Transistor and method for manufacturing the same In a process for manufacturing a thin film transistor having a semiconductor layer constituting source and drain regions and a channel forming region, by the semiconductor layer being made thinner in the source and drain regions than in the channel formin... | 01/27/2004 |
| 6677191 | Method of producing a top-gate thin film transistor A method of producing a top gate thin-film transistor comprises the steps of forming doped silicon source and drain regions (6a,8a) on an insulating substrate (2) and subjecting the face of the substrate (2) on which the source and drain regions (6a,8a) a... | 01/13/2004 |
| 6677646 | Method and structure of a disposable reversed spacer process for high performance recessed channel CMOS A high-performance recessed channel CMOS device including an SOI layer having a recessed channel region and adjoining extension implant regions and optional halo implant regions; and at least one gate region present atop the SOI layer and a method for fab... | 01/13/2004 |
| 6673661 | Self-aligned method for forming dual gate thin film transistor (TFT) device A method for fabricating a dual gate thin film transistor (TFT) device provides for forming a pair of source/drain layers self-aligned with respect to a first gate electrode and forming a second gate electrode self-aligned with respect to both the pair of... | 01/06/2004 |
| 6664150 | Active well schemes for SOI technology A semiconductor device fabricated on a silicon-on-insulator substrate and having an active well scheme as well as methods, including a non-self-aligned and self-aligned, of fabricating such a device are disclosed herein. The semiconductor device includes ... | 12/16/2003 |
| 6656810 | Semiconductor device capable of reducing dispersion in electrical characteristics and operating at high speed and method for fabricating the same There is provided a semiconductor device capable of reducing dispersion in electrical characteristics, preventing occurrence of bridge shortcircuit in a silicide process and operating at high operating speed and method for fabricating the same. In a SOI s... | 12/02/2003 |
| 6649933 | Method of manufacturing thin film transistor liquid crystal display A manufacturing method and the structure of a thin film transistor liquid crystal display (TFT-LCD) are disclosed. The TFT-LCD uses metal electrodes as a mask to thoroughly remove the unwanted semiconductor layer during the etching process for forming the... | 11/18/2003 |
| 6645861 | Self-aligned silicide process for silicon sidewall source and drain contacts A method (and structure formed thereby) of forming a metal silicide contact on a non-planar silicon containing region having controlled consumption of the silicon containing region, includes forming a blanket metal layer over the silicon containing region... | 11/11/2003 |
| 6646307 | MOSFET having a double gate A double gate MOSFET. The MOSFET includes a bottom gate electrode and a bottom gate dielectric disposed over the bottom gate electrode. A semiconductor body region is disposed over the bottom gate dielectric and the bottom gate electrode, and disposed bet... | 11/11/2003 |
| 6645795 | Polysilicon doped transistor using silicon-on-insulator and double silicon-on-insulator Steep concentration gradients are achieved in semiconductor device of small sizes formed on SOI or double SOI wafers by using implanted polycrystalline material such as polysilicon as a solid diffusion source. Rapid diffusion of impurities along grain bou... | 11/11/2003 |
| 6642115 | Double-gate FET with planarized surfaces and self-aligned silicides It is, therefore, an object of the present invention to provide a structure and method for an integrated circuit comprising a first gate, a second gate, and source and drain regions adjacent the first and second gates, wherein the structure has a planar u... | 11/04/2003 |
| 6624482 | Method for creating a useful bipolar junction transistor from a parasitic bipolar junction transistor on a MOSFET The present invention creates a useful BJT by increasing the gain associated with the parasitic BJT on an SOI or bulk type MOSFET. This is done by masking those manufacturing steps that minimize the BJT's beta value, by intentionally increasing the beta v... | 09/23/2003 |
| 6614500 | Liquid crystal display having a dummy source pad and method for manufacturing the same An active panel of a liquid crystal display having a thin film transistor and a pixel electrode arranged in a matrix pattern has a double gate us line. On a substrate, a gate bus line, a gate electrode and a gate pad are formed using a first metal such as... | 09/02/2003 |
| 6614054 | Polysilicon thin film transistor used in a liquid crystal display and the fabricating method A thin film transistor includes a substrate having an upper side; a plurality of parallel-connected active layers supported on the upper side of the substrate; spaces defined between the substrate and the active layers; a first insulating layer on the plu... | 09/02/2003 |
| 6605494 | Method of fabricating thin film transistor In the method of fabricating a TFT in accordance with the present invention, a first semiconductor layer 37 to be used as a channel is formed on a portion of an insulating layer 35 in correspondence with an underlying gate electrode 33. A second semicondu... | 08/12/2003 |
| 6600197 | Thin film transistor having a heat sink that exhibits a high degree of heat dissipation effect In forming a pair of impurity regions in an active layer, an intrinsic or substantially intrinsic region having a double-sided comb shape is also formed by using a proper mask. The intrinsic or substantially intrinsic region is composed of a portion that ... | 07/29/2003 |
| 6573564 | Semiconductor device and fabrication method thereof To provide a semiconductor device having high mass production performance and high reliability and reproducibility by simple fabrication steps, in a constitution of a semiconductor device of a bottom gate type formed by a semiconductor layer having a crys... | 06/03/2003 |
| 6569718 | Top gate thin-film transistor and method of producing the same A method of producing a top gate thin-film transistor in which an insulated gate structure (14) is formed over an amorphous silicon layer with upper gate conductor (16) directly over the gate insulator layers. The gate conductor is patterned to be narrowe... | 05/27/2003 |
| 6566711 | Semiconductor device having interlayer insulating film An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the ... | 05/20/2003 |
| 6541313 | Transistor and process for fabricating the same A process for fabricating a thin film transistor, which comprises crystallizing an amorphous silicon film, forming thereon a gate insulating film and a gate electrode, implanting impurities in a self-aligned manner, adhering a coating containing a catalys... | 04/01/2003 |
| 6531743 | SOI MOS field effect transistor and manufacturing method therefor A device isolation region made up of a silicon oxide film, which is perfectly isolated up to the direction of the thickness of an SOI silicon layer, and an activation region of the SOI silicon layer, whose only ends are locally thinned, are formed on an S... | 03/11/2003 |
| 6525378 | Raised S/D region for optimal silicidation to control floating body effects in SOI devices A semiconductor device and a method of forming same are disclosed. The device includes an SOI wafer including a semiconductor layer, a substrate and a buried insulator layer therebetween. The semiconductor layer includes a source region, a drain region, a... | 02/25/2003 |
| 6521949 | SOI transistor with polysilicon seed Short channel effects are effectively suppressed by steep impurity concentration gradients which can be placed with improved accuracy of location and geometry while relaxing process tolerances by implanting impurities in a polysilicon seed adjacent a cond... | 02/18/2003 |
| 6521527 | Semiconductor device and method of fabricating the same Obtained are a semiconductor device which can prevent diffusion of an impurity contained in a gate electrode and a method of fabricating the same. In this semiconductor device, a gate oxide film and a P+ -type gate electrode which are formed on... | 02/18/2003 |
| 6511871 | Method of fabricating thin film transistor The present invention relates to a method of fabricating a thin film transistor in which a metal silicide line generated from Metal Induced Lateral Crystallization is located at the outside of a channel region. The present invention includes the steps of ... | 01/28/2003 |
| 6509611 | Method for wrapped-gate MOSFET A wrapped-gate transistor includes a substrate having an upper surface and first and second side surfaces opposing to each other. Source and drain regions are formed in the substrate with a channel region therebetween. The channel region extends from the ... | 01/21/2003 |
| 6509586 | Semiconductor device, method for fabricating the semiconductor device and semiconductor integrated circuit A semiconductor device comprises: a channel region 14 of silicon, a source region 26 and a drain region 26 respectively forming junction with the channel region 14, and a gate electrode 30 formed on the channel region 14 interposing an insulation film 16 ... | 01/21/2003 |
| 6506654 | Source-side stacking fault body-tie for partially-depleted SOI MOSFET hysteresis control Floating body effects are substantially reduced by strategically forming source-side stacking faults to create a leakage path from the body to the source of an SOI structure. Embodiments include ion implanting a heavy ion, such as Xe, to form a buried amo... | 01/14/2003 |
| 6504170 | Field effect transistors, field emission apparatuses, and a thin film transistor The present invention includes field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors. According to one embodiment, a field effect transistor includes a semiconductive layer configured ... | 01/07/2003 |
| 6495402 | Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions and method of manufacture A semiconductor-on-insulator (SOI) device. The SOI device includes a substrate having a buried oxide layer disposed thereon and an active layer disposed on the buried oxide layer, the active layer having an active region defined by isolation regions, the ... | 12/17/2002 |
| 6479332 | Methods of forming integrated circuitry An electrical interconnection method includes: a) providing two conductive layers separated by an insulating material on a semiconductor wafer; b) etching the conductive layers and insulating material to define and outwardly expose a sidewall of each cond... | 11/12/2002 |
| 6476447 | Active matrix display device including a transistor A transistor adapted to be used in an active-matrix liquid-crystal display, the channel length, of the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the... | 11/05/2002 |
| 6469350 | Active well schemes for SOI technology A semiconductor device fabricated on a silicon-on-insulator substrate and having an active well scheme as well as methods, including a non-self-aligned and self-aligned, of fabricating such a device are disclosed herein. The semiconductor device includes ... | 10/22/2002 |
| 6468872 | Method of fabricating a thin film transistor The present invention relates to a simplified method of fabricating a thin film transistor (TFT), including the steps of preparing a first conductive type TFT including a first semiconductor layer and a first gate electrode and a second conductive type TF... | 10/22/2002 |
