Class 257/E29.272 - Gate comprising ferroelectric layer (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.255. This subclass
No. of patents: 128
Last issue date: 08/12/2008

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Number	Title	Issue Date
7410812	Manufacture of semiconductor device having insulation film of high dielectric constant A method contains the steps of (a) heating a silicon substrate in a reaction chamber; and (b) supplying film-forming gas containing source gas, nitridizing gas, and nitridation enhancing gas to a surface of the heated silicon substrate, to deposit on the silicon sub...	08/12/2008
7408187	Low-voltage organic transistors on flexible substrates using high-gate dielectric insulators by room temperature process A transistor device includes a transparent substrate. A high K dielectric is formed on the transparent substrate and transferred onto a flexible substrate. An organic transistor is formed on the high K dielectric. ...	08/05/2008
7382013	Dielectric thin film, dielectric thin film device, and method of production thereof To provide a dielectric thin with a high dielectric constant, a low leakage current, and stable physical properties and electrical properties and to provide a thin film capacitor or other thin film dielectric device with a high capacitance and high reliability and a...	06/03/2008
7309617	MRAM memory cell with a reference layer and method for fabricating The invention relates to a method for fabricating a reference layer for MRAM memory cells and an MRAM memory cell equipped with a reference layer of this type. A reference layer of this type comprises two magnetically coupled layers having a different Curie temperat...	12/18/2007
7276758	Non-volatile memory having three states and method for manufacturing the same Disclosed is a non-volatile memory having three data states and a method for manufacturing the same. The non-volatile memory includes a silicon substrate having a device separation film; a floating gate formed on the silicon substrate; a tunnel oxide film interposed...	10/02/2007
7262450	MFS type field effect transistor, its manufacturing method, ferroelectric memory and semiconductor device A MFS type field effect transistor includes a semiconductor layer, a PZT system ferroelectric layer formed on the semiconductor layer, a gate electrode formed on the PZT system ferroelectric layer, and an impurity layer composing a source or a drain, formed in the s...	08/28/2007
7227210	Ferroelectric memory transistor with highly-oriented film on gate insulator A method for fabricating a non-volatile memory device. The method includes providing a substrate, e.g., silicon. The method also includes forming an oxide layer overlying the substrate; and forming a buffer layer overlying the oxide layer. A ferroelectric material i...	06/05/2007
7220601	Method of forming nano-sized MTJ cell without contact hole Provided is a method of manufacturing a nano-sized MTJ cell in which a contact in the MTJ cell is formed without forming a contact hole. The method of forming the MTJ cell includes forming an MTJ layer on a substrate, forming an MTJ cell region by patterning the MTJ...	05/22/2007
7220684	Semiconductor device and method of manufacturing the same There is included an inorganic insulating film having a porous structure including a cylindrical vacancy oriented in parallel with the surface of a substrate subjected to a hydrophilic treatment or a hydrophobic treatment. ...	05/22/2007
7183596	Composite gate structure in an integrated circuit An integrated circuit having composite gate structures and a method of forming the same are provided. The integrated circuit includes a first MOS device, a second MOS device and a third MOS device. The gate stack of the first MOS device includes a high-k gate dielec...	02/27/2007
7098496	Ferroelectric transistor gate stack with resistance-modified conductive oxide The present invention discloses a novel ferroelectric transistor design using a resistive oxide film in place of the gate dielectric. By replacing the gate dielectric with a resistive oxide film, and by optimizing the value of the film resistance, the bottom gate of...	08/29/2006
6703655	Ferroelectric memory transistor A ferroelectric memory transistor includes a substrate having active regions therein; a gate stack, including: a high-k insulator element, including a high-k cup and a high-k cap; a ferroelectric element, wherein said ferroelectric element is encapsulated...	03/09/2004
6674110	Single transistor ferroelectric memory cell, device and method for the formation of the same incorporating a high temperature ferroelectric gate dielectric A single transistor ("1T") ferroelectric memory cell, device and method for the formation of the same incorporating a high temperature ferroelectric gate dielectric. The memory cell of the present invention comprises a substrate, an overlying ferroelectri...	01/06/2004
6670661	Ferroelectric memory cell with diode structure to protect the ferroelectric during read operations A memory cell configuration includes, as a memory cell, a ferroelectric transistor having a first gate intermediate layer and a first gate electrode between source/drain regions at the surface of a semiconductor substrate. The first gate intermediate laye...	12/30/2003
6667501	Nonvolatile memory and method for driving nonvolatile memory A memory cell includes a MOS transistor having a source region, a drain region and a gate electrode, a ferroelectric film formed on the source region of the MOS transistor via an insulating film and an electrode formed on the ferroelectric film. The memor...	12/23/2003
6664115	Metal insulator structure with polarization-compatible buffer layer An MIS device (20) includes a semiconducting substrate (22), a silicon nitride buffer layer (24), a ferroelectric metal oxide superlattice material (26), and a noble metal top electrode (28). The layered superlattice material (26) is preferably a strontiu...	12/16/2003
6649963	Ferroelectric memory cell for VLSI RAM A method of forming a semiconductor memory device on a silicon substrate includes implanting doping impurities of a first type in the silicon substrate to form a conductive channel of a first type for use as a gate junction region, forming a MOS capacitor...	11/18/2003
6642563	Semiconductor memory including ferroelectric gate capacitor structure, and method of fabricating the same A semiconductor memory including a ferroelectric gate capacitor structure includes an insulating interlayer formed on the surface of a semiconductor substrate. The insulating interlayer includes a hole at a position corresponding to a channel region. In t...	11/04/2003
6614066	Ferroelectric transistor and memory cell configuration with the ferroelectric transistor A first source-drain region, a channel region, and a second source-drain region are arranged one after another in a semiconductor substrate. At least the surface of the channel region and parts of the first source-drain region are covered by a dielectric ...	09/02/2003
6610548	CRYSTAL GROWTH METHOD OF OXIDE, CERIUM OXIDE, PROMETHIUM OXIDE, MULTI-LAYERED STRUCTURE OF OXIDES, MANUFACTURING METHOD OF FIELD EFFECT TRANSISTOR, MANUFACTURING METHOD OF FERROELECTRIC NON-VOLATILE MEMORY AND FERROELECTRIC NON-VOLATILE MEMORY An epitaxial rare earth oxide (001)/silicon (001) structure is realized by epitaxially growing a rare earth oxide such as cerium dioxide in the (001) orientation on a (001)-oriented silicon substrate. For this purpose, the surface of the (001)-oriented Si...	08/26/2003
6608339	Ferroelectric memory element Ferroelectric memory element having an MFIS structure including a silicon semiconductor substrate and an insulating film arranged above the silicon semiconductor substrate. The insulating film includes a low dielectric constant layer restraining film and ...	08/19/2003
6607980	Rapid-temperature pulsing anneal method at low temperature for fabricating layered superlattice materials and making electronic devices including same A liquid precursor for forming a layered superlattice material is applied to an integrated circuit substrate. The precursor coating is annealed in oxygen using a rapid temperature pulsing anneal ("RPA") technique with a ramp rate of 30° C./second at a ho...	08/19/2003
6602720	Single transistor ferroelectric transistor structure with high-K insulator and method of fabricating same A ferroelectric transistor gate structure with a ferroelectric gate and a high-k insulator is provided. The high-k insulator may serve as both a gate dielectric and an insulator to reduce, or eliminate, the diffusion of oxygen or hydrogen into the ferroel...	08/05/2003
6586792	Structures, methods, and systems for ferroelectric memory transistors Integrated memory circuits, key components in thousands of electronic and computer products, have recently been made using ferroelectric memory transistors, which offer faster write cycles and lower power requirements than over conventional floating-gate ...	07/01/2003
6580632	Semiconductor memory device, method for driving the same and method for fabricating the same Data is read out from a ferroelectric film with its remnant polarization associated with one of two possible logical states of the data and with a bias voltage applied to a control gate electrode over the ferroelectric film. The ferroelectric film creates...	06/17/2003
6580633	Nonvolatile semiconductor memory device A semiconductor memory device comprising: an active layer in which are formed a transistor source, channel and drain; a gate for the transistor; a layer of ferroelectric material; and an electrode for applying a voltage to the ferroelectric material; the ...	06/17/2003
6574131	Depletion mode ferroelectric memory device and method of writing to and reading from the same Depletion-mode ferroelectric transistors are adapted for use as non-volatile memory cells. Such memory cells find use in non-volatile memory devices as well as other electronic systems having non-volatile memory storage. Various embodiments are described ...	06/03/2003
6538273	Ferroelectric transistor and method for fabricating it A ferroelectric transistor is disclosed which has two source/drain regions and a channel region disposed in between in a semiconductor substrate. A metallic intermediate layer is disposed on the surface of the channel region and forms a Schottky diode wit...	03/25/2003
6532166	Memory device using a transistor and its fabrication method The present invention provides a memory device by using a single transistor, comprising a circuit including a gate of a memory cell and a P type well substrate for inputting(writing) information and another circuit including a source and a drain for outpu...	03/11/2003
6531324	MFOS memory transistor & method of fabricating same A ferroelectric transistor gate structure with a ferroelectric gate and passivation sidewalls is provided. The passivation sidewalls serve as an insulator to reduce, or eliminate, the diffusion of oxygen or hydrogen into the ferroelectric gate. A method o...	03/11/2003
6531325	Memory transistor and method of fabricating same A ferroelectric memory transistor includes a substrate having active regions therein; a gate stack, including: a high-k insulator element, including a high-k cup and a high-k cap; a ferroelectric element, wherein said ferroelectric element is encapsulated...	03/11/2003
6515322	Nonvolatile semiconductor memory utilizing polarization of ferroelectric material A nonvolatile semiconductor memory comprises a silicon substrate, a gate electrode formed through a gate insulator film on a principal surface of the semiconductor substrate, a pair of source/drain regions formed in a principal surface region of the semic...	02/04/2003
6509594	Semiconductor memory device having MFMIS transistor and increased data storage time The semiconductor memory of this invention includes an MFMIS transistor including a field effect transistor and a ferroelectric capacitor formed above the field effect transistor. The semiconductor memory has a characteristic that a value of (ς-p) is sub...	01/21/2003
6507509	Nonvolatile memory High device reliability, a reduction in power consumption, and a high operation speed are achieved. When a predetermined bias voltage is applied between a source 1 and a drain 2 to change a gate voltage, a current discretely flows between the source 1 and...	01/14/2003
6503763	Method of making MFMOS capacitors with high dielectric constant materials A MFMOS one transistor memory structure for ferroelectric non-volatile memory devices includes a high dielectric constant material such as ZrO2, HfO2, Y2 O3, or La2 O3, or the like, or mixt...	01/07/2003
6498362	Weak ferroelectric transistor Field effect transistors having a ferroelectric layer overlying a gate insulator layer as well as methods of their formation and use, and devices produced therefrom. Such ferroelectric field effect transistors are suitable for use in memory devices as the...	12/24/2002
6495377	Method of fabricating ferroelectric memory transistors A method of fabricating a ferroelectric memory transistor includes preparing a substrate, including isolating an active region; forming a gate region; depositing an electrode plug in the gate region; depositing an oxide side wall about the electrode plug;...	12/17/2002
6486520	Structure and method for a large-permittivity gate using a germanium layer A structure for, and method of forming, a metal-insulator-semiconductor field-effect transistor in an integrated circuit is disclosed. The disclosed method comprises forming a germanium layer 52 on a semiconductor substrate (e.g. silicon 20), depositing a...	11/26/2002
6469334	Ferroelectric field effect transistor A ferroelectric FET having an interface insulator layer containing ZrO2. The ferroelectric FET includes a gate oxide layer, the interface insulator layer is located on the gate oxide layer, and ferroelectric layered superlattice material is loc...	10/22/2002
6462366	Ferroelectric nonvolatile transistor A method of fabricating a ferroelectric memory transistor using a lithographic process having an alignment tolerance of δ, includes preparing a silicon substrate for construction of a ferroelectric gate unit; implanting boron ions to form a p-well in the...	10/08/2002

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Class 257/E29.272 - Gate comprising ferroelectric layer (EPO)