Class 257/E29.262 - Vertical transistor (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.255. This subclass
No. of patents: 278
Last issue date: 10/14/2008

«First «Previous1 2 3 4 5 6 7 Next»Last»

Number	Title	Issue Date
7435650	Process for manufacturing trench MIS device having implanted drain-drift region and thick bottom oxide A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes a thick oxide layer at the bottom of the trench and an N-type drain-drift region that extends from the bottom of the t...	10/14/2008
7408223	Trench insulated gate field effect transistor The invention relates to a trench MOSFET with drain (8), sub-channel region (10) body (12) and source (14). The sub-channel region is doped to be the same conductivity type as the body (12), but of lower doping density. A field pla...	08/05/2008
7385247	At least penta-sided-channel type of FinFET transistor An at least penta-sided-channel type of FinFET transistor may include: a base; a semiconductor body formed on the base, the body being arranged in a long dimension to have source/drain regions sandwiching a channel region, at least the channel, in cross-section tran...	06/10/2008
7372100	Semiconductor device A semiconductor device includes: a semiconductor layer of a first conductivity type; a plurality of first cylindrical semiconductor pillar regions of the first conductivity type periodically provided on a major surface of the semiconductor layer; a plurality of seco...	05/13/2008
7368777	Accumulation device with charge balance structure and method of forming the same An accumulation-mode field effect transistor includes a plurality of gates and a semiconductor region having a channel region adjacent to but insulated from each of the plurality of gates. The semiconductor region further includes a conduction region wherein the cha...	05/06/2008
7364997	Methods of forming integrated circuitry and methods of forming local interconnects In one implementation, field oxide is grown within bulk semiconductive material in a first circuitry area and not over immediately adjacent bulk semiconductive material in a second circuitry area. The field oxide is etched from the first circuitry area. After the et...	04/29/2008
7316956	Method for fabricating semiconductor device and wire with silicide A method for fabricating a wire with silicide is disclosed. First, a conductive layer is formed on a substrate. And, a hard mask layer is formed on the conductive layer. Then, the hard mask layer is used as a mask to remove a portion of the conductive layer. Afterwa...	01/08/2008
7303961	Method for producing a junction region between a trench and a semiconductor zone surrounding the trench A method for producing a junction region (2, 5, 6, 7) between a trench (3) and a semiconductor zone (2) surrounding the trench (3) in a trench semiconductor device (1) has the following steps: application of an oxidation barrier la...	12/04/2007
7282760	Vertical junction field effect transistors, and methods of producing the vertical junction field effect transistors A vertical JFET 1a according to the present invention has an n+ type drain semiconductor portion 2, an n-type drift semiconductor portion 3, a p+ type gate semiconductor portion 4, an n-type channel semiconduc...	10/16/2007
7276763	Structure and method for forming the gate electrode in a multiple-gate transistor In a method of forming semiconductor device, a semiconductor fin is formed on a semiconductor-on-insulator substrate. A gate dielectric is formed over at least a portion of the semiconductor fin. A first gate electrode material is formed over the gate dielectric and...	10/02/2007
7276754	Annular gate and technique for fabricating an annular gate A memory structure having a vertically oriented access transistor with an annular gate region and a method for fabricating the structure. More specifically, a transistor is fabricated such that the channel of the transistor extends outward with respect to the surfac...	10/02/2007
7241649	FinFET body contact structure A FinFET body contact structure and a method for creating the FinFET body contact structure are disclosed. The body contact structure comprises a wide fin portion of a semiconductor fin, the wide fin portion having a polysilicon polygon shape formed on a top surface...	07/10/2007
7242056	Structure and fabrication method for capacitors integratible with vertical replacement gate transistors A process and an architecture related to a vertical MOSFET device and a capacitor for use in integrated circuits. Generally, the integrated circuit structure includes a semiconductor layer with a major surface formed along a plane thereof and further including a fir...	07/10/2007
7235840	Vertical junction field effect transistors, and methods of producing the vertical junction field effect transistors A vertical JFET 1a according to the present invention has an n+ type drain semiconductor portion 2, an n-type drift semiconductor portion 3, a p+ type gate semiconductor portion 4, an n-type channel semiconduc...	06/26/2007
7220634	NROM memory cell, memory array, related devices and methods An array of memory cells configured to store at least one bit per one F2 includes substantially vertical structures providing an electronic memory function spaced apart a distance equal to one half of a minimum pitch of the array. The structures providing...	05/22/2007
7205657	Complimentary lateral nitride transistors A semiconductor device which includes a laterally extending stack of laterally adjacent conductive semiconductor regions formed over a support surface of a substrate, and a method for fabricating the device. ...	04/17/2007
7187041	Vertical gate semiconductor device and method for fabricating the same A first region 11 functioning as a transistor includes a drain region 111, a body region 112 formed over the drain region 111, a source region 113A formed over the body region 112 and a trench formed through the body region ...	03/06/2007
7183164	Methods of reducing floating body effect Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion region and the accompanying electrostatic potential created. In a prefe...	02/27/2007
7183610	Super trench MOSFET including buried source electrode and method of fabricating the same In a trench MOSFET, the lower portion of the trench contains a buried source electrode, which is insulated from the epitaxial layer and semiconductor substrate but in electrical contact with the source region. When the MOSFET is in an “off” condition, the bias o...	02/27/2007
7115476	Semiconductor manufacturing method and semiconductor device A method of manufacturing a semiconductor device includes forming a mask layer on a semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a semiconductor pillar, doping an impurity into the semiconductor substra...	10/03/2006
7115945	Strained silicon fin structure Disclosing is a strained silicon finFET device having a strained silicon fin channel in a double gate finFET structure. The disclosed finFET device is a double gate MOSFET consisting of a silicon fin channel controlled by a self-aligned double gate for suppressing s...	10/03/2006
6977406	Short channel insulated-gate static induction transistor and method of manufacturing the same The ultra high-speed vertical short channel insulated-gate static induction transistor with uniform operating characteristic which has the drain layer 3 consisting of an epitaxial single crystal layer on the main surface 2 of substrate 1, the ch...	12/20/2005
6674099	MISFET A metal insulator semiconductor field effect transistor (MISFET) is disclosed comprising a source layer being made with a material having a source band-gap (EG2) and a source mid-gap value (EGM2), the source layer having a source Fermi-Level (EF2). A drai...	01/06/2004
6664143	Methods of fabricating vertical field effect transistors by conformal channel layer deposition on sidewalls Vertical field effect transistors are fabricated by depositing a vertical channel on a microelectronic substrate at a thickness along the microelectronic substrate that is independent of lithography, the vertical channel extending orthogonal to the microe...	12/16/2003
6664806	Memory address and decode circuits with ultra thin body transistors A decoder for a memory device is provided. The decoder array includes a number of address lines and a number of output lines. The address lines and the output lines form an array. The decoder includes a number of vertical pillars extending outwardly from ...	12/16/2003
6664163	Low on-resistance trench lateral MISFET with better switching characteristics and method for manufacturing same A high-voltage and low on-resistance semiconductor device incorporates a trench structure that provides improved switching characteristics. In a preferred embodiment, a Trench Lateral Power MISFET is provided having a gate, channel and drift regions that ...	12/16/2003
6660590	Vertical transistor and method of manufacturing thereof The present invention discloses a vertical transistor wherein source/drain regions are formed by using a self-alignment method without using a latest photolithography, channels are formed via a selective epitaxial growth (hereinafter, referred to as `SEG`...	12/09/2003
6642575	MOS transistor with vertical columnar structure A field-effect transistor has a vertical columnar structure to restrain a short channel effect without impairing the operating speed of an element. In a semiconductor device having a field-effect transistor with a vertical columnar structure, an n-type di...	11/04/2003
6639268	Flash memory with ultra thin vertical body transistors Structures and method for Flash memory with ultra thin vertical body transistors are provided. The Flash memory includes an array of memory cells including floating gate transistors. Each floating gate transistor includes a pillar extending outwardly from...	10/28/2003
6632712	Method of fabricating variable length vertical transistors A process for fabricating vertical CMOS devices, featuring variable channel lengths, has been developed. Channel region openings are defined in composite insulator stacks, with the channel length of specific devices determined by the thickness of the comp...	10/14/2003
6624032	Structure and process flow for fabrication of dual gate floating body integrated MOS transistors A dual gate transistor device and method for fabricating the same. First, a doped substrate is prepared with a patterned oxide layer on the doped substrate defining a channel. Next, a silicon layer is deposited to form the channel, with a gate oxide layer...	09/23/2003
6617640	Field-effect-controllable semiconductor configuration with a laterally extending channel zone A semiconductor configuration includes a semiconductor body with a first connection zone of a first conductivity type, a second connection zone of the first conductivity type, a channel zone of the first conductivity type, and at least one control electro...	09/09/2003
6617653	MISFET P-type active region 12; n-type source/drain regions 13a and 13b; gate insulating film 14 made of a thermal oxide film; gate electrode 15; source/drain electrodes 16a and 16b, are provided over a p-type SiC substrate 11. In the active region 12, p-type he...	09/09/2003
6610366	Method of N2O annealing an oxide layer on a silicon carbide layer Methods for fabricating a layer of oxide on a silicon carbide layer are provided by forming the oxide layer on the silicon carbide layer and then annealing the oxide layer in an N2 O environment at a predetermined temperature profile and at a p...	08/26/2003
6605860	Semiconductor structures and manufacturing methods A method for forming substantially uniformly thick, thermally grown, silicon dioxide material on a silicon body independent of bon axis. A trench is formed in a surface of the silicon body, such trench having sidewalls disposed in different crystallograph...	08/12/2003
6600192	Vertical field-effect semiconductor device with buried gate region A buried gate region, a buried gate contact region and a gate contact region are provided on an SiC substrate. Thereby, a depletion layer expands in the channel region, and a high withstand voltage is attained in the normally off state. By applying a volt...	07/29/2003
6600194	Field-effect semiconductor devices A field-effect semiconductor device, for example a MOSFET of the trench-gate type, comprises side-by-side device cells at a surface (10a) of a semiconductor body (10), and at least one drain connection (41) that extends in a drain trench (40) from the bod...	07/29/2003
6589821	Methods of forming thin film transistors A method of forming a thin film transistor over a substrate is provided whereby at least one of the source region or the drain region is conductively doped while preventing conductivity doping of the channel region without any masking of the channel regio...	07/08/2003
6586800	Trench-gate semiconductor devices A trench-gate MOSFET or ACCUFET has its gate (21) in a first trench (20) that extends through a channel-accommodating body region (15) to a drain region (14). Within the transistor cells, a second trench (40) comprising deposited highly-doped semiconducto...	07/01/2003
6573558	High-voltage vertical transistor with a multi-layered extended drain structure A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions sepa...	06/03/2003

«First «Previous1 2 3 4 5 6 7 Next»Last»

PatentStorm

Quotables

PatentStorm News

Class 257/E29.262 - Vertical transistor (EPO)