Did You Know...
...that the Band-Aid Bandage was invented by a Johnson & Johnson employee whose wife had cut herself? Earl Dickson's wife was rather accident prone, so he set out to develop a bandage that she could apply without help. He placed a small piece of gauze in the center of a small piece of surgical tape, and what we know today as the Band Aid bandage was born!
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| Number | Title | Issue Date |
| 7372104 | High voltage CMOS devices A transistor suitable for high-voltage applications is provided. The transistor is formed on a substrate having a deep well of a first conductivity type. A first well of the first conductivity type and a second well of a second conductivity type are formed such that... | 05/13/2008 |
| 7345341 | High voltage semiconductor devices and methods for fabricating the same High voltage semiconductor devices and methods for fabricating the same are provided. An exemplary embodiment of a semiconductor device capable of high-voltage operation, comprising a substrate comprising a first well formed therein. A gate stack is formed overlying... | 03/18/2008 |
| 7339234 | Semiconductor device and fabrication process thereof, and application thereof An LDMOS transistor includes a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, a drain well of a first conductivity type formed in the substrate so as to include a gate region covered with the gate elect... | 03/04/2008 |
| 7238987 | Lateral semiconductor device and method for producing the same A high withstand voltage lateral semiconductor device capable of improving its on-state breakdown voltage and safe operation area (SOA) without lowering its current capabilities, and structured so as to be easy to produce. The lateral semiconductor device comprises ... | 07/03/2007 |
| 7161210 | Semiconductor device with source and drain regions A semiconductor device is provided with a gate electrode formed over a substrate that has gate oxide films disposed thereon. Source-drain regions of low and high concentration are formed next to the gate electrode. A diffusion region width of the source side of the ... | 01/09/2007 |
| 7116570 | Access circuit and method for allowing external test voltage to be applied to isolated wells An access circuit selectively couples an externally accessible terminal to each of a plurality of isolated DRAM wells in which respective DRAM arrays are fabricated. The access circuit for each well includes first and second transistors fabricated in respective well... | 10/03/2006 |
| 7109562 | High voltage laterally double-diffused metal oxide semiconductor A high voltage laterally double-diffused metal oxide semiconductor (LDMOS) stricture is characterized as follows: the second source electrode metal layer connected to the first source electrode metal layer protrudes out of a certain length relative to the first sour... | 09/19/2006 |
| 6703684 | Semiconductor device and method of forming a semiconductor device A power semiconductor device (10) has an active region that includes a drift region (20). At least a portion of the drift region (20) is provided in a membrane (16) which has opposed top and bottom surfaces (15,17). In one embodiment, the top surface (15)... | 03/09/2004 |
| 6696323 | Method of manufacturing semiconductor device having trench filled up with gate electrode In a semiconductor device, a p-type base region is provided in an n- -type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+ -type source region extends in the ... | 02/24/2004 |
| 6693340 | Lateral semiconductor device A lateral semiconductor device has a semiconductor layer on an insulating layer on a semiconductor substrate. The semiconductor layer has a region of a first conduction type and a region of a second conduction type with a drift region therebetween. The dr... | 02/17/2004 |
| 6677642 | Field effect transistor structure and method of manufacture A field effect transistor structure is formed with a body semiconductor layer (5) having source (9), body (7), drift region and drain (11). An upper semiconductor layer (21) is separated from the body by an oxide layer (17). The upper semiconductor layer ... | 01/13/2004 |
| 6667213 | Method of fabricating a high-voltage transistor with a multi-layered extended drain structure A method for fabricating a high-voltage transistor with an extended drain region includes forming parallel arranged drift regions, each of which is interleaved with an insulating layer and a conducting layer that functions as a field plate. Source and bod... | 12/23/2003 |
| 6664593 | Field effect transistor structure and method of manufacture A field effect transistor structure is formed with a body semiconductor layer (1) having source (3), channel (7), drift region (9) and drain (5). An upper metallisation layer (15, 17) is separated from the body by an oxide layer (11). The upper metallisat... | 12/16/2003 |
| 6635544 | Method of fabricating a high-voltage transistor with a multi-layered extended drain structure A method for fabricating a high-voltage transistor with an extended drain region includes forming an epitaxial layer on a substrate, the epitaxial layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair ... | 10/21/2003 |
| 6627958 | Lateral high voltage semiconductor device having a sense terminal and method for sensing a drain voltage of the same A lateral high voltage semiconductor device having a sense terminal and a method for sensing a drain voltage of the same are provided. Specifically, the present invention relates to a thin layer, high voltage, lateral silicon-on-insulator (SOI) device hav... | 09/30/2003 |
| 6614089 | Field effect transistor In an N-MOSFET having a Double RESURF structure, an n-drift layer and a p-base layer are formed to be adjacent to each other in the surface of a p-semiconductor active layer. An n+ -drain layer and a p-RESURF layer are formed in the surface of ... | 09/02/2003 |
| 6580126 | Solid-state relay A solid state relay composed of a series connected pair of LDMOSFETs has a minimized output capacitance. Each LDMOSFET is configured to have a silicon layer of a first conductive type, a drain region of the first conductive type diffused in the top surfac... | 06/17/2003 |
| 6573144 | Method for manufacturing a semiconductor device having lateral MOSFET (LDMOS) In an LDMOS, an n-type region 6, which is formed to have a concentration higher than that of an n-type substrate 1 and whose concentration gradually increases from the n-type substrate 1 to an n+ type drain region 5, is disposed so as to surrou... | 06/03/2003 |
| 6573558 | High-voltage vertical transistor with a multi-layered extended drain structure A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions sepa... | 06/03/2003 |
| 6555873 | High-voltage lateral transistor with a multi-layered extended drain structure A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions sepa... | 04/29/2003 |
| 6548863 | Lateral DMOS transistor integratable in semiconductor power devices The lateral DMOS transistor is integratable in a semiconductor power device comprising a P-type substrate and an N-type epitaxial layer. The lateral DMOS transistor comprises a source region and a drain region formed in the epitaxial layer and a body regi... | 04/15/2003 |
| 6531738 | High voltage SOI semiconductor device In an SOI (Silicon On Insulator) semiconductor device, a first semiconductor layer overlies a semiconductor substrate so as to sandwich an insulating layer, and second and third semiconductor layers with a different conductivity type from the second semic... | 03/11/2003 |
| 6525375 | Semiconductor device having trench filled up with gate electrode In a semiconductor device, a p-type base region is provided in an n- -type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+ -type source region extends in the ... | 02/25/2003 |
| 6515332 | Insulated-gate field-effect semiconductor device An insulated-gate field-effect semiconductor device, preferably of the SOI type, has source (3) and drain (4) regions in a semiconductor body portion (1) at a first major surface of a semiconductor substrate (10). The gate-terminal metallisation (25) is p... | 02/04/2003 |
| 6468878 | SOI LDMOS structure with improved switching characteristics An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that ... | 10/22/2002 |
| 6465839 | Semiconductor device having lateral MOSFET (LDMOS) In an LDMOS, an n-type region 6, which is formed to have a concentration higher than that of an n-type substrate 1 and whose concentration gradually increases from the n-type substrate 1 to an n+ type drain region 5, is disposed so as to surrou... | 10/15/2002 |
| 6448620 | Semiconductor device and process for producing the same To provide a semiconductor device having a large allowable current, a demanded withstand voltage, and small output capacitance and resistance, the semiconductor device comprises a semiconductor layer formed on a semiconductor substrate, and the semiconduc... | 09/10/2002 |
| 6445038 | Silicon on insulator high-voltage switch An SOI high-voltage switch with an FET structure, in which a drift zone of one conductivity type is provided between a gate electrode and a drain electrode in the drain region. Pillar-like trenches in the form of a grid are incorporated in the drift zone ... | 09/03/2002 |
| 6441432 | High voltage lateral semiconductor device A high voltage lateral semiconductor device is provided in which an n buffer region (14) surrounds an n+ drain region (11), and an n drift region (3) surrounds the n buffer region (14), while a p well region (44) surrounds the n drift region (3... | 08/27/2002 |
| 6439514 | Semiconductor device with elements surrounded by trenches Pch-MOS transistors to which a power supply potential is applied are respectively surrounded by first trenches, and Nch-MOS transistors to which a ground potential is applied are respectively surrounded by second trenches. The first trenches are surrounde... | 08/27/2002 |
| 6414365 | Thin-layer silicon-on-insulator (SOI) high-voltage device structure A thin layer SOI high-voltage device in which the drift charge is depleted using a three-dimensional MOS capacitor structure. The drift region of the high-voltage semiconductor device is doped with a graded charge profile which increases from source-to-dr... | 07/02/2002 |
| 6384453 | High withstand voltage diode and method for manufacturing same A high withstand voltage diode for protecting a high-voltage transistor has a first region 2 of a second conductivity type formed on the substrate of a first conductivity type, a high-concentration second region 5 of the second type formed on the first re... | 05/07/2002 |
| 6380566 | Semiconductor device having FET structure with high breakdown voltage An N-MOSFET is formed on an SOI substrate consisting of a semiconductor substrate, an insulating layer and an n- -active layer. A p-well layer, an n-RESURF layer, and an n-diffusion layer are formed in the surface of the n- -active l... | 04/30/2002 |
| 6373101 | Solid-state relay A solid state relay composed of a series connected pair of LDMOSFETs has a minimized output capacitance. Each LDMOSFET is configured to have a silicon layer of a first conductive type, a drain region of the first conductive type diffused in the top surfac... | 04/16/2002 |
| 6359306 | Semiconductor device and method of manufacturing thereof In a method of manufacturing a trench-MOS gate structure device, trenches for contact and n-type source layers are alternately formed in a region situated between parallel trench-MOS gates. Thereby, scale down of the device is possible without requiring m... | 03/19/2002 |
| 6353252 | High breakdown voltage semiconductor device having trenched film connected to electrodes A plurality of trenches are formed in a drift region between a p-type body region and an-type buffer region. A silicon oxide film is formed on the side and bottom of each of the trenches, and an SIPOS film is buried into each of the trenches. The trenches... | 03/05/2002 |
| 6346451 | Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first condu... | 02/12/2002 |
| 6313489 | Lateral thin-film silicon-on-insulator (SOI) device having a lateral drift region with a retrograde doping profile, and method of making such a device A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first condu... | 11/06/2001 |
| 6310378 | High voltage thin film transistor with improved on-state characteristics and method for making same The present invention is directed to an SOI LDMOS device having improved current handling capability, particularly in the source-follower mode, while maintaining an improved breakdown voltage capability. The improvement in current handling capability is a... | 10/30/2001 |
| 6307224 | Double diffused mosfet A MOSFET formed on an SOI substrate secures a high withstand voltage and a reduced element area. The SOI substrate includes an insulator layer and an n- -type semiconductor layer formed on the insulator layer. The MOSFET consists of a p-type im... | 10/23/2001 |
