Class 257/E29.248 - With confinement of carriers by at least two heterojunctions (e.g., DHHEMT, quantum well HEMT, DHMODFET) (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.246. This subclass
No. of patents: 34
Last issue date: 10/07/2008

Number	Title	Issue Date
7432538	Field-effect transistor A field-effect transistor includes a channel layer having a channel and a carrier supply layer, disposed on the channel layer, containing a semiconductor represented by the formula AlxGa1-xN, wherein x is greater than 0.04 and less than 0.45. T...	10/07/2008
7408208	III-nitride power semiconductor device A III-nitride power semiconductor device that includes a two dimensional electron gas having a low field region under the gate thereof. ...	08/05/2008
7361536	Method of fabrication of a field effect transistor with materialistically different two etch stop layers in an enhanced mode transistor and an depletion mode transistor A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement...	04/22/2008
7355215	Field effect transistors (FETs) having multi-watt output power at millimeter-wave frequencies High electron mobility transistors (HEMT) are provided having an output power of greater than 3.0 Watts when operated at a frequency of at least 30 GHz. The HEMT has a power added efficiency (PAE) of at least about 20 percent and/or a gain of at least about 7.5 dB. ...	04/08/2008
7253454	High electron mobility transistor A HEMT device including a GaN channel structure including a very thin (Al,In,Ga)N subchannel layer that is disposed between a first GaN channel layer and a second GaN channel layer, to effect band bending induced from the piezoelectric and spontaneous charges associ...	08/07/2007
6674100	SiGeC-based CMOSFET with separate heterojunctions Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in...	01/06/2004
6593191	Buried channel strained silicon FET using a supply layer created through ion implantation A method of fabricating a buried channel FET including providing a relaxed SiGe layer on a substrate, providing a channel layer on the relaxed SiGe layer, providing a SiGe cap layer on the channel layer, and ion implanting a dopant supply. The dopant supp...	07/15/2003
6555839	Buried channel strained silicon FET using a supply layer created through ion implantation A circuit including at least one strained channel, enhancement mode FET, and at least one strained channel, depletion mode FET. The depletion mode FET includes an ion implanted dopant supply. In exemplary embodiments, the FETs are surface channel or burie...	04/29/2003
6515316	Partially relaxed channel HEMT device A HEMT device comprises a buffer layer disposed over a substrate. A partially-relaxed channel is disposed over the buffer layer and a barrier layer is disposed over the channel. A cap layer is disposed over the barrier layer and a gate is positioned on th...	02/04/2003
6512252	Semiconductor device A HDTMOS includes a Si substrate, a buried oxide film and a semiconductor layer. The semiconductor layer includes an upper Si film, an epitaxially grown Si buffer layer, an epitaxially grown SiGe film, and an epitaxially grown Si film. Furthermore, the HD...	01/28/2003
6472685	Semiconductor device A first silicon layer (Si layer), a second silicon layer (Si1 Cy layer) containing carbon and a third silicon layer not containing carbon are stacked in this order on a silicon substrate. Since the lattice constant of the Si1-y	10/29/2002
6465816	Semiconductor device and manufacturing method of the same A semiconductor device is a hetero-junction bipolar transistor structured by having a gallium arsenide film among laminated films, which has an indium gallium phosphide (InGaP) film which is connected to the gallium arsenide film and functions as an emitt...	10/15/2002
6407406	Semiconductor device and method of manufacturing the same An undoped Ge sacrificial layer with an uneven surface (about 1 nm), a relaxed undoped Si0.7 Ge0.3 buffer layer (50 nm), an n-type Si0.7 Ge0.3 carrier supply layer, an undoped Si0.7 Ge0.3 s...	06/18/2002
6399970	FET having a Si/SiGeC heterojunction channel Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in...	06/04/2002
6350993	High speed composite p-channel Si/SiGe heterostructure for field effect devices A method and a layered heterostructure for forming p-channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate, a composite channel structure of a first epitaxial Ge layer and a second com...	02/26/2002
6319799	High mobility heterojunction transistor and method A heterojunction transistor with high mobility carriers in the channel region includes a source region and a drain region formed in a semiconductor body with the source region and the drain region comprising doped semiconductor alloys separated from the s...	11/20/2001
6190975	Method of forming HCMOS devices with a silicon-germanium-carbon compound semiconductor layer Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in...	02/20/2001
6015981	Heterostructure field-effect transistors (HFETs') with high modulation effectivity The invention concerns heterostructure field effect transistors (HFET's) with high charge carrier concentration in the two-dimensional charge-carrier gas. The n-HFET of the heterostructure layer sequence contains several zones with formed 2DEG while the p...	01/18/2000
6004137	Method of making graded channel effect transistor A MISFET having a graded semiconductor alloy channel layer of silicon germanium in which the germanium is graded to a single peak percentage level. The single peak percentage level defines the location of the charge carriers within the layer. The transcon...	12/21/1999
5986287	Semiconductor structure for a transistor Semiconductor structure for a transistor, having at least one doped crystalline semiconductor layer (3) consisting of a semiconductor material such as silicon or germanium which is applied onto a further crystalline layer, wherein the doped semiconductor ...	11/16/1999
5821577	Graded channel field effect transistor A MISFET having a graded semiconductor alloy channel layer of silicon germanium in which the germanium is graded to a single peak percentage level. The single peak percentage level defines the location of the charge carriers within the layer. The transcon...	10/13/1998
5777364	Graded channel field effect transistor A MISFET having a graded semiconductor alloy channel layer of silicon germanium in which the germanium is graded to a single peak percentage level. The single peak percentage level defines the location of the charge carriers within the layer. The transcon...	07/07/1998
5686744	Complementary modulation-doped field-effect transistors Complementary Modulation-Doped Field-Effect Transistors (CMODFETs) using a heterostructure based Silicon and Germanium alloys are described. The design of the Si/Si1-x Gex -based CMODFET is also presented and shown to enable both n-c...	11/11/1997
5420059	Method of making a high performance MESFET with multiple quantum wells A superheterojunction Field Effect Transistor (FET) with a multi-region channel on a Silicon (Si) substrate. The FET is a Metal Semiconductor FET (MESFET) or, alternatively, a Junction FET (JFET). The multi-region channel has: A first region of Si extendi...	05/30/1995
5323020	High performance MESFET with multiple quantum wells A superheterojunction Field Effect Transistor (FET) with a multi-region channel on a Silicon (Si) substrate. The FET is a Metal Semiconductor FET (MESFET) or, alternatively, a Junction FET (JFET). The multi-region channel has: A first region of Si extendi...	06/21/1994
5272365	Silicon transistor device with silicon-germanium electron gas hetero structure channel A metal oxide semiconductor field effect transistor with heterostructure has a silicon substrate. Heavily-doped source and drain layers which are different in conductivity type from the substrate are spaced apart from each other in the surface portion of ...	12/21/1993
5241197	Transistor provided with strained germanium layer A transistor having a high carrier mobility and suited for a high-speed operation can be formed by utilizing a fact that the carrier mobility in a strained germanium layer is large. A strain control layer is provided beneath the germanium layer to impose ...	08/31/1993
5227644	Heterojunction field effect transistor with improve carrier density and mobility A field effect transistor comprising first and second electrodes, semiconductor layers connected to these electrodes to form a carrier channel between them and a control electrode is provided. Said semiconductor layers consisting essentially of: (a) a fir...	07/13/1993
5049951	Superlattice field effect transistor with monolayer confinement A heterojunction field effect transistor (HFET) having a source, drain, and channel, wherein the channel is a top layer of a superlattice buffer, eliminating the need for a thick buffer layer. The superlattice buffer comprises alternating barrier and quan...	09/17/1991
5036374	Insulated gate semiconductor device using compound semiconductor at the channel An insulated gate semiconductor device comprises a channel region of compound semiconductor of one conductivity type, source and drain regions of the other conductivity type spaced apart by the channel region, a gate insulation film provided on the channe...	07/30/1991
5019882	Germanium channel silicon MOSFET An alloy layer comprising germanium and silicon is grown on top of a silicon substrate. The alloy layer is kept thin enough for proper pseudomorphic, dislocation free growth. A layer of silicon is applied to the alloy layer. The initial silicon layer is f...	05/28/1991
4994866	Complementary semiconductor device A complementary semiconductor device (CMOS gate) including a p-channel transistor (PMOS FET) and an n-channel transistor (NMOS FET). A silicon substrate, a channel layer for the p-channel transistor which comprises a first Si1-x Gex ...	02/19/1991
4849797	Thin film transistor In a thin film transistor which has an active layer formed between source and drain electrodes, a gate insulating film formed in contact with the active layer, and a gate electrode formed in contact with the gate insulating film, the photoconductivity of ...	07/18/1989
4710788	Modulation doped field effect transistor with doped Si_x Ge_1-x -intrinsic Si layering A modulation doped field effect transistor (MODFET) having an n-conductive channel. This channel is produced by a heterostructure formed on a silicon substrate and composed of a modulation doped Si1-x Gex layer as well as an undoped ...	12/01/1987

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Class 257/E29.248 - With confinement of carriers by at least two heterojunctions (e.g., DHHEMT, quantum well HEMT, DHMODFET) (EPO)