Class 257/E29.162 - Insulating materials for IGFET (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.15. This
No. of patents: 446
Last issue date: 07/29/2008

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Number	Title	Issue Date
7405453	Incorporation of nitrogen into high k dielectric film A high k dielectric film and methods for forming the same are disclosed. The high k material includes two peaks of impurity concentration, particularly nitrogen, such as at a lower interface and upper interface, making the layer particularly suitable for transistor ...	07/29/2008
7385265	High dielectric constant MOSFET device A semiconductor device has an MIS (metal-insulating film-semiconductor) structure, and a film mainly containing Al, O, and N atoms is used on a semiconductor. Alternatively, a semiconductor device has an MIS structure, and a film mainly containing Al, O, and N atoms...	06/10/2008
7326980	Devices with HfSiON dielectric films which are Hf-O rich A dielectric film containing atomic layer deposited HfSiON and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. The HfSiON layer thickness is contro...	02/05/2008
7276747	Semiconductor device having screening electrode and method In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a screening electrode spaced apart from a channel region. ...	10/02/2007
7214993	Non-planar transistor having germanium channel region and method of manufacturing the same Provided is a non-planar transistor with a multi-gate structure that includes a germanium channel region, and a method of manufacturing the same. The non-planar transistor includes a silicon body and a channel region that covers exposed surfaces of the silicon body....	05/08/2007
6979619	Flash memory device and a method of fabrication thereof In a first aspect of the present invention, a method of fabricating a flash memory device is disclosed. The method comprises the steps of providing a portion of a dual gate oxide in a periphery area of the memory device and then simultaneously providing a dual gate ...	12/27/2005
6939756	Inclusion of nitrogen at the silicon dioxide-silicon carbide interace for passivation of interface defects A method for manufacturing a silicon carbide semiconductor device. In one embodiment, the method includes the following steps: a layer of silicon dioxide is formed on a silicon carbide substrate to create a silicon dioxide/silicon carbide interface and then nitrogen...	09/06/2005
6700771	Decoupling capacitor for high frequency noise immunity Systems and methods are provided for an on-chip decoupling device and method. One aspect of the present subject matter is a capacitor. One embodiment of the capacitor includes a substrate, a high K dielectric layer doped with nano crystals disposed on the...	03/02/2004
6700171	Gate dielectric The use of doped or undoped rare-earth silicates, according to the formula MSix Oy wherein M is a rare-earth element, in semiconductor technology is disclosed. In particular, gadolinium silicate as a gate dielectric of a metal-insula...	03/02/2004
6700170	Insulated gate transistor having a gate insulator containing nitrogen atoms and fluorine atoms An insulated gate transistor in which nitride oxide film having a nitrogen concentration of 1×1020 (/cm3) or more and containing a halogen element is used as a gate insulator. Because the gate insulator has a nitrogen concentration ...	03/02/2004
6693051	Silicon oxide based gate dielectric layer A semiconductor device having a dielectric layer formed between a first and a second conductive layer. The dielectric layer comprising a layer of silicon oxide, SiOXࣘ2, having a dielectric constant greater than about 3.9 and less than or equa...	02/17/2004
6693012	Method and device to reduce gate-induced drain leakage (GIDL) current in thin gate oxide MOSFETs A process for the fabrication of an integrated circuit which provides a FET device having reduced GIDL current is described. A semiconductor substrate is provided wherein active regions are separated by an isolation region, and a gate oxide layer is form ...	02/17/2004
6686264	Methods of forming binary noncrystalline oxide analogs of silicon dioxide A non-crystalline oxide is represented by the formula: ABO4 wherein A is an element selected from Group IIIA of the periodic table; and B is an element selected from Group VB of the periodic table....	02/03/2004
6683011	Process for forming hafnium oxide films A process for forming a hafnium oxide-containing film on a substrate such as silicon that includes introducing an anhydrous hafnium nitrate-containing precursor into a reactor containing the substrate, and converting the precursor into the hafnium oxide-c...	01/27/2004
6680130	High K dielectric material and method of making a high K dielectric material A dielectric material having a high dielectric constant includes a Group III metal oxide and a Group V element. The incorporation of the Group V element in the Group III metal oxide material reduces the number of structural defects in the dielectric mater...	01/20/2004
6677648	Device having a silicon oxide film containing krypton A silicon oxide film (1701) serving as a gate insulating film of a semiconductor device contains Kr. Therefore, the stress in the silicon oxide film (1701) and the stress at the interface between silicon and the silicon oxide film are relaxed, and the sil...	01/13/2004
6673664	Method of making a self-aligned ferroelectric memory transistor A method of making a self-aligned ferroelectric memory transistor includes preparing a substrate, shallow trench isolation, n the polysilicon; and forming a gate stack, including: depositing a layer of silicon nitride; selectively etching the silicon nitr...	01/06/2004
6670248	Triple gate oxide process with high-k gate dielectric A method for forming, on a semiconductor substrate, a dielectric layer having a variable thickness and composition. The dielectric layer so formed can be used to form electronic devices such as MOSFETS and CMOSFETS that require gate dielectrics of differe...	12/30/2003
6670651	Metal sulfide-oxide semiconductor transistor devices A self-aligned enhancement mode metal-sulfide-oxide-compound semiconductor field effect transistor (10) includes a lower sulfide layer that is a mixture of Ga2 S, Ga2 S3, and other gallium sulfide compounds (30), and a sec...	12/30/2003
6667207	High-dielectric constant insulators for FEOL capacitors Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the cap...	12/23/2003
6667232	Thin dielectric layers and non-thermal formation thereof A method of forming a dielectric layer suitable for use as the gate dielectric layer in a MOSFET includes passivating the surface of a semiconductor substrate at a temperature less than approximately 80° C. and nitridizing the passivation layer. In parti...	12/23/2003
6664577	Semiconductor device includes gate insulating film having a high dielectric constant A semiconductor device comprising a semiconductor substrate and a MOSFET provided on the semiconductor substrate, the MOSFET including a gate insulating film and a gate electrode provided on the gate insulating film, wherein the gate insulating film has a...	12/16/2003
6664160	Gate structure with high K dielectric A method for forming a gate structure beginning with a semiconductor substrate provided with an isolation region formed therein. An HfO2 layer and a conductive layer are formed on the semiconductor substrate, subsequently. The conductive layer ...	12/16/2003
6661058	Highly reliable gate oxide and method of fabrication An ultra-thin gate oxide layer of hafnium oxide (HfO2) and a method of formation are disclosed. The ultra-thin gate oxide layer of hafnium oxide (HfO2) is formed by a two-step process. A thin hafnium (Hf) film is first formed by ther...	12/09/2003
6660658	Transistor structures, methods of incorporating nitrogen into silicon-oxide-containing layers; and methods of forming transistors The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally ...	12/09/2003
6660657	Methods of incorporating nitrogen into silicon-oxide-containing layers The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally ...	12/09/2003
6656780	Method of manufacturing a semiconductor device having nitrogen ions by twice RTA processes In the fabrication of a MOS transistor, a single process step is performed for controlling the threshold voltage of the transistor and improving the reliability of a gate insulating film so that the number of manufacturing steps is decreased. A desired am...	12/02/2003
6657267	Semiconductor device and fabrication technique using a high-K liner for spacer etch stop A semiconductor device and method of fabrication are disclosed. The semiconductor device includes a liner composed of a high-K material. The liner has a portion separating a sidewall spacer from a gate and a portion separating the sidewall spacer from a l...	12/02/2003
6653185	Method of providing trench walls by using two-step etching processes Method of providing trench walls of a uniform orientation to support epitaxial growth in the trench. The trench is formed by a first etching process. A second etching process is used to change crystal orientation and thus create a widened trench with modi...	11/25/2003
6642591	Field-effect transistor A field-effect transistor includes a silicon substrate on which is formed a channel region, a source region and a drain region. A gate insulation layer of a transition metal oxide having a perovskite structure is formed over at least the channel region, a...	11/04/2003
6642156	Method for forming heavy nitrogen-doped ultra thin oxynitride gate dielectrics A method for forming an ultra thin gate dielectric for an integrated circuit device is disclosed. In an exemplary embodiment of the invention, the method includes forming an initial nitride layer upon a substrate by rapidly heating the substrate in the pr...	11/04/2003
6635559	Formation of insulating aluminum oxide in semiconductor substrates The present invention provides methods and apparatus for creating insulating layers in Group III-V compound semiconductor structures having aluminum oxide with a substantially stoichiometric compositions. Such insulating layers find applications in a vari...	10/21/2003
6630710	Elevated channel MOSFET The present invention provides a semiconductor device (e.g., MOSFET) having a channel above the surface of the wafer containing a well and a junction. The elevated channel may be selectively epitaxially grown and enables higher mobility, thereby enabling ...	10/07/2003
6630712	Transistor with dynamic source/drain extensions A method of fabricating an integrated circuit with a transistor having less susceptibility to off-state leakage current and short-channel effect is disclosed. The transistor includes high-K gate dielectric spacers and a T-shaped gate conductor. The high-K...	10/07/2003
6630386	CMOS manufacturing process with self-amorphized source/drain junctions and extensions A method of manufacturing an integrated circuit may include the steps of annealing a gate structure and a halo section disposed over a substrate using a first temperature, implanting dopants to form drain and source regions, and annealing drain and source...	10/07/2003
6627945	Memory device and method of making A non-volatile memory device includes a number of memory cells, parts of which are delineated by insulators. The insulators each include both a lower trench-fill insulator portion in a trench in the substrate, and an upper protruding portion that protrude...	09/30/2003
6627510	Method of making self-aligned shallow trench isolation A modified STI process is provided comprising forming a first polysilicon layer over a substrate. Forming a trench through the first polysilicon layer and into the substrate, and filling the trench with an oxide layer. Depositing a second polysilicon laye...	09/30/2003
6627944	Floating gate memory device using composite molecular material A floating gate memory device has a floating gate and an insulating layer on the floating gate. A control gate is on the insulating layer. The insulating layer is made up of a molecular matrix with ionic complexes distributed in the molecular matrix. By t...	09/30/2003
6627494	Method for forming gate electrode of flash memory The present invention discloses a method for forming a gate electrode of a flash memory. A tunnel oxide film is formed on the whole surface of a semiconductor substrate. A conductive film of a floating gate is formed over the resultant structure. A gate i...	09/30/2003
6624083	METHOD FOR REMOVING CONTAMINANT COMPOUNDS RESPECTIVELY HAVING BENZENE RING THEREIN FROM SURFACE OF SI LAYER AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE INCLUDING STEP FOR REMOVING CONTAMINANT COMPOUNDS A method for removing contaminant compounds respectively having a benzene ring therein from the surface of an Si layer, the method containing enter a step for causing the Si layer to contact with the air, oxygen or ozone under a heated condition or a step...	09/23/2003

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Class 257/E29.162 - Insulating materials for IGFET (EPO)