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| Number | Title | Issue Date |
| 5760475 | Refractory metal-titanium nitride conductive structures The present invention provides a conductive structure for use in semiconductor devices. The structure can be used to interconnect the various diffusion regions or electrodes of devices formed on a processed semiconductor substrate to a layer of metal, to ... | 06/02/1998 |
| 5744845 | Complementary MOS field effect transistor with tunnel effect means In a complementary MOS field effect transistor having a dual gate electrode structure, which is improved so that an element property can be enhanced, a first gate electrode of an n channel MOSFET includes a first barrier film, and a second gate electrode ... | 04/28/1998 |
| 5719083 | Method of forming a complex film over a substrate having a specifically selected work function Disclosed is a method and an apparatus for making devices with low barrier height. In fabricating an n-channel and p-channel devices, hemisphere grains, silicon crystal grains and metal silicide crystal grains are formed on a contact-hole or a gate electr... | 02/17/1998 |
| 5683515 | Apparatus for manufacturing a semiconductor device having conductive then films In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of ... | 11/04/1997 |
| 5635765 | Multi-layer gate structure A method of forming a multi-layer silicide gate structure for a MOS type semiconductor device that includes the processing steps of first providing a substrate, then depositing a gate oxide layer on the substrate, then depositing a first refractory metal ... | 06/03/1997 |
| 5625217 | MOS transistor having a composite gate electrode and method of fabrication A novel, reliable, high performance MOS transistor with a composite gate electrode which is compatible with standard CMOS fabrication processes. The composite gate electrode comprises a polysilicon layer formed on a highly conductive layer. The composite ... | 04/29/1997 |
| 5619057 | Complex film overlying a substrate with defined work function Disclosed is a method and an apparatus for making devices with low barrier height. In fabricating an n-channel and p-channel devices, hemisphere grains, silicon crystal grains and metal silicide crystal grains are formed on a contact-hole or a gate electr... | 04/08/1997 |
| 5536667 | Method for forming a gate electrode in a semiconductor device A method for forming a gate electrode in a semiconductor device is disclosed. An injection of the holes which moved from the control gate to a dielectric layer is suppressed since the control gate electrode is formed with a double layer structure composed... | 07/16/1996 |
| 5508543 | Low voltage memory A floating gate is inserted into the gate stack of an EEPROM cell. For an N channel EEPROM device, the floating gate is composed of a material having a conduction band edge (or fermi energy in the case of a metal or composite that includes a metal) at lea... | 04/16/1996 |
| 5496750 | Elevated source/drain junction metal oxide semiconductor field-effect transistor using blanket silicon deposition The described embodiments of the present invention provide a method for fabricating elevated source/drain junction metal oxide semiconductor field-effect transistors. The process does not require the use of selective or epitaxial silicon growth processes.... | 03/05/1996 |
| 5444302 | Semiconductor device including multi-layer conductive thin film of polycrystalline material In forming an electrode 2 on a silicon 6 oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion o... | 08/22/1995 |
| 5245207 | Integrated circuit A depletion operation is realized by using a depletion type MOSFET even at the room temperature or the liquid nitrogen temperature without doping the channel portion below the gate electrode with impurities having a conductivity type, which is opposite to... | 09/14/1993 |
| 5115290 | MOS type semiconductor device and method for manufacturing the same A MOS type semiconductor device and a method for the manufacture of the same are disclosed in which a gate electrode is so formed over a semiconductor substrate of a first conductivity type with a gate insulating film formed therebetween as to provide a t... | 05/19/1992 |
| 5094966 | Method for the manufacture of an insulated gate field effect semiconductor device using photo enhanced CVD A method of manufacturing an TGFET is described. The gate electrode comprises Mo, Ti, W, MOSi2, WSi2, TiSi2 or mixtures thereof formed on a photo-CVD nitride layer.... | 03/10/1992 |
| 5034792 | Field-effect transistor A field-effect transistor wherein a gate electrode conductive layer is connected in parallel to a plurality of conductive layers having a lower resistivity than the gate electrode conductive layer, so that the gate resistance is reduced to provide a high ... | 07/23/1991 |
| 4974056 | Stacked metal silicide gate structure with barrier A gate structure for integrated circuit devices which includes a work function layer, a low resistivity layer, and an electrically conductive barrier layer between the two other layers to prevent the other two layers from intermixing. The work function co... | 11/27/1990 |
| 4924281 | Gate structure for a MOS FET A gate structure of a MOS FET has an oxide layer and an electrode layer sequentially formed on a silicon substrate. In the gate structure, the electrode layer includes a first silicidized high-melting metal layer formed on the oxide layer, a high-melting ... | 05/08/1990 |
| 4879582 | Field-effect transistor A field-effect transistor wherein a gate electrode conductive layer is connected in parallel to a plurality of conductive layers having a lower resistivity than the gate electrode conductive layer, so that the gate resistance is reduced to provide a high ... | 11/07/1989 |
| 4874717 | Semiconductor circuit containing integrated bipolar and MOS transistors on a chip and method of producing same Integrated semiconductor circuits with at least one bipolar transistor (17) and at least one MOS field effect transistor (18) on a chip wherein contacts from a metal interconnect level to diffused active emitter (8) and collector (5) regions of the bipola... | 10/17/1989 |
| 4841346 | Field-effect transistor devices A MOSFET utilizes a buried channel structure comprising a buried channel between a source electrode and a drain electrode. The device also comprises a gate electrode made of material whose Fermi level is located between a conduction band and a valency ban... | 06/20/1989 |
| 4780429 | Method of fabrication of MOS transistors having electrodes of metallic silicide In a method of fabrication of field-effect transistors having very small dimensions, the gate electrode is formed by a first layer of metallic silicide. Insulating embankments are formed along the lateral edges of the gate and a second layer of metallic s... | 10/25/1988 |
| 4770948 | High-purity metal and metal silicide target for LSI electrodes There is provided a high-purity molybdenum target or high-purity molybdenum silicide target for LSI electrodes which comprises a high-purity metallic molybdenum having an alkali metal content of not more than 100 ppb and a radioactive element content of n... | 09/13/1988 |
| 4721991 | Refractory silicide conductor containing iron A semiconductor device having an electroconductive portion made of a multi-component alloy which may be represented by a formula: wherein 0 | 01/26/1988 |
| 4673968 | Integrated MOS transistors having a gate metallization composed of tantalum or niobium or their silicides Chemical reactions between a tantalum or tantalum silicide metallization layer and an underlying thin gate oxide are avoided by the interposition of an intermediate layer of oxygen-doped tantalum or tantalum silicide whose thickness amounts to about 1/20 ... | 06/16/1987 |
| 4619695 | Process for producing high-purity metal targets for LSI electrodes A high-purity high-melting metal target or high-purity high-melting metal silicide target for LSI electrodes having an alkali metal content of not more than 100 ppb and a radioactive element content of not more than 10 ppb is provided by a wet purificatio... | 10/28/1986 |
| 4581627 | Enhanced silicide adhesion to semiconductor and insulator surfaces The invention provides a semiconductor device in which an insulating film or a semiconductor film is firmly bonded with a metal silicide film, and also provides a method for manufacturing the same. The semiconductor device has a semiconductor substrate wi... | 04/08/1986 |
| 4567641 | Method of fabricating semiconductor devices having a diffused region of reduced length An improved semiconductor device having a diffused region of reduced length and an improved method of fabricating such a semiconductor device are disclosed. The semiconductor device may be a MOSFET or an IGR, by way of example. In a form of the method of ... | 02/04/1986 |
| 4525378 | Method for manufacturing VLSI complementary MOS field effect circuits A method for manufacturing VLSI complementary MOS field effect transistor circuits (CMOS circuits). By use of a suitable gate material, preferably a gate material comprised of silicides of high melting point metals, a threshold voltage of n-channel and p-... | 06/25/1985 |
| 4462151 | Method of making high density complementary transistors A simple process is provided which forms a bulk CMOS structure by depositing a layer of material which resists oxidation, e.g., a barrier layer of silicon nitride on an N- semiconductor substrate, forming a P well in the substrate through a given segment ... | 07/31/1984 |
| 4445134 | Conductivity WSi2 films by Pt preanneal layering A highly conductive layer utilizing a layer of Pt in conjunction with sputter deposited or co-evaporated WSi2 to enhance the conductivity increase of the WSi2 layer occuring during annealing. The Pt layer is deposited as a thin layer... | 04/24/1984 |
| 4399605 | Method of making dense complementary transistors A method is provided for making complementary field effect transistors in a semiconductor layer having a first portion including an N type transistor with a channel region defined by N+ source and drain regions and having a second portion including a P ty... | 08/23/1983 |
| 4392150 | MOS Integrated circuit having refractory metal or metal silicide interconnect layer A partial silicide layer under a polycrystalline silicon (polysi) first level interconnect reduces the sheet resistance of the first level interconnect. The polysi insulates the silicide from possibly reactive materials and gases. Since the silicide is no... | 07/05/1983 |
| 4389257 | Fabrication method for high conductivity, void-free polysilicon-silicide integrated circuit electrodes A method of providing self-passivating interconnection electrodes for semiconductor devices which provides low resistivity composite polysiliconsilicide electrodes. In the method the formation of oxidation induced voids in polysilicon underlying the silic... | 06/21/1983 |
| 4337476 | Silicon rich refractory silicides as gate metal Silicon-rich silicides of titanium and tantalum have been found to be suitable for use as the gate metal in semiconductor integrated circuits replacing polysilicon altogether. Such silicon-rich silicides, formed by sintering a cosputtered alloy with silic... | 06/29/1982 |
| 4322453 | Conductivity WSi2 (tungsten silicide) films by Pt preanneal layering A highly conductive layer utilizing a layer of Pt in conjunction with sputter deposited or co-evaporated WSi2 to enahnce the conductivity increase of the WSi2 layer occuring during annealing. The Pt layer is deposited as a thin layer... | 03/30/1982 |
| 4282647 | Method of fabricating high density refractory metal gate MOS integrated circuits utilizing the gate as a selective diffusion and oxidation mask A method for fabricating an MOS integrated circuit having a refractory metal gate structure includes the formation of an insulating layer and a conductive refractory metal layer on a substrate, followed by the selective removal of portions of these layers... | 08/11/1981 |