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| Number | Title | Issue Date |
| 7396716 | Method to obtain fully silicided poly gate The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises forming a capping layer 610 over gate structures 230 located over a microelectronics substrate 210 wherein the gate structures ... | 07/08/2008 |
| 7368796 | Metal gate engineering for surface P-channel devices A semiconductor device, such as a CMOS device, having gates with a high work function in PMOS regions and low work functions in NMOS regions and a method of producing the same. Using nitrogen implantation or plasma annealing, a low work function W (or CoSix | 05/06/2008 |
| 7327001 | PMOS transistor with compressive dielectric capping layer A salicide layer is deposited on the source/drain regions of a PMOS transistor. A dielectric capping layer having residual compressive stress is formed on the salicide layer by depositing a plurality of PECVD dielectric sublayers and plasma-treating each sublayer. C... | 02/05/2008 |
| 7307871 | SRAM cell design with high resistor CMOS gate structure for soft error rate improvement A high resistor SRAM memory cell to reduce soft error rate includes a first inverter having an output as a first memory node, and a second inverter having an output as a second memory node. The second memory node is coupled to an input of the first inverter through ... | 12/11/2007 |
| 7294893 | Titanium silicide boride gate electrode A method for use in the fabrication of a gate electrode includes providing a gate oxide layer and forming a titanium boride layer on the oxide layer. An insulator cap layer is formed on the titanium boride layer and thereafter, the gate electrode is formed from the ... | 11/13/2007 |
| 7294890 | Fully salicided (FUSA) MOSFET structure A method is described to form a MOSFET with a fully silicided gate electrode and fully silicided, raised S/D elements that are nearly coplanar to allow a wider process margin when forming contacts to silicided regions. An insulator block layer is formed over STI reg... | 11/13/2007 |
| 7279422 | Semiconductor device with silicide film and method of manufacturing the same Provided is a semiconductor device having a suicide thin film with thermal stability and a method of manufacturing the same. The semiconductor device includes a silicon substrate containing Si a gate oxide film formed on the silicon substrate, a gate electrode conta... | 10/09/2007 |
| 7256123 | Method of forming an interface for a semiconductor device In a semiconductor device using a polysilicon contact, such as a poly plug between a transistor and a capacitor in a container cell, an interface is provided where the poly plug would otherwise contact the bottom plate of the capacitor. The interface bars silicon fr... | 08/14/2007 |
| 6664154 | Method of using amorphous carbon film as a sacrificial layer in replacement gate integration processes An exemplary embodiment relates to a method of using amorphous carbon in replacement gate integration processes. The method can include depositing an amorphous carbon layer above a substrate, patterning the amorphous carbon layer, depositing a dielectric ... | 12/16/2003 |
| 6653700 | Transistor structure and method of fabrication A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gat... | 11/25/2003 |
| 6645798 | Metal gate engineering for surface p-channel devices A semiconductor device, such as a CMOS device, having gates with a high work function in PMOS regions and low work functions in NMOS regions and a method of producing the same. Using nitrogen implantation or plasma annealing, a low work function W (or CoS... | 11/11/2003 |
| 6632731 | Structure and method of making a sub-micron MOS transistor A method of fabricating a sub-micron MOS transistor includes preparing a substrate, including isolating an active region therein; depositing a gate oxide layer; depositing a first selective etchable layer over the gate oxide layer; depositing a second sel... | 10/14/2003 |
| 6614082 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6613654 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6518154 | Method of forming semiconductor devices with differently composed metal-based gate electrodes MOS transistors and CMOS devices comprising a plurality of transistors including metal-based gate electrodes of different composition are formed by a process comprising: depositing a first blanket layer of a first metal on a thin gate insulator layer exte... | 02/11/2003 |
| 6468845 | Semiconductor apparatus having conductive thin films and manufacturing apparatus therefor In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of ... | 10/22/2002 |
| 6441464 | Gate oxide stabilization by means of germanium components in gate conductor A semi-conductor device includes a silicon substrate. A gate oxide dielectric layer is on the silicon substrate. A gate conductor includes a relatively thin layer of germanium on the dielectric layer. A relatively thick layer of gate conductor material is... | 08/27/2002 |
| 6372563 | Self-aligned SOI device with body contact and NiSi2 gate A self-aligned SOI device with body contact and silicide gate. The SOI device is formed using an ordinary substrate such as silicon. A silicide gate is self-aligned and formed from re-crystallization of nickel and amorphous silicon. The self-aligned silic... | 04/16/2002 |
| 6346731 | Semiconductor apparatus having conductive thin films In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of ... | 02/12/2002 |
| 6339246 | Tungsten silicide nitride as an electrode for tantalum pentoxide devices The specification describes a process for making gate electrodes for silicon MOS transistor devices having tantalum pentoxide gate dielectrics. The gate electrode includes a layer of tungsten silicide, and, preferably a layer of tungsten suicide nitride. ... | 01/15/2002 |
| 6284636 | Tungsten gate method and apparatus A tungsten gate electrode and method of fabricating the same are provided. In one aspect, a method of fabricating a gate electrode stack on a substrate is provided that includes forming an insulating film on the substrate and forming a conductor film on t... | 09/04/2001 |
| 6274421 | Method of making metal gate sub-micron MOS transistor A MOS transistor is formed on a single crystal silicon substrate doped to form a conductive layer of a first type, and includes: an active region formed on said substrate; a source region and a drain region located in said active region, doped to form con... | 08/14/2001 |
| 6265749 | Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant A transistor is provided having a metal silicide gate spaced above a semiconductor substrate by a high-dielectric-constant ceramic gate dielectric. The entire gate conductor is preferably composed of a metal silicide. In an embodiment, the metal silicide ... | 07/24/2001 |
| 6239452 | Self-aligned silicide gate technology for advanced deep submicron MOS device A deep submicron MOS device having a self-aligned silicide gate structure and a method for forming the same is provided so as to overcome the problems of poly-Si depletion and boron penetration. A first Nickel silicide layer is formed between a gate oxide... | 05/29/2001 |
| 6228724 | Method of making high performance MOSFET with enhanced gate oxide integration and device formed thereby Transistors formed according to the present invention include an oxide layer/nitride layer gate insulator and a silicide gate conductor. An oxide layer is formed to a thickness of between 15 and 25 Angstroms across a substrate and partially removed so tha... | 05/08/2001 |
| 6118140 | Semiconductor apparatus having conductive thin films In forming an electrode on a silicon oxide film on a semiconductor substrate through a silicon oxide film, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers. The portion of the gate e... | 09/12/2000 |
| 6103607 | Manufacture of MOSFET devices The specification describes a process for making gate electrodes for silicon MOS transistor devices. The gate electrode is a composite of a first layer of tungsten suicide, a second layer of tungsten silicide nitride, and a third layer of tungsten silicid... | 08/15/2000 |
| 6091123 | Self-aligned SOI device with body contact and NiSi2 gate A self-aligned SOI device with body contact and silicide gate. The SOI device is formed using an ordinary substrate such as silicon. A silicide gate is self-aligned and formed from re-crystallization of nickel and amorphous silicon. The self-aligned silic... | 07/18/2000 |
| 6078089 | Semiconductor device having cobalt niobate-metal silicide electrode structure and process of fabrication thereof A semiconductor device having a cobalt niobate-cobalt silicide gate electrode structure is provided. A semiconductor device, consistent with one embodiment of the invention, is formed by forming a cobalt niobate gate insulating layer over the substrate an... | 06/20/2000 |
| 6043142 | Semiconductor apparatus having conductive thin films and manufacturing apparatus therefor In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of ... | 03/28/2000 |
| 6011289 | Metal oxide stack for flash memory application In order to alleviate lifting problems and to reduce the height of the stack, a tungsten layer is formed on a interpoly dielectric layer, such as an ONO layer, which separates the conductive control gate from a polysilicon floating gate that is in turn fo... | 01/04/2000 |
| 5939758 | Semiconductor device with gate electrodes having conductive films First and second gate electrodes are formed spaced from each other on a semiconductor substrate. A pair of impurity diffusion layers are provided on both sides of the first gate electrode at the surface of the semiconductor substrate. The first gate elect... | 08/17/1999 |
| 5937315 | Self-aligned silicide gate technology for advanced submicron MOS devices A deep submicron MOS device having a self-aligned silicide gate structure and a method for forming the same is provided so as to overcome the problems of poly-Si depletion and boron penetration. A first Nickel silicide layer is formed between a gate oxide... | 08/10/1999 |
| 5930632 | Process of fabricating a semiconductor device having cobalt niobate gate electrode structure A semiconductor device having a cobalt niobate-cobalt silicide gate electrode structure is provided. A semiconductor device, consistent with one embodiment of the invention, is formed by forming a cobalt niobate gate insulating layer over the substrate an... | 07/27/1999 |
| 5907789 | Method of forming a contact-hole of a semiconductor element A method and an apparatus for making devices with low barrier height. In fabricating an n-channel and p-channel devices, hemisphere grains, silicon crystal grains and metal silicide crystal grains are formed on a contact-hole or a gate electrode on an ins... | 05/25/1999 |
| 5907784 | Method of making multi-layer gate structure with different stoichiometry silicide layers A method of forming a multi-layer silicide gate structure for a MOS type semiconductor device that includes the processing steps of first providing a substrate, then depositing a gate oxide layer on the substrate, then depositing a first refractory metal ... | 05/25/1999 |
| 5903053 | Semiconductor device A semiconductor device comprising a conductive layer and an amorphous alloy layer formed on the bottom surface of said conductive layer and acting as a barrier layer. The conductive layer is either an electrode layer or a wiring layer. The amorphous alloy... | 05/11/1999 |
| 5821623 | Multi-layer gate structure A method of forming a multi-layer suicide gate structure for a MOS type semiconductor device that includes the processing steps of first providing a substrate, then depositing a gate oxide layer on the substrate, then depositing a first refractory metal s... | 10/13/1998 |
| 5801444 | Multilevel electronic structures containing copper layer and copper-semiconductor layers A low temperature annealed Cu silicide or germanide layer on the surface of a single crystalline semiconductor substrate of Si or Ge is used in interconnection metallization for integrated circuits. The Cu silicide or germanide layer is preferably formed ... | 09/01/1998 |
| 5783478 | Method of frabricating a MOS transistor having a composite gate electrode A novel, reliable, high performance MOS transistor with a composite gate electrode which is compatible with standard CMOS fabrication processes. The composite gate electrode comprises a polysilicon layer formed on a highly conductive layer. The composite ... | 07/21/1998 |