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| Number | Title | Issue Date |
| 7432164 | Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the same A method for making a semiconductor device includes providing a first substrate region and a second substrate region, wherein at least a part of the first substrate region has a first conductivity type and at least a part of the second substrate region has a second ... | 10/07/2008 |
| 7429777 | Semiconductor device with a gate electrode having a laminate structure A semiconductor device includes a semiconductor substrate having a semiconductor layer, a gate electrode, a source region, a drain region, an element separation insulating film layer and a wiring. The gate electrode include a laminated structure having a gate insula... | 09/30/2008 |
| 7400020 | Conductive niobium oxide gate MOSFET MOSFET gate structures are provided comprising a niobium monoxide gate, overlying a gate dielectric. The niobium monoxide gate may have a low work function suitable for use as an NMOS gate. ... | 07/15/2008 |
| 7315067 | Native high-voltage n-channel LDMOSFET in standard logic CMOS A native high-voltage n-channel LDMOSFET includes a p− doped substrate, a first n+ doped region disposed in the p− doped substrate, a source terminal coupled to the first n+ doped region, an n− well disposed in the substrate, a second n+ doped region disposed ... | 01/01/2008 |
| 7300887 | Methods of forming metal nitride layers, and methods of forming semiconductor structures having metal nitride layers Methods of forming metal nitride layers on a substrate include reacting a metal source gas with a nitrogen source gas in a process chamber to form a metal nitride layer on the substrate. The process chamber may have an atmosphere having a pressure of about 0.1 mTorr... | 11/27/2007 |
| 7253485 | Semiconductor device and manufacturing method thereof A manufacturing method for a CMOS semiconductor device in which gate electrodes are adjusted to have different work function values comprises forming an device region of a first and second conductivity type for forming first and second MOS semiconductor element devi... | 08/07/2007 |
| 7202147 | Semiconductor device and method for fabricating the same A semiconductor device includes: a gate electrode formed on a silicon substrate; source/drain regions formed at both sides of the gate electrode in the silicon substrate; and a silicide layer formed on the source/drain regions. The silicide layer includes a first si... | 04/10/2007 |
| 7172955 | Silicon composition in CMOS gates A semiconductor device comprises an n-type MIS transistor comprising a first gate insulating film and a first gate electrode including an MSix film formed on the first gate insulating film, where M represents a metal element selected from tungsten and mol... | 02/06/2007 |
| 7141858 | Dual work function CMOS gate technology based on metal interdiffusion A gate structure for a MOSFET device comprises a gate insulation layer, a first layer of a first metal abutting the gate insulation layer, and a second layer overlying the first layer and comprising a mixture of the metal of the first layer and a second metal, the m... | 11/28/2006 |
| 7126199 | Multilayer metal gate electrode A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate. A metal barrier layer may be formed over the gate dielectric. A work... | 10/24/2006 |
| 6927435 | Semiconductor device and its production process A semiconductor device comprising a semiconductor substrate, gate insulators formed on the substrate, and gate electrodes formed on the gate insulators, the gate insulators which are mainly composed of a material selected from titanium oxide, zirconium oxide and haf... | 08/09/2005 |
| 6696345 | Metal-gate electrode for CMOS transistor applications Described is a CMOS transistor structure with a multi-layered gate electrode structure and a method of fabrication. The gate electrode structure has a three-layered metallic gate electrode and a polysilicon layer. The first metallic layer acts as a barrie... | 02/24/2004 |
| 6693313 | Field effect transistors, field effect transistor assemblies, and integrated circuitry The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a... | 02/17/2004 |
| 6680503 | Field-effect transistor structure with an insulated gate The field-effect transistor has an insulated gate, a source electrode, a drain electrode, and an inversion channel between the source and drain electrodes and underneath the gate electrode. The gate electrode is fabricated from a material which does not h... | 01/20/2004 |
| 6664604 | Metal gate stack with etch stop layer A metal gate structure and method of forming the same employs an etch stop layer between a first metal layer, made of TiN, for example, and the metal gate formed of tungsten. The etch stop layer prevents overetching of the TiN during the etching of the tu... | 12/16/2003 |
| 6660577 | Method for fabricating metal gates in deep sub-micron devices A method for fabricating metal gates in deep sub-micron CMOS devices. The method blanket deposits a transition metal nitride layer on top of a gate dielectric layer for forming gate electrodes for both a PMOS and an NMOS device. After a cap layer is depos... | 12/09/2003 |
| 6657268 | Metal gate stack with etch stop layer having implanted metal species A metal gate structure and method of forming the same introduces metal impurities into a first metal layer, made of TiN, for example. The impurities create a surface region of greater etch selectivity that prevents overetching of the TiN during the etchin... | 12/02/2003 |
| 6653700 | Transistor structure and method of fabrication A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gat... | 11/25/2003 |
| 6645798 | Metal gate engineering for surface p-channel devices A semiconductor device, such as a CMOS device, having gates with a high work function in PMOS regions and low work functions in NMOS regions and a method of producing the same. Using nitrogen implantation or plasma annealing, a low work function W (or CoS... | 11/11/2003 |
| 6642591 | Field-effect transistor A field-effect transistor includes a silicon substrate on which is formed a channel region, a source region and a drain region. A gate insulation layer of a transition metal oxide having a perovskite structure is formed over at least the channel region, a... | 11/04/2003 |
| 6638874 | Methods used in fabricating gates in integrated circuit device structures One embodiment of the present invention is a method used to fabricate a device on a substrate, which method is utilized at a stage of processing wherein a metal gate stack is disposed or formed over a gate oxide, which metal stack includes a refractory me... | 10/28/2003 |
| 6632731 | Structure and method of making a sub-micron MOS transistor A method of fabricating a sub-micron MOS transistor includes preparing a substrate, including isolating an active region therein; depositing a gate oxide layer; depositing a first selective etchable layer over the gate oxide layer; depositing a second sel... | 10/14/2003 |
| 6630710 | Elevated channel MOSFET The present invention provides a semiconductor device (e.g., MOSFET) having a channel above the surface of the wafer containing a well and a junction. The elevated channel may be selectively epitaxially grown and enables higher mobility, thereby enabling ... | 10/07/2003 |
| 6613654 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6614082 | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming t... | 09/02/2003 |
| 6607958 | Semiconductor device and method of manufacturing the same Disclosed is a semiconductor device, comprising a semiconductor substrate, an insulating film and a gate electrode formed on the semiconductor substrate, source-drain regions formed in the semiconductor substrate, and a metal oxide layer formed selectivel... | 08/19/2003 |
| 6545356 | Graded layer for use in semiconductor circuits and method for making same Methods of forming a graded layer is disclosed. The graded layer transitions from one material to another material. The properties of these materials are chosen to optimize the interfaces on each side of the graded layer. Specifically, an improved transis... | 04/08/2003 |
| 6537901 | Method of manufacturing a transistor in a semiconductor device There is disclosed a method of manufacturing a transistor in a semiconductor device. The present invention forms a Ta film or a TaNx film at a low temperature or forms a first TaNx film in which the composition(x) of nitrogen is 0.45~0.55, on a gate insul... | 03/25/2003 |
| 6531751 | Semiconductor device with increased gate insulator lifetime A semiconductor device in which hole-induced damage to the dielectric layer is reduced is disclosed. In the device, a layer of a conductive, high bandgap (i.e. a material with a bandgap greater than 1.1 eV) material is formed adjacent to the dielectric la... | 03/11/2003 |
| 6498378 | Methods of forming field effect transistors and integrated circuitry The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a... | 12/24/2002 |
| 6492676 | Semiconductor device having gate electrode in which depletion layer can be generated A semiconductor device including a first gate electrode having a first plane provided opposite to a first semiconductor region where a channel is to be formed with a first gate insulation film interposed therebetween; a second gate insulation film includi... | 12/10/2002 |
| 6486030 | Methods of forming field effect transistors and integrated circuitry including TiN gate element The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a... | 11/26/2002 |
| 6476454 | Semiconductor device and method of manufacturing the same Disclosed is a semiconductor device, comprising a semiconductor substrate, an insulating film and a gate electrode formed on the semiconductor substrate, source-drain regions formed in the semiconductor substrate, and a metal oxide layer formed selectivel... | 11/05/2002 |
| 6468888 | Method for forming polysilicon-germanium gate in CMOS transistor and device made thereby A method for making a ULSI MOSFET chip includes forming transistor gates on a substrate and a semiconductor device thereby made. The gates are formed by depositing a polysilicon layer on the substrate, implanting germanium into the polysilicon layer at a ... | 10/22/2002 |
| 6451658 | Graded layer for use in semiconductor circuits and method for making same Methods of forming a graded layer is disclosed. The graded layer transitions from one material to another material. The properties of these materials are chosen to optimize the interfaces on each side of the graded layer. Specifically, an improved transis... | 09/17/2002 |
| 6448613 | Fabrication of a field effect transistor with minimized parasitic Miller capacitance A field effect transistor is fabricated to have a drain overlap and a source overlap to minimize series resistance between the gate and the drain and between the gate and the source of the field effect transistor. The parasitic Miller capacitance formed b... | 09/10/2002 |
| 6444513 | Metal gate stack with etch stop layer having implanted metal species A metal gate structure and method of forming the same introduces metal impurities into a first metal layer, made of TiN, for example. The impurities create a surface region of greater etch selectivity that prevents overetching of the TiN during the etchin... | 09/03/2002 |
| 6432779 | Selective removal of a metal oxide dielectric A method for forming a semiconductor device is disclosed in which a metal oxide gate dielectric layer is formed over a substrate. A gate electrode is then formed over the metal oxide layer thereby exposing a portion of the metal oxide layer. The exposed p... | 08/13/2002 |
| 6429482 | Halo-free non-rectifying contact on chip with halo source/drain diffusion A semiconductor chip includes a semiconductor substrate having a rectifying contact diffusion and a non-rectifying contact diffusion. A halo diffusion is adjacent the rectifying contact diffusion and no halo diffusion is adjacent the non-rectifying contac... | 08/06/2002 |
| 6423619 | Transistor metal gate structure that minimizes non-planarity effects and method of formation A metal gate structure is formed by depositing a gate dielectric, a gate electrode, a stop layer, and a metal layer within a gate trench and removing the portions of the layers that lie outside the gate trench. A first polish or etch process is used to re... | 07/23/2002 |
