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| Number | Title | Issue Date |
| 7422953 | Semiconductor device and method of manufacturing the same There is provided a method of manufacturing a semiconductor device, including forming a structure including a first layer containing Si and a metal oxide layer in contact with the first layer, the metal oxide layer having a dielectric constant higher than that of si... | 09/09/2008 |
| 7250630 | Electronic devices formed of high-purity molybdenum oxide The present invention is directed to electronic devices comprising high-purity molybdenum oxide in at least a part of the devices. The devices according to the present such a bipolar transistor, a field effect transistor and a thyristor have a high withstand voltage... | 07/31/2007 |
| 6589827 | Semiconductor device and method for fabricating the same A silicon germanium layer is deposited over a semiconductor substrate with a gate insulating film interposed between the substrate and the silicon germanium layer. Then, an upper silicon layer in an amorphous state is deposited on the silicon germanium la... | 07/08/2003 |
| 6498085 | Semiconductor device and method of fabricating the same The claimed invention relates to a semiconductor device and a method of fabricating the semiconductor device. More particularly, the claimed invention relates to a method of fabricating the semiconductor device in which parts of a gate electrode at the en... | 12/24/2002 |
| 6492676 | Semiconductor device having gate electrode in which depletion layer can be generated A semiconductor device including a first gate electrode having a first plane provided opposite to a first semiconductor region where a channel is to be formed with a first gate insulation film interposed therebetween; a second gate insulation film includi... | 12/10/2002 |
| 6441464 | Gate oxide stabilization by means of germanium components in gate conductor A semi-conductor device includes a silicon substrate. A gate oxide dielectric layer is on the silicon substrate. A gate conductor includes a relatively thin layer of germanium on the dielectric layer. A relatively thick layer of gate conductor material is... | 08/27/2002 |
| 6399469 | Fabrication of a notched gate structure for a field effect transistor using a single patterning and etch process For fabricating a field effect transistor within an active device area of a semiconductor substrate, a first semiconductor layer of a first semiconductor material is deposited on a gate dielectric layer, and a second semiconductor layer of a second semico... | 06/04/2002 |
| 6399444 | Method of making floating gate non-volatile memory cell with low erasing voltage A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer ... | 06/04/2002 |
| 6214681 | Process for forming polysilicon/germanium thin films without germanium outgassing An ultra-large scale integrated (ULSI) circuit includes MOSFETs which have different threshold voltages and yet have the same channel characteristics. The MOSFETs utilize gate structures with heavily doped polysilicon and germanium material. The polysilic... | 04/10/2001 |
| 6147380 | Floating gate non-volatile memory cell with low erasing voltage and having different potential barriers A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer ... | 11/14/2000 |
| 6066880 | Semiconductor device Performance for a gate insulation film of an insulated gate transistor is enhanced. A depletion layer is generated in a region of a gate electrode 12 which is provided in contact with a gate insulation film 4 in an OFF state, and the depletion layer disap... | 05/23/2000 |
| 6054731 | Floating gate non-volatile memory cell with low erasing voltage and manufacturing method A non-volatile memory cell of the type which includes at least one floating gate transistor and which is realized over a semiconductor substrate includes a source region, and a drain region, separated by a channel region which is overlaid by a thin layer ... | 04/25/2000 |
| 5689125 | Cadmium sulfide interface layers for improving III-V semiconductor device performance and characteristics In a Schottky metal junction semiconductor device, a CdS interface layer, having a thickness of under 100 angstroms, is positioned under the Schottky barrier gate of a III-V HEMT, for reducing gate leakage, and for enabling full depletion of the conductin... | 11/18/1997 |
| 5652156 | Layered polysilicon deposition method A method of forming a multilayered polysilicon gate which inhibits penetration of ions through the polysilicon gate to the underlying gate oxide layer is described. A gate silicon oxide layer is formed over the surface of a semiconductor substrate. A laye... | 07/29/1997 |
| 5641702 | Method of making semiconductor integrated-circuit capacitor A semiconductor integrated-circuit capacitor comprises a lower electrode formed on a semiconductor substrate, a capacitor insulating film formed on the lower electrode, and an upper electrode formed on the capacitor insulating film. The capacitor insulati... | 06/24/1997 |
| 5554559 | Method of manufacturing a semiconductor device having a capacitor with a ferroelectric, dielectric A semiconductor device in which a capacitor (2) is provided on a surface (10) of a semiconductor body (3) with a semiconductor element (1) in which a lower electrode (11), an oxidic ferroelectric dielectric (12) and an upper electrode (13) are provided in... | 09/10/1996 |
| 5508543 | Low voltage memory A floating gate is inserted into the gate stack of an EEPROM cell. For an N channel EEPROM device, the floating gate is composed of a material having a conduction band edge (or fermi energy in the case of a metal or composite that includes a metal) at lea... | 04/16/1996 |
| 5440157 | Semiconductor integrated-circuit capacitor having a carbon film electrode A semiconductor integrated-circuit capacitor comprises a lower electrode formed on a semiconductor substrate, a capacitor insulating film formed on the lower electrode, and an upper electrode formed on the capacitor insulating film. The capacitor insulati... | 08/08/1995 |
| 5396095 | Method of manufacturing a semiconductor device comprising a capacitor with a ferroelectric dielectric, and semiconductor device comprising such a capacitor A semiconductor device in which a capacitor (2) is provided on a surface (10) of a semiconductor body (3) with a semiconductor element (1) in which a lower electrode (11), an oxidic ferroelectric dielectric (12) and an upper electrode (13) are provided in... | 03/07/1995 |
| 5245207 | Integrated circuit A depletion operation is realized by using a depletion type MOSFET even at the room temperature or the liquid nitrogen temperature without doping the channel portion below the gate electrode with impurities having a conductivity type, which is opposite to... | 09/14/1993 |
| 4581627 | Enhanced silicide adhesion to semiconductor and insulator surfaces The invention provides a semiconductor device in which an insulating film or a semiconductor film is firmly bonded with a metal silicide film, and also provides a method for manufacturing the same. The semiconductor device has a semiconductor substrate wi... | 04/08/1986 |
