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| Number | Title | Issue Date |
| 7420227 | Cu-metalized compound semiconductor device The present invention is a compound semiconductor device characterized in that it is Cu-metalized to improved the reliability of the device and to greatly reduce the cost of production. ... | 09/02/2008 |
| 7285857 | GaN-based III—V group compound semiconductor device and p-type electrode for the same Provided are a p-type electrode and a III-V group GaN-based compound semiconductor device using the same. The electrode includes a first layer disposed on a III-V group nitride compound semiconductor layer and formed of a Zn-based material containing a solute; and a... | 10/23/2007 |
| 7190076 | Electrode for p-type Group III nitride compound semiconductor layer and method for producing the same A GaN layer is formed on a sapphire substrate through an AlN buffer layer and doped with Mg to prepare a laminate (referred to as “GaN substrate”). A metal (Pt and Ni) electrode 50 nm thick is formed on the GaN substrate by (1) vapor deposition after the GaN sub... | 03/13/2007 |
| 6977395 | Semiconductor device A semiconductor device has at least a GaN system semiconductor having n-conductivity type and a GaN system semiconductor having p-conductivity type layered on a substrate. Electrodes are formed on both surfaces of the GaN system semiconductor layer having n-conducti... | 12/20/2005 |
| 6693352 | Contact structure for group III-V semiconductor devices and method of producing the same A contact structure for group III-V and group II-VI compound semiconductor devices, generally used as a light emitting diode (LED), a laser diode (LD), or a photodiode (PD), comprising p-type and/or n-type conduction is disclosed. The contact structure co... | 02/17/2004 |
| 6683332 | Heterojunction bipolar transistor and manufacturing method therefor including electrode alloyed reaction layers A Pt alloyed reaction layer is formed under a base ohmic electrode. This alloyed reaction layer extends through a base protective layer so as to reach a base layer. Besides, a Pt alloyed reaction layer is formed under an emitter ohmic electrode. This allo... | 01/27/2004 |
| 6661037 | Low emitter resistance contacts to GaAs high speed HBT A heterojunction bipolar transistor is provided having an improved current gain cutoff frequency. The heterojunction bipolar transistor includes a contact region formed from InGaAsSb. The contact region allows an emitter region of the heterojunction bipol... | 12/09/2003 |
| 6639316 | Electrode having substrate and surface electrode components for a semiconductor device An electrode for a semiconductor device superior in die-bonding and wire-bonding characteristics with a submount and its manufacturing method are provided. The electrode is formed by ohmic-contacting the surface of a semiconductor, which comprises a subst... | 10/28/2003 |
| 6629640 | Holographic laser scanning method and system employing visible scanning-zone indicators identifying a three-dimensional omni-directional laser scanning volume for package transport navigation A method of and system for automatically identifying packages during manual package sortation operations, wherein, a laser scanning system is supported above a workspace environment of 3-D spatial extent, which can be occupied by a human operator involved... | 10/07/2003 |
| 6610606 | Method for manufacturing nitride compound based semiconductor device using an RIE to clean a GaN-based layer A method for manufacturing a GaN-based semiconductor device in which an ohmic contact can be provided between the semiconductor layer and the electrode material. In a method for manufacturing wherein an n-GaN layer, an emissive layer, a p-GaN layer are fo... | 08/26/2003 |
| 6583454 | Nitride based transistors on semi-insulating silicon carbide substrates A high electron mobility transistor (HEMT) is disclosed that includes a semi-insulating silicon carbide substrate, an aluminum nitride buffer layer on the substrate, an insulating gallium nitride layer on the buffer layer, an active structure of aluminum ... | 06/24/2003 |
| 6583455 | Fabrication of low resistance, non-alloyed, OHMIC contacts to INP using non-stoichiometric INP layers A method of reducing the specific contact resistivity of a metal to semiconductor interface between a metal contact and an InP semiconductor compound. The method includes the step of increasing the amount of the group V element (P) in the semiconductor co... | 06/24/2003 |
| 6570194 | Compound semiconductor field effect transistor with improved ohmic contact layer structure and method of forming the same The present invention provides a structure of a semiconductor device, the structure comprising: a compound semiconductor multi-layer structure having at least a channel region; and at least an ohmic contact layer provided adjacent to a first side face of ... | 05/27/2003 |
| 6555457 | Method of forming a laser circuit having low penetration ohmic contact providing impurity gettering and the resultant laser circuit A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal l... | 04/29/2003 |
| 6531715 | Multilayer contact electrode for compound semiconductors and production method thereof A multilayer contact electrode for connecting a bonding wire to a p-type surface of a III/V-compound semiconductor is formed by a first metallizing step followed by a tempering step. Then, a second metallized layer of the same metal as the first metal lay... | 03/11/2003 |
| 6521998 | Electrode structure for nitride III-V compound semiconductor devices In an electrode structure for a nitride III-V compound semiconductor device, a metallic nitride is used as an electrode material. A metallic material of the metallic nitride has a negative nitride formation free energy, and comprises at least one metal se... | 02/18/2003 |
| 6486502 | Nitride based transistors on semi-insulating silicon carbide substrates A high electron mobility transistor (HEMT) (10) is disclosed that includes a semi-insulating silicon carbide substrate (11), an aluminum nitride buffer layer (12) on the substrate, an insulating gallium nitride layer (13) on the buffer layer, an active st... | 11/26/2002 |
| 6452244 | Film-like composite structure and method of manufacture thereof On a semiconductor layer 1 consisting of a substrate of a semiconductor single crystal or the like, a metallic layer 2 of a thickness of 20 nm or less is formed. The metallic layer 2 comprises a first area A directly contacting with the semiconductor laye... | 09/17/2002 |
| 6429111 | Methods for fabricating an electrode structure The electrode structure of the invention includes a p-type Alx Gay In1-x-y N (0ࣘxࣘ1, 0ࣘyࣘ1, x+yࣘ1) semiconductor layer and an electrode layer formed on the semiconductor layer. In the electrode structure, the ele... | 08/06/2002 |
| 6423562 | Contact electrode for n-type gallium nitride-based compound semiconductor and method for forming the same For forming a contact electrode to an n-type contact layer of a gallium nitride-based compound semiconductor, the n-type contact layer of the gallium nitride-based compound semiconductor is exposed to an oxygen plasma to form an oxygen-doped surface layer... | 07/23/2002 |
| 6410946 | Semiconductor device with source and drain electrodes in ohmic contact with a semiconductor layer In order to reduce a contact resistance of an electrode of a semiconductor device, a metal layer is directly formed on a source area and a drain area so as to form a source electrode and a drain electrode without providing a cap layer thereunder. Conseque... | 06/25/2002 |
| 6410944 | Epitaxial structure for low ohmic contact resistance in p-type GaN-based semiconductors Disclosed are an epitaxial structure for low ohmic contact resistance in p-type GaN-based semiconductors and a method for growing such a structure. A very high density of p-type doped GaAs or p-type graded Alx Ga1-x As (0 | 06/25/2002 |
| 6392262 | Compound semiconductor device having low-resistive ohmic contact electrode and process for producing ohmic electrode An indium layer sandwiched between palladium layers are treated with heat so that the indium is diffused into a p-type gallium arsenide, and is alloyed with the palladium, whereby the p-type indium gallium arsenide layer decreases a Schottky barrier betwe... | 05/21/2002 |
| 6365969 | Ohmic electrode, method of manufacturing the same and semiconductor device An ohmic electrode consists of a plurality of metal layers stacked on a p-type group III-V semiconductor crystal base material, in which a layer consisting of a group VB metal is stacked as a first layer as viewed from the side of the base material and a ... | 04/02/2002 |
| 6329716 | Contact electrode for N-type gallium nitride-based compound semiconductor and method for forming the same For forming a contact electrode to an n-type contact layer of a gallium nitride-based compound semiconductor, the n-type contact layer of the gallium nitride-based compound semiconductor is exposed to an oxygen plasma to form an oxygen-doped surface layer... | 12/11/2001 |
| 6326294 | Method of fabricating an ohmic metal electrode for use in nitride compound semiconductor devices A method of fabricating on ohmic metal electrode. The p-type ohmic metal electrode according to the present invention employs Ru and RuOx as the cover layer in lieu of conventional Au, in order to effectively prevent penetration by contaminants... | 12/04/2001 |
| 6316793 | Nitride based transistors on semi-insulating silicon carbide substrates A high electron mobility transistor (HEMT) is disclosed that includes a semi-insulating silicon carbide substrate, an aluminum nitride buffer layer on the substrate, an insulating gallium nitride layer on the buffer layer, an active structure of aluminum ... | 11/13/2001 |
| 6313534 | Ohmic electrode, method and multi-layered structure for making same To realize an ohmic electrode having practically satisfactory characteristics relative to GaAs semiconductors, first formed on an n+ -type GaAs substrate are a Ni thin film with a thickness between 8 nm and 30 nm, an In thin film with a thickne... | 11/06/2001 |
| 6287946 | Fabrication of low resistance, non-alloyed, ohmic contacts to InP using non-stoichiometric InP layers A method of reducing the specific contact resistivity of a metal to semiconductor interface between a metal contact and an InP semiconductor compound. The method includes the step of increasing the amount of the group V element (P) in the semiconductor co... | 09/11/2001 |
| 6281528 | Ohmic contact improvement between layer of a semiconductor device An electrode having a good contact between a semiconductor substrate and an electrode film is formed in a semiconductor device, and a manufacturing method therefor. On first AlGaAs of a compound semiconductor substrate, a second semiconductor layer of sec... | 08/28/2001 |
| 6258616 | Method of making a semiconductor device having a non-alloyed ohmic contact to a buried doped layer A semiconductor device having a buried doped layer of semiconductor material and a non-alloyed contact to the buried doped layer. The non-alloyed contact is made ohmic by the presence of an underlying delta-doped monolayer. The semiconductor device is mad... | 07/10/2001 |
| 6239490 | P-contact for a Group III-nitride semiconductor device and method of making same A p-contact that comprises a contact layer of a p-type Group III-nitride semiconductor having an exposed surface and an electrode layer of palladium (Pd) located on the exposed surface of the contact layer. The p-contact is made by providing a p-type Grou... | 05/29/2001 |
| 6228673 | Method of fabricating a surface coupled InGaAs photodetector A photodetector is fabricated in a multilayer structure having a semi-insulating InP substrate, an n+ InP contact layer overlying the InP substrate, an undoped InGaAs absorbing layer overlying the n+ InP contact layer, and a p+ doped InGaAs layer overlyin... | 05/08/2001 |
| 6222204 | Electrode structure and method for fabricating the same The electrode structure of the invention includes a p-type Alx Gay In1-x-y N (0ࣘxࣘ1, 0ࣘyࣘ1, x+yࣘ1) semiconductor layer and an electrode layer formed on the semiconductor layer. In the electrode structure, the ele... | 04/24/2001 |
| 6207976 | Semiconductor device with ohmic contacts on compound semiconductor and manufacture thereof A first surface layer made of compound semiconductor material is defined in a surface area of a substrate. A first intermediate layer is formed on the surface layer, the first intermediate layer being made of compound material having Ga as a III group ele... | 03/27/2001 |
| 6201291 | Semiconductor device and method of manufacturing such a device A semiconductor device, for example an IC, having conductor tracks (3) of a metal (3) exhibiting a better conductance than aluminium, such as copper, silver, gold or an alloy thereof. The tracks are situated on an insulating layer (2) and are connected to... | 03/13/2001 |
| 6191021 | Method of forming a low-resistance contact on compound semiconductor Generally, and in one form of the invention, a method is disclosed for forming an ohmic contact on a GaAs surface 20 comprising the steps of depositing a layer of InGaAs 22 over the GaAs surface 20, and depositing a layer of TiW 24 on the layer of InGaAs ... | 02/20/2001 |
| 6188137 | Ohmic electrode structure, semiconductor device including such ohmic electrode structure, and method for producing such semiconductor device An ohmic electrode structure includes an n-Inx Ga1-x As layer where 0 | 02/13/2001 |
| 6165859 | Method for making InP heterostructure devices The specification describes a metal contact material optimized for diffused contacts to the buried emitter-base junction in DHBT devices. The metal contact material is a multilayer structure of Pd--Pt--Au which gives the required critical diffusion proper... | 12/26/2000 |
| 6146931 | Method of forming a semiconductor device having a barrier layer interposed between the ohmic contact and the schottky contact A semiconductor device includes an ohmic electrode and a Schottky electrode respectively carrying interconnection patterns with intervening adhesion layer and a diffusion barrier layer, wherein the Schottky electrode further includes a metal layer that pr... | 11/14/2000 |