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| Number | Title | Issue Date |
| 7397126 | Semiconductor device The present invention provides inhibiting an electrical leakage caused by anion migration. A trenched portion 15 is provided as ion migration-preventing zone between a source electrode 4 and a gate electrode 5. The trenched portion 15 is ... | 07/08/2008 |
| 7352031 | Electrostatic-breakdown-preventive and protective circuit for semiconductor-device A compact electrostatic-breakdown-preventive and protective circuit for a semiconductor-device capable of performing high-speed operations includes first and second protective transistors. The distance from a contact hole for connecting an impurity diffusion layer s... | 04/01/2008 |
| 7332754 | Semiconductor switch In the semiconductor switch of the present invention, the gate electrode, source electrode and drain electrode are formed such that the distance between the gate and the drain of an MESFET, assuming a shunt FET, is longer than the distance between the gate and the d... | 02/19/2008 |
| 7298011 | Semiconductor device with recessed L-shaped spacer and method of fabricating the same A semiconductor device with a recessed L-shaped spacer and a method for fabricating the same. A recessed L-shaped spacer includes a vertical portion and a horizontal portion. The vertical portion is disposed on lower sidewalls of a conductor pattern, exposing upper ... | 11/20/2007 |
| 7229892 | Semiconductor device and method of manufacturing the same A method of manufacturing a semiconductor device, includes preparing a semiconductor substrate, bonding a first semiconductor layer onto a part of the semiconductor substrate with a first insulating layer interposed therebetween, forming a second insulating layer on... | 06/12/2007 |
| 6693335 | Semiconductor raised source-drain structure A semiconductor structure which includes a raised source and a raised drain. The structure also includes a gate located between the source and drains. The gate defines a first gap between the gate and the source and a second gap between the gate and the d... | 02/17/2004 |
| 6686636 | Semiconductor raised source-drain structure A system comprising a memory device that includes at least one semiconductor structure wherein the semiconductor structure includes a raised source, a raised drain, a gate located between the source and the drain, a first capping layer in communication wi... | 02/03/2004 |
| 6683355 | Semiconductor raised source-drain structure A system comprising a memory device that includes at least one semiconductor structure wherein the semiconductor structure includes a raised source, a raised drain, a gate located between the source and the drain, a first capping layer in communication wi... | 01/27/2004 |
| 6677212 | Elevated source/drain field effect transistor and method for making the same A gate oxide film (23), a gate electrode (24) and a gate cap insulating film (25) are stacked on an active region of a p-type semiconductor substrate (21), and an insulating side wall (29) is formed, followed by BF2 ion implantation. Thus, a su... | 01/13/2004 |
| 6674135 | Semiconductor structure having elevated salicided source/drain regions and metal gate electrode on nitride/oxide dielectric A semiconductor structure an a process for its manufacture. First and second gate dielectric layers are formed on a semiconductor substrate between nitride spacers, and a metal gate electrode is formed on the gate dielectric layers. Lightly-doped drain re... | 01/06/2004 |
| 6673663 | Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ... | 01/06/2004 |
| 6660600 | Methods of forming integrated circuitry, methods of forming elevated source/drain regions of a field effect transistor, and methods of forming field effect transistors Methods of forming integrated circuitry, methods of forming elevated source/drain regions, and methods of forming field effect transistors are described. In one embodiment, a transistor gate line is formed over a semiconductive substrate. A layer comprisi... | 12/09/2003 |
| 6656799 | Method for producing FET with source/drain region occupies a reduced area A semiconductor device having a device separation region and an active region includes a gate oxide film, a source/drain region, and an electrode which is electrically coupled to the source/drain region. The active region is in contact with the gate oxide... | 12/02/2003 |
| 6639274 | Semiconductor device A trench lateral MOSFET including a gate region where gate polysilicon is lead out to a substrate surface, and an active region where electric current is driven in a MOSFET operation, and with a trench width, in the gate region Wg, being narrower than a t... | 10/28/2003 |
| 6635522 | Method of forming a MOS transistor in a semiconductor device and a MOS transistor fabricated thereby Methods of forming a MOS transistor and a MOS transistor fabricated thereby are provided. The MOS transistor includes a semiconductor substrate of a first conductivity type, and an insulated gate pattern having sidewalls disposed on a predetermined region... | 10/21/2003 |
| 6627502 | Method for forming high concentration shallow junctions for short channel MOSFETs A method is taught for forming shallow LDD diffusions using polysilicon sidewalls as a diffusion source. The polysilicon sidewalls are formed along side squared-off silicon nitride sidewall spacers which have an essentially rectangular cross section and a... | 09/30/2003 |
| 6624470 | Semiconductor device and a method for manufacturing same A semiconductor device, and method for manufacturing the same, manufactured by a simpler process, compared to a conventional trench lateral power MOSFET for a withstand voltage of 80 V, having a smaller device pitch and lower on-resistance per unit area a... | 09/23/2003 |
| 6600182 | High current field-effect transistor A MOSFET that provides high current conduction at high frequency includes a deposited layer over a substrate of a first conductivity type, with source and drain regions adjoining a top surface of the epitaxial layer. The drain region has a first portion t... | 07/29/2003 |
| 6596606 | Semiconductor raised source-drain structure A method of forming a semiconductor structure which includes a raised source, a raised drain, a gate located between the source and the drain, a first capping layer in communication with at least a portion of the gate and the source, a second capping laye... | 07/22/2003 |
| 6597045 | Semiconductor raised source-drain structure A semiconductor structure which includes a raised source, a raised drain, a gate located between the source and the drain, a first capping layer in communication with at least a portion of the gate and the source, a second capping layer in communication w... | 07/22/2003 |
| 6593618 | MIS semiconductor device having an elevated source/drain structure In the first aspect of the invention, a semiconductor device can effectively suppress the adverse short channel effect and the possible occurrence of junction leak current and has a low resistance diffusion layer to realize a short propagation delay time ... | 07/15/2003 |
| 6573583 | Semiconductor device and method of manufacturing the same Provided is a semiconductor device, comprising a gate electrode formed on a semiconductor substrate, source/drain diffusion layers formed on both sides of the gate electrode, a gate electrode side-wall on the side of the source/drain diffusion layer and a... | 06/03/2003 |
| 6566209 | Method to form shallow junction transistors while eliminating shorts due to junction spiking A method of forming shallow junction MOSFETs is achieved. A gate oxide layer is formed overlying a substrate. A first electrode layer, of polysilicon or metal, is deposited. A silicon nitride layer is deposited. The silicon nitride layer and the first ele... | 05/20/2003 |
| 6563179 | MOS transistor and method for producing the transistor Terminal regions of source/drain zones of an MOS transistor are configured over the substrate in the form of conductive structures, are separated from the substrate by separating layers, and exhibit a larger horizontal cross-section than doped regions for... | 05/13/2003 |
| 6548362 | Method of forming MOSFET with buried contact and air-gap gate structure A method of forming MOSFET with buried contacts and air-gap gate structure is disclosed. The method comprises following steps firstly, a gate is formed of pad oxide layer and a nitride layer sequentially on a silicon substrate, which has trench isolations... | 04/15/2003 |
| 6534840 | Semiconductor device having self-aligned structure A sidewall insulating film is formed on the side faces of a gate electrode on a substrate. A trench isolation film is also formed to be self-aligned with the gate electrode. The upper surface of the trench isolation film reaches a level higher than that o... | 03/18/2003 |
| 6531750 | Shallow junction transistors which eliminating shorts due to junction spiking A method of forming shallow junction MOSFETs is achieved. A gate oxide layer is formed overlying a substrate. A first electrode layer, of polysilicon or metal, is deposited. A silicon nitride layer is deposited. The silicon nitride layer and the first ele... | 03/11/2003 |
| 6515340 | Semiconductor device A semiconductor device having a device separation region and an active region includes a gate oxide film, a source/drain region, and an electrode which is electrically coupled to the source/drain region. The active region is in contact with the gate oxide... | 02/04/2003 |
| 6506651 | Semiconductor device and manufacturing method thereof There are provide a semiconductor device capable of increasing the operating speed of MOS transistors and improving current driving capability, and a method of manufacturing such a semiconductor device. A semiconductor device comprises a silicon substrate... | 01/14/2003 |
| 6504190 | FET whose source electrode overhangs gate electrode and its manufacture method A gate electrode is in Schottky contact with the surface of a semiconductor substrate and extends in a first direction. A drain electrode is disposed on one side of the gate electrode, spaced apart from the gate electrode by some distance, and is in ohmic... | 01/07/2003 |
| 6482691 | Seismic imaging using omni-azimuth seismic energy sources and directional sensing Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ... | 11/19/2002 |
| 6475852 | Method of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ... | 11/05/2002 |
| 6472260 | Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ... | 10/29/2002 |
| 6448120 | Totally self-aligned transistor with tungsten gate A totally self-aligned transistor with a tungsten gate. A single mask is used to align the source, drain, gate and isolation areas. Overlay error is greatly reduced by the use of a single mask for these regions. A mid-gap electrode is also self-aligned to... | 09/10/2002 |
| 6413823 | Methods of forming field effect transistors Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ... | 07/02/2002 |
| 6410967 | Transistor having enhanced metal silicide and a self-aligned gate electrode A transistor and a method for making a transistor are described. A metal layer is formed upon a semiconductor substrate, and a masking layer is formed upon the metal layer. The masking layer is patterned to form an opening therein, and portions of the met... | 06/25/2002 |
| 6410392 | Method of producing MOS transistor The surface of a silicon substrate is sputter-etched so that silicon clusters sputtered out form a silicon film on a side wall spacer. Then, a metal film of cobalt, titanium or the like is built up on the entire surface. Thereafter, silicidizing process i... | 06/25/2002 |
| 6406957 | Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ... | 06/18/2002 |
| 6399451 | Semiconductor device having gate spacer containing conductive layer and manufacturing method therefor A semiconductor device with a gate spacer containing a conductive layer, and a manufacturing method. A first spacer insulation layer is formed on a semiconductor substrate where a gate electrode is formed. Then, the first spacer insulation layer is etched... | 06/04/2002 |
| 6400002 | Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ... | 06/04/2002 |
