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| Number | Title | Issue Date |
| 7345326 | Electric signal transmission line An electric signal transmission line includes a signal electrode portion, a ground electrode portion and a dielectric portion formed on a semiconductor substrate. The signal electrode portion has a metal electrode through which an electric signals flows. The ground ... | 03/18/2008 |
| 7304335 | Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performance and high scaling down density A vertical-conduction and planar-structure MOS device having a double thickness gate oxide includes a semiconductor substrate including spaced apart active areas in the semiconductor substrate and defining a JFET area therebetween. The JFET area also forms a channel... | 12/04/2007 |
| 6201269 | Junction field effect transistor and method of producing the same For suppressing generation of leakage current and side-gate effect in a junction field effect transistor, a gate extension is formed on a semi-insulative compound semiconductor substrate in a manner to extend from a gate and to protrude outward beyond a c... | 03/13/2001 |
| 6034385 | Current-limiting semiconductor configuration A semiconductor configuration includes a first semiconductor region which has a predetermined conductivity type and a first surface. There is a contact region disposed on the first surface of the first semiconductor region. There is a second semiconductor... | 03/07/2000 |
| 6020607 | Semiconductor device having junction field effect transistors An N- type epitaxial layer is formed on a P type semiconductor substrate, and a P+ type insulative isolating layer is so formed as to reach the semiconductor substrate from the surface of the N- type epitaxial layer to ... | 02/01/2000 |
| 5907168 | Low noise Ge-JFETs A Germanium junction field effect transistor (Ge-JFET) is fabricated in a manner to produce low noise and which is particularly suitable for a cryogenic detector. The Ge-JFET in accordance with the present invention comprises a germanium base material on ... | 05/25/1999 |
| 5789771 | Camel-gate field-effect transistor with multiple modulation-doped channels The invention relates to the structure of the camel-gate field-effect transistor with multiple modulation-doped channels. The device structure, from the bottom to the top in succession, includes the substrate, the buffer layer, the multiple modulation-dop... | 08/04/1998 |
| 5773891 | Integrated circuit method for and structure with narrow line widths In a sub-micron line width process, a first layer of polysilicon 13 is patterned into lines 1,2 spaced a predetermined distance. An oxide layer 11 is deposited. A second layer of polysilicon 14 is deposited on the insulating layer. A gate contact 19 or em... | 06/30/1998 |
| 5747842 | Epitaxial overgrowth method and devices A vertical field effect transistor (100) and fabrication method with buried gates; (104) having spaced apart gate fingers and connecting structure and overgrown with source and channel epilayer followed by a doping connection of the gate fingers and conne... | 05/05/1998 |
| 5661318 | Junction type field-effect transistor A junction type field-effect transistor in accordance with the invention includes a multi-layer structure which includes a first undoped semiconductor layer, a first first-conductive type semiconductor layer and a second undoped semiconductor layer. These... | 08/26/1997 |
| 5639688 | Method of making integrated circuit structure with narrow line widths In a sub-micron line width process, a first layer of polysilicon 13 is patterned into lines 1,2 spaced a predetermined distance. An oxide layer 11 is deposited. A second layer of polysilicon 14 is deposited on the insulating layer. A gate contact 19 or em... | 06/17/1997 |
| 5610085 | Method of making a vertical FET using epitaxial overgrowth A vertical field effect transistor (1700) and fabrication method with buried gates (1704) having spaced apart gate fingers and connecting structure and overgrown with source and channel epilayer followed by a doping connection of the gate fingers and conn... | 03/11/1997 |
| 5585654 | Field effect transistor having saturated drain current characteristic A field effect transistor has the property that the product of its series resistance and its true transconductance is less than one throughout the entire range of drain voltage in the operative state of the transistor, the series resistance being the sum ... | 12/17/1996 |
| 5557119 | Field effect transistor having unsaturated drain current characteristic A field effect transistor has the property that the product of its active total series resistance and its true transconductance is less than one throughout the entire range of drain voltage in the operative state of this transistor, the active total serie... | 09/17/1996 |
| 5554561 | Epitaxial overgrowth method A vertical field effect transistor (100) and fabrication method with buried gates (104) having spaced apart gate fingers and connecting structure and overgrown with source and channel epilayer followed by a doping connection of the gate fingers and connec... | 09/10/1996 |
| 5510632 | Silicon carbide junction field effect transistor device for high temperature applications A silicon carbide (SiC) junction field effect transistor (JFET) device is fabricated upon a substrate layer, such as a p type conductivity SiC substrate, using ion implantation for the source and drain areas. A SiC p type conductivity layer is epitaxially... | 04/23/1996 |
| 5444281 | Charge transfer device capable of suppressing reset noise In a charge transfer device incorporating a charge-coupled device, a junction type field-effect transistor, and a reset transistor, the junction type field-effect transistor includes a source region in contact with a junction gate region and a drain regio... | 08/22/1995 |
| 5378642 | Method of making a silicon carbide junction field effect transistor device for high temperature applications A silicon carbide (SiC) junction field effect transistor (JFET) device is fabricated upon a substrate layer, such as a p type conductivity SiC substrate, using ion implantation for the source and drain areas. A SiC p type conductivity layer is epitaxially... | 01/03/1995 |
| 5359214 | Field effect devices formed from porous semiconductor materials A field effect transistor device constructed in accordance with the present invention includes a channel of semiconductive material such as silicon having at least one row of pores extending therethrough. Internal pn junctions are fabricated within the po... | 10/25/1994 |
| 5321283 | High frequency JFET The junction field effect transistors (JFETs) of this invention have improved breakdown voltage capability, reduced on-resistance and improved overdrive capability. The JFET on-resistance is decreased by ion-implanting an insulating layer covering a layer... | 06/14/1994 |
| 5309007 | Junction field effect transistor with lateral gate voltage swing (GVS-JFET) A field effect transistor having a buried gate, and one or more gates disposed along the channel between the source and drain, which cooperate to cause the electric field within the channel along its length to be more uniform, and have a lower field maxim... | 05/03/1994 |
| 5248626 | Method for fabricating self-aligned gate diffused junction field effect transistor A method for fabricating a self-aligned, gate diffused junction field eff transistor is provided which includes the steps of forming an n-type layer on an indium phosphide, semi-insulating substrate; forming spaced apart source/drain metal contacts on th... | 09/28/1993 |
| 5153695 | Semiconductor gate-controlled high-power capability bipolar device A gate-turn-off power semiconductor device of the GTO or FCTh type, having a control zone of alternately arranged finely subdivided cathode fingers and gate trenches, wherein the gate trenches are constructed as narrow deep slots, preferably by a crystal-... | 10/06/1992 |
| 5036017 | Method of making asymmetrical field effect transistor A method of making a field effect transistor includes forming an active layer in a semiconductor substrate, forming a gate material on a portion of the surface as an ion implantation mask, implanting dopant ions to form a source region, depositing a first... | 07/30/1991 |
| 5027180 | Double gate static induction thyristor A double gate static induction thyristor comprises a semiconductor substrate, a first gate region formed at a first principal surface of the substrate, and a first semiconductor region of a first conduction type formed on the same first principal surface.... | 06/25/1991 |
| 5017991 | Light quenchable thyristor device A thyristor device comprising an SI (Static induction) thyristor or beam base thyristor and an SIT (static induction transistor) or SIT-mode bipolar transistor connected to the gate of the thyristor in order to make it possible to turn-on and-off a direct... | 05/21/1991 |
| 5011785 | Insulator assisted self-aligned gate junction A high transconductance, low capacitance, low leakage compound semiconduc junction field effect transistor (JFET) enhances the low leakage current while having the advantages of a self-aligned JFET including low capacitance and low source-drain resistanc... | 04/30/1991 |
| 5012305 | High speed junction field effect transistor for use in bipolar integrated circuits A high speed BIFET junction field effect transistor is formed in an epitaxial layer of one conductivity type and includes source and drain regions of opposite conductivity type interconnected by a thin channel region of the opposite conductivity type. A t... | 04/30/1991 |
| 5001535 | Static induction type thyristor In a static induction type thyristor comprising a low impurity concentration channel region having opposed first and second major surfaces, a first main electrode region having one conductivity type and a second main electrode region having another conduc... | 03/19/1991 |
| 4984049 | Static induction thyristor A static induction thyristor having a mesh like gate region in front of the cathode, and between the gate region and the cathode a high resistance region having effective impurity concentration of 1011 cm-3 -5×1014 cm | 01/08/1991 |
| 4975755 | Optically controllable static induction thyristor device A semiconductor device comprises a static induction thyristor and a photosensitive element connected to a gate of the static induction thyristor so that the static induction thyristor is controlled optically. A plurality of the semiconductor devices are e... | 12/04/1990 |
| 4952990 | Gate turn-off power semiconductor component In a gate turn-off power semiconductor component in the form of a field-controlled thyristor (FCTh) with (14) separated from each other by trenches (10), means of control which make possible a constricton of the current-carrying channel over the entire de... | 08/28/1990 |
| 4935798 | Static induction type thyristor In a static induction type thyristor comprising a low impurity concentration channel region having opposed first and second major surfaces, a first main electrode region having one conductivity type and a second main electrode region having another conduc... | 06/19/1990 |
| 4903091 | Heterojunction transistor having bipolar characteristics A heterojunction transistor has a first semiconductor layer of a semi-insulating or a low impurity concentration, a second semiconductor layer formed on the first semiconductor layer and made of such a semiconductor material that, in cooperation with the ... | 02/20/1990 |
| 4876579 | Low top gate resistance JFET structure A JFET having top gate contact regions formed in either one or both of the source and drain regions at and contacting a substantial portion of the edge terminations of the top gate in the source and drain regions. The improved top gate contact region can ... | 10/24/1989 |
| 4873564 | Conductivity-modulated FET with improved pinch off-ron performance The constraint on the channel thickness of a conductivity-modulated FET is reduced by forming the junction gate region of a pair of differentially doped regions, one inside the other. The first, larger region, which extends from the surface of the island ... | 10/10/1989 |
| 4872044 | Static induction type thyristor In a static induction type thyristor comprising a low impurity concentration channel region having opposed first and second major surfaces, a first main electrode region having one conductivity type and a second main electrode region having another conduc... | 10/03/1989 |
| 4870028 | Method of making double gate static induction thyristor A double gate static induction thyristor comprises an n- semiconductor substrate having first and second principal surfaces opposite to each other. An n- epitaxial semiconductor layer is formed on the first principal surface of the ... | 09/26/1989 |
| 4843441 | High frequency, high power field effect transistor A high-frequency, low-gate leakage, low-noise, lateral junction field-effect transistor has a short, heavily doped channel of length determined by the dimensions of a backgate within a semiconductor substrate, and a more lightly doped drift region adjacen... | 06/27/1989 |
| 4837608 | Double gate static induction thyristor and method for manufacturing the same A double gate static induction thyristor comprises an n- semiconductor substrate having first and second principal surfaces opposite to each other. An n- epitaxial semiconductor layer is formed on the first principal surface of the s... | 06/06/1989 |
