Class 257/E29.055 - With vertical doping variation (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E29.051. This
No. of patents: 94
Last issue date: 01/06/2004

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Number	Title	Issue Date
6673663	Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	01/06/2004
6670685	Method of manufacturing and structure of semiconductor device with floating ring structure A high voltage semiconductor device includes a drain region disposed within a semiconductor substrate. The semiconductor device further includes a field oxide layer disposed outwardly from the drain region of the semiconductor substrate. The semiconductor...	12/30/2003
6667522	Silicon wafers for CMOS and other integrated circuits Techniques include heating a substantially uniformly boron-doped wafer to achieve a significantly increased resistivity in a near-surface region of the wafer and forming at least one electrical circuit element in the near-surface region. Integrated circui...	12/23/2003
6667200	Method for forming transistor of semiconductor device A method for forming a transistor of a semiconductor device, including the step of forming channel layers of a first and a second conductive types, performing high temperature thermal process to form stabilized channel layers and forming an epitaxial chan...	12/23/2003
6656800	Method of manufacturing semiconductor device including process for implanting impurities into substrate via MOS transistor gate electrode and gate insulation film A gate oxide film and a first layer of a multi-layered gate electrode are stacked on a substrate and by a gate prefabrication technique, an oxide layer of an element isolation region is formed in a self-alignment manner using the first layer of the gate e...	12/02/2003
6639273	Silicon carbide n channel MOS semiconductor device and method for manufacturing the same A silicon carbide n channel MOS semiconductor device is provided which includes a silicon carbide substrate including a p base region, an n30 source region and an n+ drain region, a gate insulating film formed on a surface of the p ...	10/28/2003
6624451	High frequency field effect transistor with carrier extraction to reduce intrinsic conduction A field effect transistor (FET) is of the type which employs base biasing to depress the intrinsic contribution to conduction and reduce leakage current. It incorporates four successive layers (102 to 108): a p+ InSb base layer (102), a p+...	09/23/2003
6617653	MISFET P-type active region 12; n-type source/drain regions 13a and 13b; gate insulating film 14 made of a thermal oxide film; gate electrode 15; source/drain electrodes 16a and 16b, are provided over a p-type SiC substrate 11. In the active region 12, p-type he...	09/09/2003
6599804	Fabrication of field-effect transistor for alleviating short-channel effects Short-channel threshold voltage roll-off and punchthrough in an IGFET (40 or 42) having a channel zone (64 or 84) situated in body material (50) are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a loc...	07/29/2003
6566696	Self-aligned VT implant Integrated circuits with transistors exhibiting improved junction capacitances and various methods of fabricating the same are provided. In one aspect, a method of manufacturing is provided that includes forming a doped region in an active area of a subst...	05/20/2003
6548842	Field-effect transistor for alleviating short-channel effects An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local su...	04/15/2003
6541829	Semiconductor device and method of manufacturing the same A semiconductor device has a first semiconductor region formed in a semiconductor substrate and having a first conductivity type due to first-conductivity-type active impurities contained in the first semiconductor region, and a second semiconductor regio...	04/01/2003
6506640	Multiple channel implantation to form retrograde channel profile and to engineer threshold voltage and sub-surface punch-through Submicron-dimensioned, MOSFET devices are formed using multiple implants for forming an impurity concentration distribution profile exhibiting three impurity concentration peaks at a predetermined depths below the semiconductor surface substrate. The inve...	01/14/2003
6503805	Channel implant through gate polysilicon A field effect transistor having a doped region in the substrate immediately underneath the gate of the transistor and interposed between the source and drain of the transistor is provided. The doped region has a retrograde dopant profile such that the do...	01/07/2003
6495891	Transistor having impurity concentration distribution capable of improving short channel effect A semiconductor device has source and drain regions, a gate insulating film, a gate electrode, and a channel region. The channel region includes a region where carriers move between the source and drain regions. An impurity concentration of the channel re...	12/17/2002
6486510	Reduction of reverse short channel effects by implantation of neutral dopants A FET with reduced reverse short channel effects is described, as well as a method to make said FET. Germanium is implanted throughout a semiconductor substrate at an intensity and dose such that a peak ion concentration is created below the source and dr...	11/26/2002
6482691	Seismic imaging using omni-azimuth seismic energy sources and directional sensing Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	11/19/2002
6475852	Method of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	11/05/2002
6472260	Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	10/29/2002
6461920	Semiconductor device and method of manufacturing the same In a semiconductor device, a plurality of MIS transistors of the same conductivity type having different thresholds are formed at a main surface of semiconductor substrate, and impurity profiles on section extending in a depth direction from the main surf...	10/08/2002
6444550	Laser tailoring retrograde channel profile in surfaces A semiconductor device having a retrograde channel profile is achieved by forming a retrograde impurity region in the surface portion of a semiconductor substrate, and subsequently forming a semiconductor layer on the retrograde impurity region at a prede...	09/03/2002
6413823	Methods of forming field effect transistors Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	07/02/2002
6406957	Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	06/18/2002
6407428	Field effect transistor with a buried and confined metal plate to control short channel effects A field effect transistor (FET) is formed on a silicon on insulator (SOI) substrate in the thin silicon layer above the insulating buried oxide layer. The channel region of the FET includes a buried and confined metal plate for controlling short channel e...	06/18/2002
6400002	Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	06/04/2002
6380041	Semiconductor with laterally non-uniform channel doping profile and manufacturing method therefor An ultra-large scale integrated circuit semiconductor device having a laterally non-uniform channel doping profile is manufactured by using a Group IV element implant at an implant angle of between 0° to 60° from the vertical to create interstitials in ...	04/30/2002
6380036	Semiconductor device and method of manufacturing the same A boron diffusion region is formed at a surface of a silicon substrate. A pair of n-type source/drain regions are formed at a surface of boron diffusion region. A gate electrode is formed at a region located between paired source/drain regions with a gate...	04/30/2002
6365475	Method of forming a MOS transistor The present invention provides a method of forming a Metal Oxide Semiconductor (MOS) transistor on a substrate of a semiconductor wafer. A gate of the MOS transistor is formed on the substrate. A source and a drain of the MOS transistor are then formed in...	04/02/2002
6352912	Reduction of reverse short channel effects by deep implantation of neutral dopants A FET with reduced reverse short channel effects is described, as well as a method to make said FET. Germanium is implanted throughout a semiconductor substrate at an intensity and dose such that a peak ion concentration is created below the source and dr...	03/05/2002
6344382	Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	02/05/2002
6335246	Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	01/01/2002
6335234	Methods of forming field effect transistors and related field effect transistor constructions Methods of forming field effect transistors and related field effect transistor constructions are described. A masking layer is formed over a semiconductive substrate and an opening having sidewalls is formed therethrough. The opening defines a substrate ...	01/01/2002
6329271	Self-aligned channel implantation A short channel insulated gate field effect transistor has within the semiconductor body that houses the transistor a buried layer of the same conductivity type as the body but of higher impurity concentration. The buried layer is below the channel region...	12/11/2001
6323520	Method for forming channel-region doping profile for semiconductor device A method for forming a semiconductor device with a doped channel-region, and the device formed therefrom. In one embodiment, the method invention is comprised of two principal steps. The first step is to provide a semiconductor substrate to which the foll...	11/27/2001
6312981	Method for manufacturing semiconductor device A method for producing a semiconductor device includes the steps of: forming an impurity diffusion layer for controlling a threshold voltage by ion implantation; and conducting a high-temperature rapid heat treatment for recovering crystal defects generat...	11/06/2001
6297530	Self aligned channel implantation A short channel insulated gate field effect transistor has within the semiconductor body that houses the transistor a buried layer of the same conductivity type as the body but of higher impurity concentration. The buried layer is below the channel region...	10/02/2001
6274415	Self-aligned Vt implant Integrated circuits with transistors exhibiting improved junction capacitances and various methods of fabricating the same are provided. In one aspect, a method of manufacturing is provided that includes forming a doped region in an active area of a subst...	08/14/2001
6255693	Ion implantation with programmable energy, angle, and beam current A method and apparatus for performing multiple implantations in a semiconductor wafer is used to set variable implantation waveforms. An implanter is used, which allows for setting of variable waveforms, corresponding to energy, beam current, and angle, u...	07/03/2001
6251718	Method for manufacturing semiconductor device A method for producing a semiconductor device includes the steps of: forming an impurity diffusion layer for controlling a threshold voltage by ion implantation; and conducting a high-temperature rapid heat treatment for recovering crystal defects generat...	06/26/2001
6245649	Method for forming a retrograde impurity profile A method for forming a retrograde impurity profile in a semiconducting substrate is provided. The method comprises forming a sacrificial layer having a thickness in the range of about 10 Å to about 150 Å on the surface of a semiconducting substrate. The...	06/12/2001

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Class 257/E29.055 - With vertical doping variation (EPO)