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| Number | Title | Issue Date |
| 7417282 | Vertical double-diffused metal oxide semiconductor (VDMOS) device incorporating reverse diode The present invention disclosed herein is a Vertical Double-Diffused Metal Oxide Semiconductor (VDMOS) device incorporating a reverse diode. This device includes a plurality of source regions isolated from a drain region. A source region in close proximity to the dr... | 08/26/2008 |
| 7411272 | Semiconductor device and method of forming a semiconductor device A power semiconductor device has an active region that includes a drift region. At least a portion of the drift region is provided in a membrane which has opposed top and bottom surfaces. In one embodiment, the top surface of the membrane has electrical terminals co... | 08/12/2008 |
| 7408206 | Method and structure for charge dissipation in integrated circuits Methods and structures and methods of designing structures for charge dissipation in an integrated circuit on an SOI substrate. A first structure includes a charge dissipation ring around a periphery of the integrated circuit chip and one or more charge dissipation ... | 08/05/2008 |
| 7388266 | Structure for leakage prevention of a high voltage device A structure for preventing leakage of a high voltage device is provided. The structure comprises a conductive layer, for shielding the features beneath thereof, located under a conductive line which crosses over a region having high voltage device. The conductive la... | 06/17/2008 |
| 7384826 | Method of forming ohmic contact to a semiconductor body A process for forming an ohmic contact on the back surface of a semiconductor body includes depositing a donor layer on the back surface of the semiconductor body followed by a sintering step to form a shallow intermetallic region capable of forming a low resistance... | 06/10/2008 |
| 7352003 | Electro-optical device having thin film transistor with LDD region An electro-optical device, such as a camera, includes a display unit having a thin film transistor including a source region, a drain region, a channel region formed between the source and drain regions, and a LDD region formed between the channel region and at leas... | 04/01/2008 |
| 7348657 | Electrostatic discharge protection networks for triple well semiconductor devices An electrostatic discharge protection network that uses triple well semiconductor devices either singularly or in a series configuration. The semiconductor devices are preferably in diode junction type configuration. ... | 03/25/2008 |
| 7345341 | High voltage semiconductor devices and methods for fabricating the same High voltage semiconductor devices and methods for fabricating the same are provided. An exemplary embodiment of a semiconductor device capable of high-voltage operation, comprising a substrate comprising a first well formed therein. A gate stack is formed overlying... | 03/18/2008 |
| 7288799 | Semiconductor device and fabrication method thereof A semiconductor device includes a semiconductor substrate, a circuit part formed on and above the semiconductor substrate, a passivation film covering the circuit part, an electrode pad provided outside the circuit part in such a manner that the electrode pad is exp... | 10/30/2007 |
| 7276772 | Semiconductor device A semiconductor device, including: a semiconductor substrate of a first conduction type; an active region used as a function-element-forming region on the semiconductor substrate; a low-resistance region of a second conduction type formed on an outermost periphery o... | 10/02/2007 |
| 7253487 | Integrated circuit chip having a seal ring, a ground ring and a guard ring An integrated circuit chip is provided. The chip includes a silicon substrate, a circuit, a seal ring, a ground ring and a guard ring. The circuit is formed on the silicon substrate and has an input/output (I/O) pad. The seal ring is formed on the silicon substrate ... | 08/07/2007 |
| 7247921 | Semiconductor apparatus and method of manufacturing same, and method of detecting defects in semiconductor apparatus A semiconductor apparatus includes a semiconductor substrate having a device region and a periphery region surrounding the device region; a semiconductor device provided in the device region of the semiconductor substrate; a first electrode pad provided on the semic... | 07/24/2007 |
| 7221021 | Method of forming high voltage devices with retrograde well A high voltage device with retrograde well is disclosed. The device comprises a substrate, a gate region formed on the substrate, and a retrograde well placed in the substrate next to the gate region, wherein the retrograde well reduces a dopant concentration on the... | 05/22/2007 |
| 7205628 | Semiconductor device A semiconductor device, including: a semiconductor substrate of a first conduction type; an active region used as a function-element-forming region on the semiconductor substrate; a low-resistance region of a second conduction type formed on an outermost periphery o... | 04/17/2007 |
| 7176539 | Layout of semiconductor device with substrate-triggered ESD protection A semiconductor device with substrate-triggered ESD protection has a guard ring, a first MOS transistor array, a second MOS transistor array, a substrate-triggered portion, and an N-well. The first MOS transistor array, the second MOS transistor array, the substrate... | 02/13/2007 |
| 7173315 | Semiconductor device In a semiconductor device in which a control circuit region and a power transistor region are formed, a first dummy region is formed between a ground side transistor composing a push-pull circuit and the control circuit region while a second dummy region is formed b... | 02/06/2007 |
| 7157779 | Semiconductor device with triple surface impurity layers An operational withstand voltage of a high voltage MOS transistor is enhanced and a variation in a saturation current Idsat is suppressed. A gate insulation film is formed on a P-type semiconductor substrate. A gate electrode is formed on the gate insulation film. A... | 01/02/2007 |
| 7135718 | Diode device and transistor device A semiconductor device having improved breakdown voltage is provided. A diode device of the present invention includes relay diffusion layers provided between guard ring portions. Therefore, a depletion layer expanded outward from the guard ring portions except the ... | 11/14/2006 |
| 6972460 | Semiconductor device and manufacturing method thereof A semiconductor device including a drift layer of a first conductivity type formed on a surface of a semiconductor substrate. A surface of the drift layer has a second area positioned on an outer periphery of a first area. A cell portion formed in the first area inc... | 12/06/2005 |
| 6693339 | Semiconductor component and method of manufacturing same A semiconductor component includes a first semiconductor region (110, 210) having a first conductivity type and a second semiconductor region (120, 220) above the first semiconductor region and having a second conductivity type. The semiconductor componen... | 02/17/2004 |
| 6683328 | Power semiconductor and fabrication method A power semiconductor containing an anode disposed on either a top side or a bottom side is described. A cathode is disposed on the side that is unoccupied by the anode, and edge terminations are provided on the top side. The power semiconductor is charac... | 01/27/2004 |
| 6635944 | Power semiconductor component having a PN junction with a low area edge termination Component having a blocking pn junction having an edge termination structure which is formed by a further, more weakly doped region (5) and a trench (8) formed therein, said trench being filled with a dielectric. The dielectric material in the trench (8) ... | 10/21/2003 |
| 6617652 | High breakdown voltage semiconductor device A high breakdown voltage semiconductor device includes a semiconductor layer, a drain offset diffusion region, a source diffusion region, a drain diffusion region, a buried diffusion region of a first conductivity type that is buried in the drain offset d... | 09/09/2003 |
| 6614089 | Field effect transistor In an N-MOSFET having a Double RESURF structure, an n-drift layer and a p-base layer are formed to be adjacent to each other in the surface of a p-semiconductor active layer. An n+ -drain layer and a p-RESURF layer are formed in the surface of ... | 09/02/2003 |
| 6573550 | Semiconductor with high-voltage components and low-voltage components on a shared die A method and apparatus for increasing a breakdown voltage of a semiconductor device. The semiconductor device is constructed within an epitaxial tub of a first conductivity type formed within a dielectric material and comprises a surface diffusion region ... | 06/03/2003 |
| 6570219 | High-voltage transistor with multi-layer conduction region A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sa... | 05/27/2003 |
| 6566726 | Semiconductor device and power converter using the same To reduce the field intensity on the termination surface, almost not affecting the on-characteristic, a drift layer is made of two layers, an n-layer and n- layer, and a termination region is formed on the surface of the above n- lay... | 05/20/2003 |
| 6555884 | Semiconductor device for providing a noise shield A first guard ring formed by high concentration ion diffusion is established around the transistor formation region of the semiconductor substrate. A second guard ring is established around the first guard ring with a prescribed gap therebetween. A metal ... | 04/29/2003 |
| 6534347 | Edge termination for silicon power devices A silicon semiconductor die comprises a heavily doped silicon substrate and an upper layer comprising doped silicon of a first conduction type disposed on the substrate. The upper layer comprises a well region of a second, opposite conduction type adjacen... | 03/18/2003 |
| 6492679 | Method for manufacturing a high voltage MOSFET device with reduced on-resistance A high voltage MOSFET device (100) has a well region (113) with two areas. The first area (110) has a high dopant concentration and the second area (112) has a low dopant concentration. Inside the well region a region of a secondary conductivity type (108... | 12/10/2002 |
| 6492691 | High integration density MOS technology power device structure High density MOS technology power device structure, including body regions of a first conductivity type formed in a semiconductor layer of a second conductivity type, wherein the body regions include at least one plurality of substantially rectilinear and... | 12/10/2002 |
| 6429501 | Semiconductor device having high breakdown voltage and method for manufacturing the device A power device has its main junction formed in a central portion of an N-type substrate. A P-type layer is formed in a peripheral surface portion of the substrate. A P- -type RESURF layer of a lower impurity concentration than the P-type layer ... | 08/06/2002 |
| 6400003 | High voltage MOSFET with geometrical depletion layer enhancement In a field-effect semiconductor device, for example a power MOSFET, a body portion separates a channel-accommodating region from a drain region at a surface of a semiconductor body. This body portion includes a drift region which serves for current flow o... | 06/04/2002 |
| 6376321 | Method of making a pn-junction in a semiconductor element A pn-junction in a semiconductor element is made in that, within a zone of a first conductivity type, by means of implantation, a first and second zone of a second conductivity type are formed which are initially separated from each other, with subsequent... | 04/23/2002 |
| 6362026 | Edge termination for silicon power devices A silicon semiconductor die comprises a heavily doped silicon substrate and an upper layer comprising doped silicon of a first conduction type disposed on the substrate. The upper layer comprises a well region of a second, opposite conduction type adjacen... | 03/26/2002 |
| 6310365 | Surface voltage sustaining structure for semiconductor devices having floating voltage terminal A surface voltage sustaining structure for semiconductor device which includes at least one high-side high-voltage device, comprises at least two surface voltage sustaining regions, wherein a first surface voltage sustaining region is for sustaining a vol... | 10/30/2001 |
| 6274918 | Integrated circuit diode, and method for fabricating same An integrated circuit (10) includes a P-epi substrate (12) having therein an n-well isolation layer (13) and a p-well (14) within the n-well. The p-well includes adjacent an upper surface thereof a p+ layer (18) having several elongate parallel openings (... | 08/14/2001 |
| 6242784 | Edge termination for silicon power devices A silicon semiconductor die comprises a heavily doped silicon substrate and an upper layer comprising doped silicon of a first conduction type disposed on the substrate. The upper layer comprises a well region of a second, opposite conduction type adjacen... | 06/05/2001 |
| 6236100 | Semiconductor with high-voltage components and low-voltage components on a shared die A method and apparatus for increasing a breakdown voltage of a semiconductor device. The semiconductor device is constructed on a semiconductor substrate including an isolation diffusion region around the semiconductor device, a substrate layer, an epi la... | 05/22/2001 |
| 6215167 | Power semiconductor device employing field plate and manufacturing method thereof A power semiconductor device having an breakdown voltage improving structure and a manufacturing method thereof are provided. A collector region and a base region create a pn junction between them. At least one accelerating region of the same conductivity... | 04/10/2001 |
