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| Number | Title | Issue Date |
| 7397083 | Trench fet with self aligned source and contact A trench type power MOSgated device has a plurality of spaced trenches lined with oxide and filled with conductive polysilicon. The tops of the polysilicon fillers are below the top silicon surface and are capped with a deposited oxide the top of which is flush with... | 07/08/2008 |
| 7372103 | MOS field plate trench transistor device A MOS field plate trench transistor device is disclosed. In one embodiment, in order to obtain a lowest possible on resistance, in the case of a MOS field plate trench transistor device having a body contact hole, it is proposed to form the avalanche breakdown regio... | 05/13/2008 |
| 7335944 | High-voltage vertical transistor with a multi-gradient drain doping profile A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being... | 02/26/2008 |
| 7304331 | Nitride semiconductor device such as transverse power FET for high frequency signal amplification or power control A nitride semiconductor device according to one embodiment of the present invention includes: a non-doped first aluminum gallium nitride (AlxGa1-xN (0≦x≦1)) layer which is formed as a channel layer; a non-doped or n type second aluminum gal... | 12/04/2007 |
| 7304363 | Interacting current spreader and junction extender to increase the voltage blocked in the off state of a high power semiconductor device A technique of spreading current flowing in a semiconductor device comprising an electrode, a drift region adjacent to the electrode, a junction termination extension implant region in the drift region, and a current spreader adjacent to the junction termination ext... | 12/04/2007 |
| 7221011 | High-voltage vertical transistor with a multi-gradient drain doping profile A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being... | 05/22/2007 |
| 7122875 | Semiconductor device A p well serving as a channel region of a MOSFET is formed on one side of an n− layer and an n+ drain region is formed on the other side. Above the n− layer, a plurality of first floating field plates are formed with a first insu... | 10/17/2006 |
| 7119415 | Monolithically integrated circuit comprising a thin film resistor, and fabrication method thereof A monolithically integrated circuit comprises a thin film resistor (8) with low resistance and low temperature coefficient; a high frequency lateral power transistor device (9) including gate (17), source (16) and drain (15) region... | 10/10/2006 |
| 7109562 | High voltage laterally double-diffused metal oxide semiconductor A high voltage laterally double-diffused metal oxide semiconductor (LDMOS) stricture is characterized as follows: the second source electrode metal layer connected to the first source electrode metal layer protrudes out of a certain length relative to the first sour... | 09/19/2006 |
| 6693011 | Power MOS element and method for producing the same A power MOS element includes a drift region with a doping of a first doping type, a channel region with a doping of a second doping type which is complementary to said first doping type and which borders on said channel region and said drift region, and a... | 02/17/2004 |
| 6667213 | Method of fabricating a high-voltage transistor with a multi-layered extended drain structure A method for fabricating a high-voltage transistor with an extended drain region includes forming parallel arranged drift regions, each of which is interleaved with an insulating layer and a conducting layer that functions as a field plate. Source and bod... | 12/23/2003 |
| 6653691 | Radio frequency (RF) power devices having faraday shield layers therein Integrated power devices include a plurality of field effect transistor unit cells and a Faraday shield layer that reduces parasitic gate-to-drain capacitance (Cgd) and concomitantly improves high frequency switching performance. These power devices may i... | 11/25/2003 |
| 6649975 | Vertical power devices having trench-based electrodes therein Vertical power devices include a semiconductor substrate having a drift region of first conductivity type therein and first and second stripe-shaped trenches that extend in the semiconductor substrate and define a drift region mesa therebetween. First and... | 11/18/2003 |
| 6635544 | Method of fabricating a high-voltage transistor with a multi-layered extended drain structure A method for fabricating a high-voltage transistor with an extended drain region includes forming an epitaxial layer on a substrate, the epitaxial layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair ... | 10/21/2003 |
| 6627950 | Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry Power MOSFET apparatus, and method for its production, that suppresses voltage breakdown near the gate, using a polygon-shaped trench in which the gate is positioned, using a shaped deep body junction that partly lies below the trench bottom, and using sp... | 09/30/2003 |
| 6621121 | Vertical MOSFETs having trench-based gate electrodes within deeper trench-based source electrodes Vertical MOSFETs include a semiconductor substrate having a plurality of semiconductor mesas therein that are separated by a plurality of deep stripe-shaped trenches. These stripe-shaped trenches extend in parallel and lengthwise across the substrate in a... | 09/16/2003 |
| 6573550 | Semiconductor with high-voltage components and low-voltage components on a shared die A method and apparatus for increasing a breakdown voltage of a semiconductor device. The semiconductor device is constructed within an epitaxial tub of a first conductivity type formed within a dielectric material and comprises a surface diffusion region ... | 06/03/2003 |
| 6573558 | High-voltage vertical transistor with a multi-layered extended drain structure A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions sepa... | 06/03/2003 |
| 6566708 | Trench-gate field-effect transistors with low gate-drain capacitance and their manufacture Trench-gate field-effect transistors, for example power MOSFETs, are disclosed having trenched electrode configurations (11,23) that permit fast switching of the transistor, while also providing over-voltage protection for the gate dielectric (21) and fac... | 05/20/2003 |
| 6563197 | MOSgated device termination with guard rings under field plate Guard ring diffusions in the termination of a MOSgated device are laterally spaced from one another and are disposed beneath and are insulated from the termination field plate which extends from the periphery of the device active area.... | 05/13/2003 |
| 6559513 | Field-plate MESFET A planar MESFET transistor includes a plurality of FET elements. Each FET element includes a doped planar channel, and source and drain coupled to the ends of the channel. A gate conductor extends over a portion of the channel at a location lying between ... | 05/06/2003 |
| 6555873 | High-voltage lateral transistor with a multi-layered extended drain structure A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions sepa... | 04/29/2003 |
| 6509625 | Guard structure for bipolar semiconductor device A guard ring structure formed around the periphery of a bipolar semiconductor device. A guard region (11) is formed in a substrate (1) of the device so as to extend adjacent a peripheral portion of the device. An insulating layer (3) is formed on the subs... | 01/21/2003 |
| 6507071 | Lateral high-voltage sidewall transistor A lateral high-voltage sidewall transistor configuration includes a low-doped semiconductor substrate of a first conductivity type and a low-doped epitaxial layer of a second conductivity type disposed on the semiconductor substrate. First semiconductor l... | 01/14/2003 |
| 6498382 | Semiconductor configuration The invention relates to a semiconductor configuration in which electrodes are insulated by a gas-filled or evacuated cavity. The semiconductor configuration includes at least two rigid electrodes; body regions; an active zone; a drift path; and an insula... | 12/24/2002 |
| 6492678 | High voltage MOS transistor with gate extension A high voltage MOS transistor with a gate extension that has a reduced electric field in the drain region near the gate is provided. The high voltage MOS transistor includes a first and second gate layers, and a dielectric layer between the gate layers. T... | 12/10/2002 |
| 6483135 | Field effect transistor A field effect transistor includes a semiconductor substrate with a channel layer being formed on its surface, a source electrode and a drain electrode formed at a distance on said semiconductor substrate, and a gate electrode placed between the source el... | 11/19/2002 |
| 6479840 | Diode Disclosed is an inventive diode which can reduce a stray capacity to improve various characteristics thereof, in which a dielectric layer, a conductive layer and a second dielectric layer are respectively formed by deposition in this order on an upper fac... | 11/12/2002 |
| 6468837 | Reduced surface field device having an extended field plate and method for forming the same A semiconductor device (10) comprises a reduced surface field (RESURF) implant (14). A field oxide layer (20), having a length, is formed over the RESURF implant (14). A field plate (12) extends from a near-side of the field oxide layer (20) and over at l... | 10/22/2002 |
| 6468878 | SOI LDMOS structure with improved switching characteristics An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that ... | 10/22/2002 |
| 6465845 | Smart power device and method for fabricating the same A smart power device and method for fabricating the same is disclosed in which an impact ionization to a drain region is reduced thereby securing a wide SOA (Safe Operation Area) and improving current driving characteristics. Such a device includes a smar... | 10/15/2002 |
| 6452245 | Semiconductor device The present invention provides a semiconductor device capable of improving a withstand voltage for a wire placed in the neighborhood of a contact. When the direction in which a wiring layer extends in the direction of a plane as viewed from the top of a s... | 09/17/2002 |
| 6448611 | High power semiconductor device and fabrication method thereof A high power semiconductor device and its fabrication method in which source and the drain regions are spaced apart from and edge of a field oxide layer. This allows the junction profile to become gently-sloped so that the junction breakdown voltage is in... | 09/10/2002 |
| 6444527 | Method of operation of punch-through field effect transistor A trenched field effect transistor suitable especially for low voltage power applications provides low leakage blocking capability due to a gate controlled barrier region between the source region and drain region. Forward conduction occurs through an inv... | 09/03/2002 |
| 6445058 | Bipolar junction transistor incorporating integral field plate A semiconductor process is disclosed which forms a field plate structure that integrally contacts an emitter region of a bipolar junction transistor by construction, without intervening interconnect layers or contacts. In one embodiment, a single-layer po... | 09/03/2002 |
| 6445019 | Lateral semiconductor device for withstanding high reverse biasing voltages A semiconductor body (11) has first and second opposed major surfaces (11a and 11b). First and second main regions (13 and 14) meet the second major surface (11b) and a voltage-sustaining zone is provided between the first and second regions (13 and 14). ... | 09/03/2002 |
| 6426540 | Optimized border of semiconductor components The invention relates to a semiconductor component which is capable of blocking such as an (IGBT), a thyristor, a GTO or diodes, especially schottky diodes. An insulator profile section (10a, 10b, 10c, 10d, 11) provided in the border area of an anode meta... | 07/30/2002 |
| 6423598 | Semiconductor device, a method of manufacturing the same, and a semiconductor device protective circuit A Schottky diode which provides a structure having no P-N junction while improving voltage resistance against a reverse bias when employed in combination with an insulated gate semiconductor device in particular. In order to attain the aforementioned obje... | 07/23/2002 |
| 6414365 | Thin-layer silicon-on-insulator (SOI) high-voltage device structure A thin layer SOI high-voltage device in which the drift charge is depleted using a three-dimensional MOS capacitor structure. The drift region of the high-voltage semiconductor device is doped with a graded charge profile which increases from source-to-dr... | 07/02/2002 |
| 6404025 | MOSFET power device manufactured with reduced number of masks by fabrication simplified processes This invention discloses a semiconductor substrate supports a semiconductor power device. The semiconductor substrate includes a plurality of polysilicon segments disposed over a gate oxide layer including two outermost segments and inner segments wherein... | 06/11/2002 |
