...that "patent leather" got its name because the process of applying the polished black finish to leather was once patented?
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| Number | Title | Issue Date |
| 4403395 | Monolithic integration of logic, control and high voltage interface circuitry Monolithic integration of digital logic circuitry, precision control circuitry, and high voltage interface circuits on the same semiconductor chip is achieved, using various combinations selected from D-MOS, vertical NPN, lateral NPN, PNP, P-MOS, N-MOS, a... | 09/13/1983 |
| 4330849 | Complementary semiconductor memory device Disclosed herein is a semiconductor memory device comprising a semiconductor substrate having a first conductivity type, first and second regions of a second conductivity type opposite to said first type formed in the surface of the semiconductor substrat... | 05/18/1982 |
| 4325180 | Process for monolithic integration of logic, control, and high voltage interface circuitry Monolithic integration of digital logic circuitry, precision control circuitry, and high voltage interface circuits on the same semiconductor chip is achieved, including various combinations selected from D-MOS, vertical NPN, lateral NPN, PNP, P-MOS, N-MO... | 04/20/1982 |
| 4229756 | Ultra high speed complementary MOS device An improved, ultra high speed (2GHz) CMOS inverter structure comprising a double-diffused, planar p-channel transistor and a nonplanar n-channel transistor formed within adjacent surface fields on the same substrate. The n-channel device includes a source... | 10/21/1980 |
| 4223334 | High voltage CMOS with local oxidation for self-aligned guard rings and process of fabrication Complementary MOS devices having spaced guard rings are fabricated by applying an oxide layer to an N substrate with an opening for doping P-type impurities to form a well, applying a nitride layer over a portion of the oxide and of the well portions, dop... | 09/16/1980 |
| 4119996 | Complementary DMOS-VMOS integrated circuit structure A high speed CMOS formed on a single semiconductor substrate includes a DMOS having an asymmetric channel and a VMOS with a relatively short channel length. The short channel length of the VMOS is achieved by: (1) forming a double diffusion along one edge... | 10/10/1978 |
| 4041518 | MIS semiconductor device and method of manufacturing the same A metal-insulator semiconductor (MIS) device is manufactured by initially forming, on a semiconductor substrate, an insulating film having a hole therethrough and depositing silicon on the substrate to form a first monocrystalline silicon film in the hole... | 08/09/1977 |