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| Number | Title | Issue Date |
| 7414274 | Selective oxidation of silicon in diode, TFT and monolithic three dimensional memory arrays The present invention relates to use of selective oxidation to oxidize silicon in the presence of tungsten and/or tungsten nitride in memory cells and memory arrays. This technique is especially useful in monolithic three dimensional memory arrays. In one aspect of ... | 08/19/2008 |
| 7408262 | Semiconductor integrated circuit device A semiconductor integrated circuit device includes a semiconductor chip, a memory cell array arranged on the semiconductor chip and first and second decoder strings arranged along both ends of the memory cell array. The arrangement position of the first decoder stri... | 08/05/2008 |
| 7402854 | Three-dimensional cascaded power distribution in a semiconductor device An IC structure having reduced power loss and/or noise includes two or more active semiconductor regions stacked in a substantially vertical dimension, each active semiconductor region including an active layer. The IC structure further includes two or more voltage ... | 07/22/2008 |
| 7402855 | Split-channel antifuse array architecture Generally, the present invention provides a variable thickness gate oxide anti-fuse transistor device that can be employed in a non-volatile, one-time-programmable (OTP) memory array application. The anti-fuse transistor can be fabricated with standard CMOS technolo... | 07/22/2008 |
| 7397107 | Ferromagnetic capacitor An integrated circuit capacitor having a bottom plate 50a, a dielectric layer 250′, and a ferromagnetic top plate 20a. ... | 07/08/2008 |
| 7391045 | Three-dimensional phase-change memory A three-dimensional phase-change memory array. In one embodiment of the invention, the memory array includes a first plurality of diodes, a second plurality of diodes disposed above the first plurality of diodes, a first plurality phase-change memory elements dispos... | 06/24/2008 |
| 7312487 | Three dimensional integrated circuit A three dimensional (3D) integrated circuit (IC), 3D IC chip and method of fabricating a 3D IC chip. The chip includes multiple layers of circuits, e.g., silicon insulator (SOI) CMOS IC layers, each including circuit elements. The layers may be formed in parallel an... | 12/25/2007 |
| 7304364 | Embossed mask lithography Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transpare... | 12/04/2007 |
| 7283403 | Memory device and method for simultaneously programming and/or reading memory cells on different levels A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus ... | 10/16/2007 |
| 7250329 | Method of fabricating a built-in chip type substrate A method of fabricating a built-in chip type substrate containing a semiconductor chip is disclosed. The method comprises a first step of mounting the semiconductor chip on a substrate; a second step of forming chip connection wiring connected to the semiconductor c... | 07/31/2007 |
| 7233024 | Three-dimensional memory device incorporating segmented bit line memory array A three-dimensional (3D) high density memory array includes multiple layers of segmented bit lines (i.e., sense lines) with segment switch devices within the memory array that connect the segments to global bit lines. The segment switch devices reside on one or more... | 06/19/2007 |
| 6787825 | Data storage and processing apparatus, and method for fabricating the same A data storage/processing apparatus includes ROM and/or WORM and/or REWRITEABLE memory modules and/or processing modules provided as a single main layer or multiple main layers on top of a substrate. Transistors and/or diodes operate the apparatus. In one set of emb... | 09/07/2004 |
| 6750540 | Magnetic random access memory using schottky diode A magnetic random access memory (MRAM) using a Schottky diode is disclosed. In order to achieve high integration of the memory device, a word line is formed on a semiconductor substrate without using a connection layer and a stacked structure including an MTJ cell, ... | 06/15/2004 |
| 6704218 | FeRAM with a single access/multiple-comparison operation A comparator-type sense amplifier compares a constant voltage that was read out of a FeRAM cell to a sequence of reference voltage levels. A multiple-comparison operation includes (a) reading out data to a bit line, (b) applying a first/next reference vol... | 03/09/2004 |
| 6700203 | Semiconductor structure having in-situ formed unit resistors An electronic structure that has in-situ formed unit resistors and a method for fabricating such structure are disclosed. The electronic structure that has in-situ formed unit resistors consists of a first plurality of conductive elements formed in an ins... | 03/02/2004 |
| 6690026 | Method of fabricating a three-dimensional array of active media An apparatus comprising control circuitry formed on a substrate, and a plurality of active media coupled to the control circuitry and formed in a plurality of planes over the substrate. A method comprising forming a pair of junction regions on a substrate... | 02/10/2004 |
| 6690038 | Thyristor-based device over substrate surface A semiconductor device having a thyristor is arranged in a manner that reduces or eliminates manufacturing difficulties commonly experienced in the formation of such devices, as well as facilitates the implementation of the semiconductor device in a varie... | 02/10/2004 |
| 6687147 | Cubic memory array with diagonal select lines A method of creating a memory circuit preferably includes (1) forming a first plurality of select-lines in a plane substantially parallel to a substrate, (2) forming a second plurality of select-lines in a plane substantially parallel to the substrate, wh... | 02/03/2004 |
| 6674131 | Semiconductor power device for high-temperature applications In a SiC substrate (10), a first active region (12) composed of n-type heavily doped layers (12a) and undoped layers (12b), which are alternately stacked, and a second active region (13) composed of p-type heavily doped layers (13a) and undoped layers (13... | 01/06/2004 |
| 6670659 | Ferroelectric data processing device In a ferroelectric data processing device for processing and/or storage of data with passive or electrical addressing a data-carrying medium is used in the form of a thin film (1) of ferroelectric material which by an applied electric field is polarized t... | 12/30/2003 |
| 6670209 | Embedded metal scheme for liquid crystal display (LCD) application A process for forming a planarized metal layer by forming the plug and overlying metal interconnect simultaneously in order to maintain a uniform gap between the passivation layer of a bottom substrate and the top substrate of a LCD integrated circuit dev... | 12/30/2003 |
| 6670642 | Semiconductor memory device using vertical-channel transistors The invention provides a semiconductor memory device comprising a plurality of word lines, a plurality of bit lines, and a plurality of static memory cells each having a first, second, third, fourth, fifth, and sixth transistors. While each of channels of... | 12/30/2003 |
| 6656791 | Semiconductor integrated circuit with resistor and method for fabricating thereof A resistor which have a stable resistance value and a method for fabricating the same without increasing the area of a semiconductor integrated circuit. To prevent a dishing phenomenon, the resistor is formed on the dummy gate electrode structure which ha... | 12/02/2003 |
| 6653712 | Three-dimensional memory array and method of fabrication A multi-level memory array is described employing rail-stacks. The rail-stacks include a conductor and semiconductor layers. The rail-stacks are generally separated by an insulating layer used to form antifuses. In one embodiment, one-half the diode is lo... | 11/25/2003 |
| 6653174 | Thyristor-based device over substrate surface A semiconductor device having a thyristor is manufactured in a manner that reduces or eliminates manufacturing difficulties commonly experienced in the formation of such devices. According to an example embodiment of the present invention, a thyristor is ... | 11/25/2003 |
| 6653677 | Semiconductor constructions The invention includes a method of forming a semiconductor construction. A first substrate is provided which comprises silicon-containing structures separated from one another by an insulative material. The silicon-containing structures define an upper su... | 11/25/2003 |
| 6653181 | CMOS integrated circuit having vertical transistors and a process for fabricating same A process for fabricating a CMOS integrated circuit with vertical MOSFET devices is disclosed. In the process, at least three layers of material are formed sequentially on a semiconductor substrate. The three layers are arranged such that the second layer... | 11/25/2003 |
| 6649422 | Integrated circuit having a micromagnetic device and method of manufacture therefor An integrated circuit and method of manufacturing therefor. In one embodiment, the integrated circuit includes a substrate with an insulator and a capacitor formed over the substrate. The integrated circuit further includes an adhesive formed over the ins... | 11/18/2003 |
| 6646300 | Semiconductor memory device A semiconductor memory device comprises a first transistor including a source region, a drain region, a first channel region of a semiconductor material formed on an insulating film and connecting the source region and the drain region, and a gate electro... | 11/11/2003 |
| 6642575 | MOS transistor with vertical columnar structure A field-effect transistor has a vertical columnar structure to restrain a short channel effect without impairing the operating speed of an element. In a semiconductor device having a field-effect transistor with a vertical columnar structure, an n-type di... | 11/04/2003 |
| 6638834 | Methods of forming semiconductor constructions The invention includes a method of forming a semiconductor construction. A first substrate is provided which comprises silicon-containing structures separated from one another by an insulative material. The silicon-containing structures define an upper su... | 10/28/2003 |
| 6635552 | Methods of forming semiconductor constructions The invention includes a method of forming a semiconductor construction. A first substrate is provided which comprises silicon-containing structures separated from one another by an insulative material. The silicon-containing structures define an upper su... | 10/21/2003 |
| 6636185 | Head-mounted display system A head mounted display system including a high resolution active matrix display which reduces center of gravity offset in a compact design. The active matrix display can be either a liquid crystal display or a light emitting display.... | 10/21/2003 |
| 6632706 | Three dimensional structure integrated circuit fabrication process A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory ci... | 10/14/2003 |
| 6631085 | Three-dimensional memory array incorporating serial chain diode stack A three-dimensional memory array includes a plurality of rail-stacks on each of several levels forming alternating levels of X-lines and Y-lines for the array. Memory cells are formed at the intersection of each X-line and Y-line. The memory cells of each... | 10/07/2003 |
| 6627518 | Method for making three-dimensional device A method for making a three-dimensional device is disclosed. The method includes a step of forming a first cleaving layer, a first intermediate layer, and a first transferred layer on a first translucent substrate and forming a second cleaving layer, a se... | 09/30/2003 |
| 6627530 | Patterning three dimensional structures The invention is directed to a method of forming a three dimensional circuit including introducing a three dimensional circuit over a substrate. In one embodiment, the three dimensional circuit includes a circuit structure in a stacked configuration betwe... | 09/30/2003 |
| 6627953 | High density electronic circuit modules The invention relates to device processing, packaging and interconnects that will yield integrated electronic circuitry of higher density and complexity than can be obtained by using conventional multi-chip modules. Processes include the formation of comp... | 09/30/2003 |
| 6624011 | Thermal processing for three dimensional circuits Postponing at least some thermal processing operations, as multiple levels of a three dimensional circuit are formed.... | 09/23/2003 |
| 6611022 | Semiconductor thin film and its manufacturing method and semiconductor device and its manufacturing method A semiconductor thin film is formed having a lateral growth region which is a collection of columnar or needle-like crystals extending generally parallel with a substrate. The semiconductor thin film is illuminated with laser light or strong light having ... | 08/26/2003 |
