Did You Know...
...that the Band-Aid Bandage was invented by a Johnson & Johnson employee whose wife had cut herself? Earl Dickson's wife was rather accident prone, so he set out to develop a bandage that she could apply without help. He placed a small piece of gauze in the center of a small piece of surgical tape, and what we know today as the Band Aid bandage was born!
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| Number | Title | Issue Date |
| 7414267 | Semiconductor device and process for production thereof Disclosed herein is a semiconductor device with high reliability which has TFT of adequate structure arranged according to the circuit performance required. The semiconductor has the driving circuit and the pixel portion on the same substrate. It is characterized in... | 08/19/2008 |
| 7279753 | Floating base bipolar ESD devices The present invention includes a bipolar ESD device for protecting an integrated circuit from ESD damage. The bipolar ESD device includes a collector connected to a terminal of the integrated circuit, a floating base, and a grounded emitter. When an ESD pulse hits t... | 10/09/2007 |
| 7208766 | Semiconductor device and process for production thereof Disclosed herein is a semiconductor device with high reliability which has TFT of adequate structure arranged according to the circuit performance required. The semiconductor has the driving circuit and the pixel portion on the same substrate. It is characterized in... | 04/24/2007 |
| 7199443 | Integration of filters using on-chip transformers for RF and wireless applications A band pass filter (114) is formed on an integrated circuit (IC) chip (102). Such band pass filter (114) may be used in a RF or wireless communication device, such as a mobile phone or a personal data assistant (PDA). The band pass filter (11... | 04/03/2007 |
| 6670228 | Method of fabricating a polysilicon capacitor utilizing FET and bipolar base polysilicon layers A method of forming a poly-poly capacitor, a MOS transistor, and a bipolar transistor simultaneously on a substrate comprising the steps of depositing and patterning a first layer of polysilicon on the substrate to form a first plate electrode of said cap... | 12/30/2003 |
| 6667207 | High-dielectric constant insulators for FEOL capacitors Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the cap... | 12/23/2003 |
| 6555857 | Semiconductor device The object of the present invention is to provide a semiconductor device, which is suitable for use to connect electric condenser microphones. A semiconductor device, comprises: a conductivity-type substrate; an epitaxial layer formed on top of the substr... | 04/29/2003 |
| 6552406 | SiGe transistor, varactor and p-i-n velocity saturated ballasting element for BiCMOS peripheral circuits and ESD networks An SiGe device configured to exhibit high velocity saturation resistance characteristic for buffering large voltages at low currents, wherein for circuit applications, the SiGe device is connected in series with a circuit element for protection of the cir... | 04/22/2003 |
| 6548873 | Semiconductor device and manufacturing method of the same A semiconductor device causes less element characteristic fluctuation and hardly causes parasitic actions even when a wire having a barrier metal made of a titanium material is provided. The semiconductor device includes a MOS transistor provided on the s... | 04/15/2003 |
| 6541325 | Method for fabricating a capacitor device with BiCMOS process and the capacitor device formed thereby The present invention discloses a simple and convenient method for fabricating a capacitor device with BiCMOS processes. An electrode of the capacitor device formed according to the present invention is an ion doping region formed in an epitaxy layer so t... | 04/01/2003 |
| 6528826 | Depletion type MOS semiconductor device and MOS power IC A depletion type MOS semiconductor device is provided which includes a p- well region formed in a surface layer of an n- drift layer, an n+ emitter region formed in a surface layer of the p31 well region, an n | 03/04/2003 |
| 6522012 | Semiconductor device with HIHG resistivity The present invention is a semiconductor device, which is able to provide a desired output voltage of an ECM without signal loss caused by parasitic capacitances. Such a semiconductor device comprises a semiconductor substrate; integrated network elements... | 02/18/2003 |
| 6511889 | Reference voltage supply circuit having reduced dispersion of an output voltage A reference voltage supply circuit is provided with a PNP transistor. The PNP transistor has an N-type well for a base formed at a surface of a P-type semiconductor substrate. The reference voltage supply circuit is further provided with a resistor elemen... | 01/28/2003 |
| 6462382 | MOS type semiconductor apparatus A MOS type semiconductor apparatus is provided which includes a main MOS type semiconductor device, an internal control circuit connected between a control input terminal (G) and a control input port (g) of the main MOS type semiconductor device, and a pr... | 10/08/2002 |
| 6440811 | Method of fabricating a poly-poly capacitor with a SiGe BiCMOS integration scheme A method for fabricating a poly-poly capacitor integrated with a BiCMOS process which includes forming a lower plate electrode of a poly-poly capacitor during deposition of a gate electrode of a CMOS transistor; and forming an upper SiGe plate electrode d... | 08/27/2002 |
| 6418050 | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device A memory device is described which has an n-channel field effect transistor coupled between a memory cell and a data communication line. An NPN bipolar junction transistor is also coupled between the memory cell and the data communication line in parallel... | 07/09/2002 |
| 6410370 | Capacitor for a semiconductor device A semiconductor device comprises a substrate such as a semiconductor wafer having a major surface, a first conductive layer formed over the major surface, and a second conductive layer formed over the first conductive layer with the first and second condu... | 06/25/2002 |
| 6392307 | Semiconductor device The present invention is a semiconductor device, which is able to provide a desired output voltage of an ECM without signal loss caused by parasitic capacitances. Such a semiconductor device comprises a semiconductor substrate; integrated network elements... | 05/21/2002 |
| 6392285 | Method for fabricating a capacitor device with BiCMOS process and the capacitor device formed thereby The present invention discloses a simple and convenient method for fabricating a capacitor device with BiCMOS processes. An electrode of the capacitor device formed according to the present invention is an ion doping region formed in an epitaxy layer so t... | 05/21/2002 |
| 6381168 | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device A memory device is described which has an n-channel field effect transistor coupled between a memory cell and a data communication line. An NPN bipolar junction transistor is also coupled between the memory cell and the data communication line in parallel... | 04/30/2002 |
| 6376883 | Bipolar transistor and capacitor The present invention relates to a method of manufacturing a capacitor in a BICMOS integrated circuit manufacturing technology, including the steps of depositing, on a thick oxide region, a polysilicon layer corresponding to a MOS transistor gate electrod... | 04/23/2002 |
| 6355537 | Method of providing radio frequency isolation of device mesas using guard ring regions within an integrated circuit device A semiconductor integrated circuit (IC) device includes a substrate, an insulating layer formed on the substrate, a buried layer formed on the insulating layer, and an epitaxial layer of a first conductivity type formed on the buried layer. A first isolat... | 03/12/2002 |
| 6351021 | Low temperature coefficient resistor (TCRL) A low temperature coefficient resistor (TCRL) has some unrepaired ion implant damage. The damaged portion raises the resistance and renders the resistor less sensitive to operating temperature fluctuations.... | 02/26/2002 |
| 6313515 | Reference voltage supply circuit A reference voltage supply circuit is provided with a PNP transistor. The PNP transistor has an N-type well for a base formed at a surface of a P-type semiconductor substrate. The reference voltage supply circuit is further provided with a resistor elemen... | 11/06/2001 |
| 6274918 | Integrated circuit diode, and method for fabricating same An integrated circuit (10) includes a P-epi substrate (12) having therein an n-well isolation layer (13) and a p-well (14) within the n-well. The p-well includes adjacent an upper surface thereof a p+ layer (18) having several elongate parallel openings (... | 08/14/2001 |
| 6268628 | Depletion type MOS semiconductor device and MOS power IC A depletion type MOS semiconductor device is provided which includes a p- well region formed in a surface layer of an n- drift layer, an n+ emitter region formed in a surface layer of the p- well region, an n | 07/31/2001 |
| 6261932 | Method of fabricating Schottky diode and related structure A method of forming an improved Schottky diode structure as part of an integrated circuit fabrication process that includes the introduction of a selectable concentration of dopant into the surface of an epitaxial layer so as to form a barrier-modifying s... | 07/17/2001 |
| 6232645 | Noise decoupling for semiconductor device with BiCMOS-type substrate A semiconductor device of the type having an integrated circuit with connection terminals connected to metal pads by connecting wires is provided. The integrated circuit includes a semiconductor substrate having a lower portion on top of which there is an... | 05/15/2001 |
| 6229180 | MOS type semiconductor apparatus A MOS type semiconductor apparatus is provided which includes a main MOS type semiconductor device, an internal control circuit connected between a control input terminal (G) and a control input port (g) of the main MOS type semiconductor device, and a pr... | 05/08/2001 |
| 6187646 | Method of manufacturing a capacitor as part of an integrated semiconductor circuit The present invention relates to a method of manufacturing a capacitor in a BICMOS integrated circuit manufacturing technology, including the steps of depositing, on a thick oxide region, a polysilicon layer corresponding to a MOS transistor gate electrod... | 02/13/2001 |
| 6175139 | Semiconductor device and method of making the same A semiconductor device includes a metal terminal provided on a semiconductor substrate and a protection element. The protection element includes an insulated gate field-effect transistor. The transistor has a first diffusion layer of a reverse conductive-... | 01/16/2001 |
| 6159784 | Method of producing semiconductor device A method of producing a semiconductor device by which the resistivities of the base, collector, and source/drain regions in a Bi-CMOS are decreased and the production step is simplified. A method of producing a semiconductor device comprising the steps of... | 12/12/2000 |
| 6156594 | Fabrication of bipolar/CMOS integrated circuits and of a capacitor The present invention relates to a method for fabricating an integrated circuit including MOS transistors and a bipolar transistor of NPN type, including the steps of: forming the MOS transistors, covering the entire structure with a protection layer, ope... | 12/05/2000 |
| 6127723 | Integrated device in an emitter-switching configuration An integrated device in an emitter-switching configuration comprises a first bipolar transistor having a base region, an emitter region, and a collector region, a second transistor having a charge-collection terminal connected to an emitter terminal of th... | 10/03/2000 |
| 6124618 | Dynamic threshold MOSFET using accumulated base BJT level shifter for low voltage sub-quarter micron transistor A dynamic threshold voltage MOSFET to provide increase drain-to-source saturation current (IDSsat) and lower off current (Ioff) is described. The dynamic threshold voltage MOSFET has a first diffusion-well of a material of a first co... | 09/26/2000 |
| 6121640 | Monolithically integrated device with protective structure A monolithic integrated device includes a protection structure and is formed in a semiconductor material substrate having a first conductivity type, which device includes at least a first epitaxial layer formed on the substrate. The integrated device furt... | 09/19/2000 |
| 6110772 | Semiconductor integrated circuit and manufacturing method thereof A semiconductor IC including a resistance element on a circuit substrate. The resistance element includes a resistance layer formed on an insulating layer. The resistance layer is formed using a Si layer obtained by forming an a-Si layer, doping the a-Si ... | 08/29/2000 |
| 6064053 | Operation methods for active BiCMOS pixel for electronic shutter and image-lag elimination Methods of operation of an active pixel sensor cell to provide electronic shuttering and elimination of image lag are disclosed. An active pixel sensor has a photodiode, a bipolar transistor, a pass MOS transistor, and a parasitic MOS transistor. The firs... | 05/16/2000 |
| 6051457 | Method for fabricating electrostatic discharge protection device An integrated circuit with a passive component and an ESD device in accordance with the present invention has: a P substrate; an N+ buried layer implanted in the P substrate; a cathode coupled to the N+ buried layer with an N area formed between the catho... | 04/18/2000 |
| 6043527 | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device A memory device is described which has an n-channel field effect transistor coupled between a memory cell and a data communication line. An NPN bipolar junction transistor is also coupled between the memory cell and the data communication line in parallel... | 03/28/2000 |
