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| Number | Title | Issue Date |
| 7436055 | Packaging method of a plurality of chips stacked on each other and package structure thereof A package structure with a plurality of chips stacked on each other includes a substrate, a first chip and second chip. The substrate has a dielectric layer, a metal layer having a conducting trace area and a shielding area formed on the dielectric layer, and a sold... | 10/14/2008 |
| 7301188 | CMOS image sensor and method of manufacturing the same An image sensor includes a substrate with an epitaxial layer deposited thereon, a plurality of photodiodes buried in the epitaxial layer, and a plurality of field oxide films interposed between the photodiodes for insulating the photodiodes. Each of the field oxide ... | 11/27/2007 |
| 7180114 | Semiconductor device A semiconductor device includes a silicon substrate having a film thickness smaller than a maximum range of a particle generated by a nuclear reaction between a fast neutron and a silicon atom, and a semiconductor element formed on a surface of the silicon substrate... | 02/20/2007 |
| 7170147 | Dissipative isolation frames for active microelectronic devices, and methods of making such dissipative isolation frames Microelectronic apparatus having protection against high frequency crosstalk radiation, comprising: a planar insulating substrate; an active semiconductor electronic device located over a first region of the insulating substrate; and a doped semiconductor located in... | 01/30/2007 |
| 7148084 | Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages A radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose an integrated circuit die within, wherein the lid and the base are each constructed from a high Z material to prevent radiation from penetrating the... | 12/12/2006 |
| 6548392 | Methods of a high density flip chip memory arrays A low alpha emissivity-induced error solder bump, flip-chip integrated circuit device. The device includes a semiconductor die having an active surface and a bond pad array disposed about the active surface of the die. The active surface of the die includ... | 04/15/2003 |
| 6538334 | High density flip chip memory arrays A low alpha emissivity-induced error solder bump, flip-chip integrated circuit device. The device includes a semiconductor die having an active surface and a bond pad array disposed about the active surface of the die. The active surface of the die includ... | 03/25/2003 |
| 6459125 | SOI based transistor inside an insulation layer with conductive bump on the insulation layer A semiconductor device for CSP mounting which avoids errors due to alpha rays and is highly stress-resistant is provided. A buried oxide film (107) is formed on a semiconductor substrate (101), and a MOS transistor having an SOI structure is formed on the... | 10/01/2002 |
| 6436737 | Method for reducing soft error rates in semiconductor devices A method for reducing soft error rates in semiconductor devices includes adding an isotopically enriched 11 B compound during the manufacture of a semiconductor device. Such isotopically enriched 11 B compounds include orthoborates (... | 08/20/2002 |
| 6429386 | Imbedded die-scale interconnect for ultra-high speed digital communications A printed circuit board with an imbedded electrical component, comprising three layers. The first and second layers are coupled together, and an area of the second layer of the printed circuit board is selectively removed to expose a portion of the first ... | 08/06/2002 |
| 6365042 | Apparatus for removing noble metal contamination from liquids Silicon is employed as a reducing agent in an acid bath to adsorb noble metals present as contaminants in the acid. In the manufacture of silicon devices for electronic memory and other devices, polonium-210 is adsorbed by silicon getters to reduce soft e... | 04/02/2002 |
| 6362437 | Mounting structure of integrated circuit device having high effect of buffering stress and high reliability of connection by solder, and method of mounting the same A mounting structure of an integrated circuit device includes an integrated circuit device, a mounting board, a first solder bump, and a second solder bump. The integrated circuit device is mounted on the mounting board. The interposer board is interposed... | 03/26/2002 |
| 6329712 | High density flip chip memory arrays A low alpha emissivity-induced error solder bump, flip chip integrated circuit device. The device includes a semiconductor die having an active surface and a bond pad array disposed about the active surface of the die. The active surface of the die includ... | 12/11/2001 |
| 6274473 | Flip chip packages A flip chip and a flip chip package are shielded from alpha particles emitted by lead in the solder bumps used to form the electrical connection between the flip chip and a substrate. This is accomplished by coating the solder bumps with a layer of alpha ... | 08/14/2001 |
| 6274406 | Semiconductor device and a method of manufacturing the same A semiconductor device of this invention has an LOC (Lead On Chip) structure, and a protective film consisting of a thermoplastic (thermosetting) resin material such as a thermoplastic (thermosetting) polyimide resin or a thermoplastic (thermosetting) pol... | 08/14/2001 |
| 6255719 | Semiconductor device including thermal neutron absorption material A boron nitride inclusion sheet is applied on the surface of a mold package enclosing a semiconductor chip so as to prevent soft error caused by a thermal neutron.... | 07/03/2001 |
| 6239479 | Thermal neutron shielded integrated circuits A thermal neutron shield (520) for integrated circuits (511-515) deters absorption of thermal neutrons by circuit constituents to form unstable isotopes with subsequent decay which generates bursts of charge which may upset of stored charge and create sof... | 05/29/2001 |
| 6144103 | Graded PB for C4 bump technology An improved solder bump composition and method advantageously employs a thin low-alpha layer of lead (Pb) deposited in close proximity to alpha particle sensitive devices, while ordinary (i.e., low cost) Pb is used for the bulk of the solder bump. This ap... | 11/07/2000 |
| 6043429 | Method of making flip chip packages A flip chip and a flip chip package are shielded from alpha particles emitted by lead in the solder bumps used to form the electrical connection between the flip chip and a substrate. This is accomplished by coating the solder bumps with a layer of alpha ... | 03/28/2000 |
| 5990564 | Flip chip packaging of memory chips The specification describes an interconnect strategy for memory chip packages to reduce or eliminate alpha particle contamination from the use of high lead solder interconnections in the vicinity of semiconductor memory cells. In the primary embodiment a ... | 11/23/1999 |
| 5897336 | Direct chip attach for low alpha emission interconnect system An interconnect system that has low alpha particle emission characteristics for use in an electronic device includes a semiconductor chip that has an upper surface and spaced apart electrically resistive bumps positioned on conductive regions of the upper... | 04/27/1999 |
| 5804870 | Hermetically sealed integrated circuit lead-on package configuration A hermetically sealed ceramic integrated circuit package and method for achieving same, the package including an internal lead frame attached to an integrated circuit die in a lead-on-chip configuration, an external lead frame attached to the package exte... | 09/08/1998 |
| 5702985 | Hermetically sealed ceramic integrated circuit heat dissipating package fabrication method A method for achieving a hermetically sealed ceramic integrated circuit package having good thermal conductivity for efficiently transferring heat from an integrated circuit chip die contained therein. Use of an ultra-thin integrated circuit chip die, thi... | 12/30/1997 |
| 5572065 | Hermetically sealed ceramic integrated circuit heat dissipating package A method and apparatus for achieving a hermetically sealed ceramic integrated circuit package having good thermal conductivity for efficiently transferring heat from an integrated circuit chip die contained therein. Use of an ultra-thin integrated circuit... | 11/05/1996 |
| 5552623 | Short channel mosfet with buried anti-punch through region A semiconductor device having a source region, a drain region and a channel region which are formed in a surface portion of a semiconductor substrate, and a gate formed with a material having a relatively high built-in voltage relative to the source regio... | 09/03/1996 |
| 5523597 | Electronic device achieving a reduction in alpha particle emissions from boron-based compounds essentially free of boron-10 Reduced soft errors in charge-sensitive circuit elements such as volatile memory cells 200 occur by using boron-11 to the exclusion of boron-10 or essentially free of boron-10 in borosilicate glass 230, 240 deposited on the substrate 206 directly over the... | 06/04/1996 |
| 5514475 | Heat-resistant electrical insulating layer A heat-resistant, electrical insulating layer which is suitable for use as an insulating substrate in printed circuit boards and as an insulating film for semiconductor devices and which surpasses a polyimide-based insulating layer with respect to heat re... | 05/07/1996 |
| 5501767 | Method for gettering noble metals from mineral acid solution Silicon is employed as a reducing agent in an acid bath to adsorb noble metals present as contaminants in the acid. In the manufacture of silicon devices for electronic memory and other devices, polonium-210 is adsorbed by silicon getters to reduce soft e... | 03/26/1996 |
| 5397735 | Process for hardening active electronic components against ionizing radiations, and hardened components of large dimensions The invention relates to the "hardening" (resistance to ionizing radiations) of MOS-type components. In order to avoid the effects of these radiations (creation of electron-hole pairs), there is deposited on a substrate (1) of monocrystalline Si a layer o... | 03/14/1995 |
| 5395783 | Electronic device and process achieving a reduction in alpha particle emissions from boron-based compounds essentially free of boron-10 Reduced soft errors in charge-sensitive circuit elements such as volatile memory cells 200 occur by using boron-11 to the exclusion of boron-10 or essentially free of boron-10 in borosilicate glass 230, 240 deposited on the substrate 206 directly over the... | 03/07/1995 |
| 5391915 | Integrated circuit having reduced soft errors and reduced penetration of alkali impurities into the substrate A semiconductor device wherein a coating film which is made of a polyimide resin or a polyimide isoindoloquinazolinedione resin and which is at least 10 μm thick is disposed on at least an active region of a semiconductor substrate, and the resultant sem... | 02/21/1995 |
| 5384476 | Short channel MOSFET with buried anti-punch through region A semiconductor device having a source region, a drain region and a channel region which are formed in a surface portion of a semiconductor substrate, and a gate formed with a material having a relatively high built-in voltage relative to the source regio... | 01/24/1995 |
| 5264726 | Chip-carrier In a chip-carrier provided with a chip-carrier substrate, a chip-carrier cover and an IC chip, said IC chip being arranged at a distance from a circuit surface of the IC chip being directed toward the chip-carrier substrate, an -ray shielding film ... | 11/23/1993 |
| 5208066 | Process of forming a patterned polyimide film and articles including such a film A process of forming a patterned polyimide film includes the step of conversion of a polyimide precursor into polyimide. The improvement is imidizing the precursor by means of a chemical imidizing reagent. Typically a film of polyimide precursor is formed... | 05/04/1993 |
| 5153385 | Transfer molded semiconductor package with improved adhesion A transfer molded pad array chip carrier is formed by mounting and wirebonding a semiconductor device (12) on a printed circuit board (10). The bottom side of the printed circuit board may have an array of solderable surfaces (24). A polymer coating (18) ... | 10/06/1992 |
| 5117272 | Having a protective film of a polymer having a fluorine-containing aliphatic cyclic structure A semiconductor integrated circuit device having a protective film made of a polymer having a fluorine-containing aliphatic cyclic structure.... | 05/26/1992 |
| 5094963 | Process for producing a semiconductor device with a bulk-defect region having a nonuniform depth The present invention relates to a semiconductor device e.g., a CMOS, comprising a denuded region and a bulk-defect region, as well as a process for producing, e.g., CMOS. In a conventional CMOS, the distance (dp) between the bulk-defect region and p... | 03/10/1992 |
| 4989068 | Semiconductor device and method of manufacturing the same A semiconductor device having a structure in which an insulating resin film or sheet is stuck on the principal surface of a semiconductor chip which is formed with circuits and in which the inner lead portions of a lead frame are arranged on the principal... | 01/29/1991 |
| 4975762 | Alpha-particle-emitting ceramic composite cover A low alpha-particle-emitting ceramic composite cover which when used in a ceramic integrated circuit package to encapsulate an integrated circuit device, reduces soft errors caused by alpha-particles emitted from the ceramic material. An alpha-particle-a... | 12/04/1990 |
| 4970568 | Semiconductor device and a process for producing a semiconductor device The present invention relates to semiconductor device, a e.g., a CMOS, comprising a denuded region and a bulk-defect region, as well as the process for producing, e.g., a CMOS. In a conventional CMOS, the distance (dp) between the bulk-defect region and P... | 11/13/1990 |
