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| Number | Title | Issue Date |
| 7443019 | Semiconductor device with conductor tracks between semiconductor chip and circuit carrier and method for producing the same The invention relates to a semiconductor device with conductor tracks between a semiconductor chip and a circuit carrier, and to a method for producing the same. The conductor tracks extend from contact areas on the top side of the semiconductor chip to contact pads... | 10/28/2008 |
| 7385281 | Semiconductor integrated circuit device A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a ... | 06/10/2008 |
| 7375421 | High density multilayer circuit module Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit modul... | 05/20/2008 |
| 7358179 | Method of manufacturing semiconductor device including air space formed around gate electrode After a HEMT is formed, side walls are formed on a semiconductor substrate. Next, a sacrificial layer is formed to cover the HEMT. Next, contact holes are formed in the sacrificial layer to expose upper surfaces of source electrodes. Next, a metal interconnect line ... | 04/15/2008 |
| 7335931 | Monolithic microwave integrated circuit compatible FET structure A field effect transistor structure includes a single crystal substrate having: a source, gate and drain electrodes disposed on an upper surface of the substrate, the gate electrode having a region thereof disposed between a region of the drain electrode and a regio... | 02/26/2008 |
| 7335965 | Packaging of electronic chips with air-bridge structures A circuit assembly for fabricating an air bridge structure and a method of fabricating an integrated circuit package capable of supporting a circuit assembly including an air bridge structure. A circuit assembly comprises an electronic chip and a conductive structur... | 02/26/2008 |
| 7319274 | Methods for selective integration of airgaps and devices made by such methods Methods for the production of airgaps in semiconductor devices and devices produced using such methods are disclosed. An example semiconductor device includes a damascene stack formed using such methods. The damascene stack includes a patterned dielectric layer incl... | 01/15/2008 |
| 7297593 | Method of manufacturing a floating gate of a flash memory device A method of forming a floating gate of a flash memory device wherein a hard mask nitride film is stripped using two or more etching steps. Accordingly, a seam can be prevented when depositing a floating gate polysilicon film. Furthermore, the floating gate polysilic... | 11/20/2007 |
| 7288835 | Integrated circuit package-in-package system An integrated circuit package-in-package system is provided forming a first integrated circuit package having a first interface, stacking a second integrated circuit package having a second interface above the first integrated circuit package, fitting the first inte... | 10/30/2007 |
| 7282794 | Multiple die stack apparatus employing t-shaped interposer elements Multiple integrated circuit devices in a stacked configuration that use a spacing element for allowing increased device density and increased thermal conduction or heat removal for semiconductor devices and the methods for the stacking thereof are disclosed. ... | 10/16/2007 |
| 7230315 | Integrated chemical microreactor with large area channels and manufacturing process thereof The microreactor has a body of semiconductor material; a large area buried channel extending in the body and having walls; a coating layer of insulating material coating the walls of the channel; a diaphragm extending on top of the body and upwardly closing the chan... | 06/12/2007 |
| 7170183 | Wafer level stacked package Disclosed are a wafer level stacked package and its manufacturing method. As one example, in such a wafer level stacked package, a first semiconductor die is electrically connected to an upper surface of a substrate and a second semiconductor die is electrically con... | 01/30/2007 |
| 7148578 | Semiconductor multi-chip package A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is formed on the semiconductor substrate. A pad-rearrangement pattern is ele... | 12/12/2006 |
| 7112866 | Method to form a cross network of air gaps within IMD layer The invention provides a new multilevel interconnect structure of air gaps in a layer of IMD. A first layer of dielectric is provided over a surface; the surface contains metal points of contact. Trenches are provided in this first layer of dielectric. The trenches ... | 09/26/2006 |
| 7071514 | Electrostatic discharge protection device A compact ESD protection device is described that uses the reverse breakdown voltage of a base-emitter junction as a trigger diode to switch a transistor that shunts the forward bias ESD current to ground. The trigger diode in series with a leakage diode provides a ... | 07/04/2006 |
| 7061094 | Multilayer printed circuit board including first and second signal traces and a first ground trace A multilayer printed circuit board (PCB) includes a substrate; a ground layer having edges which define a gap portion, the ground layer being provided on a bottom face of the substrate; and at least two signal traces and provided on a top face of the substrate so as... | 06/13/2006 |
| 6624519 | Aluminum based alloy bridge structure and method of forming same A bridge structure, such as an air bridge, includes a bridge element formed of an alloy including aluminum, copper, and lithium. The alloy may also further include silicon and the amount of lithium of the alloy is generally greater than about 1.0% by weig... | 09/23/2003 |
| 6504190 | FET whose source electrode overhangs gate electrode and its manufacture method A gate electrode is in Schottky contact with the surface of a semiconductor substrate and extends in a first direction. A drain electrode is disposed on one side of the gate electrode, spaced apart from the gate electrode by some distance, and is in ohmic... | 01/07/2003 |
| 6472719 | Method of manufacturing air gap in multilevel interconnection A method for forming a semiconductor device having air regions, the method comprises providing a base, forming a pattern of metal leads, depositing a layer of oxide over the metal leads, forming a layer of nitride over said layer of oxide, opening and etc... | 10/29/2002 |
| 6469330 | Process for manufacturing integrated devices comprising microstructures and associated suspended electrical interconnections An integrated device comprises an epitaxial layer forming a first and a second region separated by at least one air gap. The first region forms, for example, a suspended mass of an accelerometer. A bridge element extends on the air gap and has a suspended... | 10/22/2002 |
| 6469886 | Monolithic integrated capacitor A monolithic integrated capacitor is formed by two conductive coatings applied to a substrate and separated from each other by a dielectric layer. The upper coating lying on the dielectric layer is connected via at least one conductive air bridge with at ... | 10/22/2002 |
| 6395608 | Heterojunction bipolar transistor and its fabrication method A heterojunction bipolar transistor and its fabrication method is disclosed. The heterojunction bipolar transistor includes a substrate; a collector layer formed to have a ledge or MESA on the substrate; a collector electrode formed on the collector layer... | 05/28/2002 |
| 6355551 | Integrated circuit having a void between adjacent conductive lines The invention proposes methods for producing integrated circuits wherein the dielectric constant between closely spaced and adjacent metal lines is approaching 1. One method of the invention uses low-melting-point dielectric to form a barrier form a void ... | 03/12/2002 |
| 6329231 | Distributed constant circuit with active element An active element has first and second regions and a control electrode. Carriers move between the first and second regions in a first direction. A motion of carriers is controlled by an electric signal applied to the control electrode. The first and secon... | 12/11/2001 |
| 6306754 | Method for forming wiring with extremely low parasitic capacitance A method for creating metal layers in a microelectronic device where air is the primary dielectric separating adjacent metal features within a layer. A temporary structural solid, such as a photoresist, is deposited on a substrate with exposed metal featu... | 10/23/2001 |
| 6268262 | Method for forming air bridges Disclosed is a method for making an air bridge in an electronic device. This method uses amorphous silicon carbide to protect electrical conductors in the device during formation of the bridge. The silicon carbide also provides hermetic and physical prote... | 07/31/2001 |
| 6255712 | Semi-sacrificial diamond for air dielectric formation Disclosed is a structure and process for incorporating air or other gas as a permanent dielectric medium in a multilevel chip by providing CVD diamond as a semi-sacrificial interlevel and intralevel dielectric material. The semi-sacrificial dielectric is ... | 07/03/2001 |
| 6246118 | Low dielectric semiconductor device with rigid, conductively lined interconnection system Multi-level semiconductor devices are formed with reduced parasitic capacitance without sacrificing structural integrity or electromigration performance by removing the inter-layer dielectrics and supporting the interconnection system with a rigid, conduc... | 06/12/2001 |
| 6245658 | Method of forming low dielectric semiconductor device with rigid, metal silicide lined interconnection system Multi-level semiconductor devices are formed with reduced parasitic capacitance without sacrificing structural integrity or electromigration performance by removing the inter-layer dielectrics and supporting the interconnection system with a metal silicid... | 06/12/2001 |
| 6211561 | Interconnect structure and method employing air gaps between metal lines and between metal layers An interconnect structure and fabrication method are provided to form air gaps between interconnect lines and between interconnect layers. A conductive material is deposited and patterned to form a first level of interconnect lines. A first dielectric lay... | 04/03/2001 |
| 6201283 | Field effect transistor with double sided airbridge A field effect transistor with a double sided airbridge comprises a substrate containing a conductive region and source, drain and gate electrodes disposed on the substrate. The gate electrode has a finger portion with a first end secured to the substrate... | 03/13/2001 |
| 6083821 | Integrated circuit having a void between adjacent conductive lines The invention proposes methods for producing integrated circuits wherein the dielectric constant between closely spaced and adjacent metal lines is approaching 1. One method of the invention uses low-melting-point dielectric to form a barrier forming a vo... | 07/04/2000 |
| 6075278 | Aluminum based alloy bridge structure and method of forming same A bridge structure, such as an air bridge, includes a bridge element formed of an alloy including aluminum, copper, and lithium. The alloy may also further include silicon and the amount of lithium of the alloy is generally greater than about 1.0% by weig... | 06/13/2000 |
| 6057224 | Methods for making semiconductor devices having air dielectric interconnect structures A method of making an integrated circuit interconnect structure having air as the effective dielectric between metallization layers includes the steps of: a) providing an air dielectric formation layer of a sacrificial material over a substrate; b) formin... | 05/02/2000 |
| 6028348 | Low thermal impedance integrated circuit A frontside ground plane (306) integrated circuit with backside contacts (312) plus optional passive components such as microstrip (308) and capacitors. The frontside ground plane provides direct heat dissipation from active junctions such as heterojuncti... | 02/22/2000 |
| 5949144 | Pre-bond cavity air bridge A handle wafer has a cavity coated with a dielectric. A device wafer is bonded to the handle wafer. Metal lines, devices or circuits fabricated on device layer overlay the cavity in the handle wafer thus reducing parasitic capacitances to the handle wafer... | 09/07/1999 |
| 5917231 | Semiconductor device including an insulative layer having a gap A resin-encapsulated semiconductor device includes a semi-conductor substrate having a surface including an insulating film and an electroplated transmission line. To avoid a possible separation and/or peeling of the insulating film with respect to the su... | 06/29/1999 |
| 5847439 | Integrated circuit having a void between adjacent conductive lines The invention proposes methods for producing integrated circuits wherein the dielectric constant between closely spaced and adjacent metal lines is approaching 1. One method of the invention uses low-melting-point dielectric to form a barrier form a void ... | 12/08/1998 |
| 5798559 | Integrated circuit structure having an air dielectric and dielectric support pillars A method of making an integrated circuit interconnect structure having air as the effective dielectric between metallization layers includes the steps of: a) providing an air dielectric formation layer of a sacrificial material over a substrate; b) formin... | 08/25/1998 |
| 5717231 | Antenna having elements with improved thermal impedance A flip-chip integrated circuit having passive 302, 304, 306 as well as active 308, 310 components on a frontside surface of a substrate. The active device have airbridges which contact a heatsink to provide heat dissipation from the junctions of the devic... | 02/10/1998 |
