"The abolishment of pain in surgery is a chimera. It is absurd to go on seeking it...knife and pain are two words in surgery that must forever be associated in the consciousness of the patient."
Dr. Alfred Velpeau, French surgeon ; 1839
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| Number | Title | Issue Date |
| 7442585 | MOSFET with laterally graded channel region and method for manufacturing same The present invention relates generally to a semiconductor device having a channel region comprising a semiconductor alloy of a first semiconductor material and a second, different material, and wherein atomic distribution of the second material in the channel regio... | 10/28/2008 |
| 7419878 | Planarized and silicided trench contact Power MOSFETs and fabrication processes for power MOSFETs use a continuous conductive gate structure within trenches to avoid problems arising from device topology caused when a gate bus extends above a substrate surface. The gate bus trench and/or gate structures i... | 09/02/2008 |
| 7410913 | Method of manufacturing silicon rich oxide (SRO) and semiconductor device employing SRO Provided are methods for manufacturing silicon rich oxide (SRO) layers useful in the fabrication of semiconductor devices, for example, non-volatile memory devices, and methods for fabricating semiconductor devices incorporating such SRO layers. The methods include ... | 08/12/2008 |
| 7411250 | Radiation-hardened silicon-on-insulator CMOS device, and method of making the same A silicon-on-insulator metal oxide semiconductor device comprising ultrathin silicon-on-sapphire substrate; at least one P-channel MOS transistor formed in the ultrathin silicon layer; and N-type impurity implanted within the ultrathin silicon layer and the sapphire... | 08/12/2008 |
| 7410841 | Building fully-depleted and partially-depleted transistors on same chip A method (10) of forming fully-depleted silicon-on-insulator (FD-SOI) transistors (150) and partially-depleted silicon-on-insulator (FD-SOI) transistors (152) on a semiconductor substrate (104) as part of an integrated circuit fabrication... | 08/12/2008 |
| 7390702 | Method for manufacturing semiconductor device Laser is applied onto part on an SOS substrate using a sapphire layer to form an identifying mark. The sapphire layer on the surface of the SOS substrate, which has been exposed upon laser application, is covered with an insulating film formed by heat treatment at 7... | 06/24/2008 |
| 7361534 | Method for fabricating SOI device A method is provided for fabricating a semiconductor on insulator (SOI) device. The method includes, in one embodiment, providing a monocrystalline silicon substrate having a monocrystalline silicon layer overlying the substrate and separated therefrom by a dielectr... | 04/22/2008 |
| 7291521 | Self correcting suppression of threshold voltage variation in fully depleted transistors A semiconductor fabrication method includes implanting or otherwise introducing a counter doping impurity distribution into a semiconductor top layer of a silicon-on-insulator (SOI) wafer. The top layer has a variable thickness including a first thickness at a first... | 11/06/2007 |
| 7064021 | Method for fomring a self-aligned LTPS TFT A method for forming a self-aligned low temperature polysilicon thin film transistor (LTPS TFT). First, active layers of a N type LTPS TFT (NLTPS TFT) and a P type LTPS TFT (PLTPS TFT) are formed on a substrate, and a gate insulating (GI) layer is formed on the subs... | 06/20/2006 |
| 6617187 | Method for fabricating an electrically addressable silicon-on-sapphire light valve A method for fabricating a monolithically integrated liquid crystal array display and control circuitry on a silicon-on-sapphire structure comprises the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-on-sapphir... | 09/09/2003 |
| 6531742 | Method of forming CMOS device A CMOS device and a method for fabricating the same, is disclosed, the device including an insulating film formed on a substrate, first and second sapphire patterns formed on the insulating film at fixed intervals, first and second epitaxial semiconductor... | 03/11/2003 |
| 6531739 | Radiation-hardened silicon-on-insulator CMOS device, and method of making the same A method for eliminating the radiation-induced off-state current in the P-channel ultrathin silicon-on-sapphire transistor, by providing a retrograde dopant concentration profile that has the effect of moving the Fermi level at the back of the device away... | 03/11/2003 |
| 6404038 | Complementary vertical bipolar junction transistors fabricated of silicon-on-sapphire utilizing wide base PNP transistors A method for fabricating complementary vertical bipolar junction transistors of silicon-on-sapphire in fewer steps than required for true complimentary vertical bipolar junction transistors is disclosed. Initially a thin layer of silicon is grown on a sap... | 06/11/2002 |
| 6399429 | Method of forming monocrystalline silicon layer, method for manufacturing semiconductor device, and semiconductor device Single-crystal silicon is deposited on an insulating substrate (1) with a crystalline sapphire layer (50) formed thereon as a seed, to form a silicon epitaxial layer (7). P-type impurity ions are implanted into a single-crystal silicon layer, and then N-t... | 06/04/2002 |
| 6365936 | Ultra-high resolution liquid crystal display on silicon-on-sapphire A liquid crystal array and associated drive circuitry are monolithically formed on a silicon-on-sapphire structure, and are fabricated by a method comprising the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-o... | 04/02/2002 |
| 6235617 | Semiconductor device and its manufacturing method It is intended to provide a semiconductor device and its manufacturing method in which a high-resistance region maintaining a high resistance even under high temperatures can be made in a nitride III-V compound semiconductor layer having an electric condu... | 05/22/2001 |
| 6204100 | CMOS device and method for fabricating the same A CMOS device and a method for fabricating the same, is disclosed, the device including an insulating film formed on a substrate, first and second sapphire patterns formed on the insulating film at fixed intervals, first and second epitaxial semiconductor... | 03/20/2001 |
| 6190933 | Ultra-high resolution liquid crystal display on silicon-on-sapphire A liquid crystal array and associated drive circuitry are monolithically formed on a silicon-on-sapphire structure, and are fabricated by a method comprising the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-o... | 02/20/2001 |
| 6111273 | Semiconductor device and its manufacturing method It is intended to provide a semiconductor device and its manufacturing method in which a high-resistance region maintaining a high resistance even under high temperatures can be made in a nitride III-V compound semiconductor layer having an electric condu... | 08/29/2000 |
| 6057555 | High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d... | 05/02/2000 |
| 6040200 | Method of fabricating semiconductor device having stacked-layered substrate A method of fabricating a light valve device comprises forming a substrate having stacked layers including a light-shielding thin film layer, an insulating film, and a single crystalline semiconductor thin film stacked in this order on a transparent suppo... | 03/21/2000 |
| 5926699 | Method of fabricating semiconductor device having stacked layer substrate A method of fabricating a semiconductor device comprises the steps of sequentially forming a first gate electrode and an insulating film over a transparent support substrate, forming a through-hole in the insulating film, forming a semiconductor single cr... | 07/20/1999 |
| 5900650 | Semiconductor device and method of manufacturing the same There is disclosed a semiconductor device formed on a sapphire substrate, for example, a blue LED of a double-hetero structure having a laminated structure which comprises a first cladding layer made of a first conductivity type gallium nitride based semi... | 05/04/1999 |
| 5883396 | High-frequency wireless communication system on a single ultrathin silicon on sapphire chip A high-frequency wireless communication system on a single ultrathin silicon on sapphire chip is presented. This system incorporates analog, digital (logic and memory) and high radio frequency circuits on a single ultrathin silicon on sapphire chip. The d... | 03/16/1999 |
| 5723359 | Method for concurrently forming thin film resistor and thick film resistor on a hybrid integrated circuit substrate A method forms a thin film resistor with a thick film resistor on one hybrid IC substrate, and provides a high efficiency hybrid IC utilizing advantages of both resistors. The method includes the steps of: screen-printing a thick film resistor paste on an... | 03/03/1998 |
| 5714793 | Complementary vertical bipolar junction transistors formed in silicon-on-saphire A method is described for fabricating a complementary, vertical bipolar sconducting structure. An N+ silicon island and a P+ silicon island separated by a first oxide layer are formed on a sapphire substrate. An NPN junction device is formed on the N+ si... | 02/03/1998 |
| 5672518 | Method of fabricating semiconductor device having stacked layered substrate The invention provides a semi-conductor light valve device and a process for fabricating the same. The device comprises a composite substrate having a supporte substrate, a light-shielding thin film formed on said supporte substrate and semiconductive thi... | 09/30/1997 |
| 5641691 | Method for fabricating complementary vertical bipolar junction transistors in silicon-on-sapphire A method is described for fabricating a complementary, vertical bipolar semiconducting structure. An N+ silicon island and a P+ silicon island separated by a first oxide layer are formed on a sapphire substrate. An NPN junction device is formed on the N+ ... | 06/24/1997 |
| 5621239 | SOI device having a buried layer of reduced resistivity In a semiconductor device, first and second substrates are supported with respective first major surfaces in opposing, parallel and spaced relationship. A conductor layer of low resistivity material is provided on a selected one of the opposing and spaced... | 04/15/1997 |
| 5587597 | Semiconductor-on-insulator device interconnects A process for developing conductive interconnect regions between integrated circuit semiconductor devices formed on an insulating substrate utilizes the semiconductor material itself for formation of device interconnect regions. A patterned layer of semic... | 12/24/1996 |
| 5480818 | Method for forming a film and method for manufacturing a thin film transistor A crystal silicon film deposited on an insulating film made of a binary system material or a binary system semiconductor film formed by an atomic layer deposition method has a grain as large as approximately 200 nm. Thus, the mobility of carriers is incre... | 01/02/1996 |
| 5472889 | Method of manufacturing large-sized thin film transistor liquid crystal display panel A method of manufacturing a large-sized thin film transistor liquid crystal display panel in which a plurality of unit thin film transistor liquid crystal display panels are fabricated having a predetermined size on a polyimide substrate. A predetermined ... | 12/05/1995 |
| 5466620 | Method for fabricating a liquid crystal display device A method for fabricating a TFT-LCD which enables point defects such as electrical short circuits between a pixel and a thin film transistor or between a bus line and a pixel to be repaired during fabrication.... | 11/14/1995 |
| 5466618 | Method for fabricating a thin film transistor for a liquid crystal display A method for fabricating an LCD-TFT, which can prevent degradation of image quality of a liquid crystal display by preventing blackening of the pixel electrode due to H2 plasma at the time of deposition of a protective insulation film. The meth... | 11/14/1995 |
| 5449953 | Monolithic microwave integrated circuit on high resistivity silicon A silicon-based monolithic microwave integrated circuit architecture is described. This architecture, called MICROX™, is a combination of silicon material growth and wafer processing technologies. A wafer is fabricated using a substrate of high resistiv... | 09/12/1995 |
| 5391903 | Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits A silicon layer formed atop a sapphire substrate is selectively recrystallized such that the original degraded quality of the crystallinity of an N-well region where a P-channel device is to be formed is enhanced, so that leakage in the P-channel device i... | 02/21/1995 |
| 5362659 | Method for fabricating vertical bipolar junction transistors in silicon bonded to an insulator A method is provided for manufacturing a bipolar transistor, comprising the teps of: 1) abutting a polished surface of a substantially single crystal silicon wafer with a polished surface of an insulating substrate; 2) heating the abutting silicon wafer an... | 11/08/1994 |
| 5315144 | Reduction of bipolar gain and improvement in snap-back sustaining voltage in SOI field effect transistor The gain of a parasitic lateral bipolar device in an MOS SOI structure is reduced to increase the differential between the snap-back sustaining voltage and the maximum recommended power supply voltage. Prior to insulated gate structure definition, very li... | 05/24/1994 |
| 5298434 | Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits A preamorphized silicon layer formed atop a sapphire substrate is selectively recrystallized such that the original degraded quality of the crystallinity of an N-well region where a P-channel device is to be formed is enhanced, so that leakage in the P-ch... | 03/29/1994 |
| 5233211 | Semiconductor device for driving a light valve The invention provides a semi-conductor light valve device and a process for fabricating the same. The device comprises a composite substrate having a supporte substrate, a light-shielding thin film formed on said supporte substrate and semiconductive thi... | 08/03/1993 |