Bizarre Patents
Reward Candy Dispenser for Personal Computers
A personal computer peripheral, battery powered reward candy dispenser which immediately presents students with a single candy for each problem completed correctly.
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7439574 | Silicon/oxide/nitride/silicon nonvolatile memory with vertical channels Provided are a silicon/oxide/nitride/oxide/silicon (SONOS) memory, a fabricating method thereof, and a memory programming method. The SONOS memory includes a substrate; a first insulating layer stacked on the substrate; a semiconductor layer, which is patterned on t... | 10/21/2008 |
| 7439089 | Method of fabricating array substrate having color filter on thin film transistor structure In a liquid crystal display device substrate, an insulating layer covers a thin film transistor. Another insulating layer covers a black matrix, which is formed on the insulating layer and covers the thin film transistor, a gate line, and a data line except a portio... | 10/21/2008 |
| 7425484 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes forming on a semiconductor substrate, a plurality of multi-layered structures each including a first semiconductor layer and a second semiconductor layer that is deposited over the first semiconductor layer a... | 09/16/2008 |
| 7422916 | Method of manufacturing thin film transistor panel A method of manufacturing a thin film transistor panel is provided, which includes forming a first signal line on a substrate. The method also includes forming in sequence a first insulating layer and a semiconductor layer on the first signal line. The method furthe... | 09/09/2008 |
| 7420248 | Programmable random logic arrays using PN isolation Disclosed are a programmable, random logic device array, and a method of forming such a device. The device comprises a substrate, and a semiconductor layer above the substrate. That semiconductor layer, in turn, includes a first region of a first semiconductor type,... | 09/02/2008 |
| 7413955 | Transistor for memory device and method for manufacturing the same Disclosed is a transistor for a memory device realizing both a step-gated asymmetry transistor and a fin transistor in a cell and a method for manufacturing the same. The transistor has an active region protruding from a predetermined region of a substrate and a gro... | 08/19/2008 |
| 7408200 | Thin film transistor array panel and manufacturing method thereof A thin film transistor array panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line formed on the substrate and intersecting the first signal line; a thin film transistor including a gate electrode connected... | 08/05/2008 |
| 7397087 | FEOL/MEOL metal resistor for high end CMOS A FEOL/MEOL metal resistor that has tight sheet resistance tolerance (on the order of about 5% or less), high current density (on the order of about 0.5 mA/micron or greater), lower parasitics than diffused resistors and lower TCR than standard BEOL metal resistors ... | 07/08/2008 |
| 7393732 | Double silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) structures A SOI MOSFET structure having a reduced step height between the various semiconductor layers without adversely affecting the junction capacitance of the semiconductor device formed on the uppermost semiconductor layer as well as a method of fabricating the same are ... | 07/01/2008 |
| 7393731 | Semiconductor device and method of manufacturing the same A silicon nitride film is formed between interlayer insulating films covering an upper surface of an element formed on a surface of a semiconductor layer. With this structure, a semiconductor device comprising an isolation insulating film of PTI structure, which sup... | 07/01/2008 |
| 7375022 | Method of manufacturing wiring board A method of manufacturing a wiring board is disclosed. The wiring board has: a capacitor, having multiple electrode layers which oppose each other with a dielectric layer in between, that is connected to a semiconductor chip; one or more via wirings which pierce the... | 05/20/2008 |
| 7374975 | Method of fabricating a transistor A method of forming a transistor reduces leakage current and hot carrier effects, and therefore improves current performance. The method of forming a transistor includes selectively etching the semiconductor substrate to form a substrate protrusion and expose a buri... | 05/20/2008 |
| 7371630 | Patterned backside stress engineering for transistor performance optimization Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance. ... | 05/13/2008 |
| 7368341 | Semiconductor circuit arrangement with trench isolation and fabrication method An explanation is given of, inter alia, a circuit arrangement containing a trench which penetrates through a charge-storing layer (18) and a doped semiconductor layer (14). The trench simultaneously fulfils a multiplicity of functions, namely an insula... | 05/06/2008 |
| 7365729 | Field sequential LCD device and color image display method thereof In a liquid crystal display device, a field sequential liquid crystal display device includes a liquid crystal panel having an upper substrate, a lower substrate and a liquid crystal layer therebetween; a backlight device under the liquid crystal panel for irradiati... | 04/29/2008 |
| 7352049 | Semiconductor device and method of manufacturing the same Plural trench isolation films are provided with portions of an SOI layer interposed therebetween in a surface of the SOI layer in a resistor region (RR) where a spiral inductor (SI) is to be provided. Resistive elements are formed on the trench isolation films, resp... | 04/01/2008 |
| 7339238 | Semiconductor device including a capacitance It is an object to obtain a semiconductor device including a capacitance having a great Q-value. In an SOI substrate comprising a support substrate (165), a buried oxide film (166) and an SOI layer (171), an isolating oxide film 167 (1... | 03/04/2008 |
| 7335568 | Method of forming doped regions in the bulk substrate of an SOI substrate to control the operational characteristics of transistors formed thereabove, and an integrated circuit device comprising same In one illustrative embodiment, the method comprises providing an SOI substrate comprised of an active layer, a buried insulation layer and a bulk substrate, forming a doped region in the bulk substrate under the active layer, forming a plurality of transistors abov... | 02/26/2008 |
| 7323369 | Fabrication method for thin film transistor array substrate Scan lines are formed on a substrate. A patterned dielectric layer and a patterned semiconductor layer are formed to cover portions of the scan lines. A patterned transparent conductive layer and a patterned metal layer are sequentially formed to define data lines, ... | 01/29/2008 |
| 7319239 | Substrate for display device having a protective layer provided between the pixel electrodes and wirings of the active matrix substrate, manufacturing method for same, and display device The present invention provides the substrate for a display device, comprising a scan line, a signal line and a switching element on an insulating substrate, and further comprising an interlayer insulation film and a pixel electrode, the switching element is provided... | 01/15/2008 |
| 7314789 | Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification A semiconductor structure and method that is capable of generating a local mechanical gate stress for channel mobility modification are provided. The semiconductor structure includes at least one NFET and at least one PFET on a surface of a semiconductor substrate. ... | 01/01/2008 |
| 7312504 | Transistor for memory device and method for manufacturing the same Disclosed is a transistor for a memory device realizing both a step-gated asymmetry transistor and a fin transistor in a cell and a method for manufacturing the same. The transistor has an active region protruding from a predetermined region of a substrate and a gro... | 12/25/2007 |
| 7265021 | Alignment method, method for manufacturing a semiconductor device, substrate for a semiconductor device, electronic equipment Aspects of the invention can provide an alignment method that is preferably applicable when manufacturing equipments by liquid-phase processing. The alignment method in a device manufacturing process can include forming of a functional film on a substrate by liquid-... | 09/04/2007 |
| 7256094 | Method for changing threshold voltage of device in resist asher A method for forming a dopant in a substrate, by accumulating at least one dopant species in an asher chamber and forming the accumulated dopant species on an exposed portion of the substrate. A target concentration for the plasma chamber dopant species is determine... | 08/14/2007 |
| 7247527 | Method for manufacturing semiconductor device, and laser irradiation apparatus It is an object of the present invention to provide a method for manufacturing a crystalline semiconductor film comprising the steps of crystallizing with the use of the metal element for promoting the crystallization to control the orientation and irradiating the l... | 07/24/2007 |
| 7244977 | Longitudinal MISFET manufacturing method, longitudinal MISFET, semiconductor storage device manufacturing method, and semiconductor storage device A semiconductor memory device includes a vertical MISFET having a source region, a channel forming region, a drain region, and a gate electrode formed on a sidewall of the channel forming region via a gate insulating film. In manufacturing the semiconductor memory d... | 07/17/2007 |
| 7235468 | FinFET device with reduced DIBL FinFET devices formed with a Silicon On Insulator (SOI) technology with reduced Drain Induced Barrier Lowering (DIBL) characteristics and methods for producing the same. The methods involve dopant implants into the insulator layer, thereby creating borophosphosilica... | 06/26/2007 |
| 7226821 | Flip chip die assembly using thin flexible substrates Apparatus and methods for flattening thin substrate surfaces by stretching thin flexible substrates to which ICs can be bonded. Various embodiments beneficially maintain the substrate flatness during the assembly process through singulation. According to one embodim... | 06/05/2007 |
| 7223622 | Active-matrix substrate and method of fabricating same An active-matrix substrate is provided, which suppresses the unevenness of its surface due to the height difference of the TFTs and gate and data lines from the remaining area. After TFTS, gate lines, and data lines are formed on a transparent base, a transparent di... | 05/29/2007 |
| 7208357 | Template layer formation A process for forming a strained semiconductor layer. The process includes implanting ions into a semiconductor layer prior to performing a condensation process on the layer. The ions assist in diffusion of atoms (e.g. germanium) in the semiconductor layer and to in... | 04/24/2007 |
| 7202501 | Thin film transistor and method for fabricating the same A thin film transistor formed by using a Metal Induced Lateral Crystallization process and method for fabricating the same. The thin film transistor comprises an active layer having source/drain regions and a channel region, a gate electrode, an insulating layer hav... | 04/10/2007 |
| 7195949 | Providing driving current arrangement for OLED device A method of making a current type active matrix OLED device, includes providing a semiconductor layer, a conductive layer, and an insulator layer therebetween over a substrate, providing an organic light emitting diode over either the semiconductor layer or over the... | 03/27/2007 |
| 7192788 | Semiconductor device and manufacturing method of the same The present invention intends to provide a technique that can improve the capacitance density while securing the withstand voltage of a capacitor element. In order to achieve the above object, the present inventive manufacturing method of a semiconductor device incl... | 03/20/2007 |
| 7180156 | Thin-film devices and method for fabricating the same on same substrate To satisfy the different requirement of TFTs function as peripheral driving circuit and pixel switching device, the modified TFT structure with various thicknesses of gate insulating layers is disclosed. For the peripheral driving circuit, the thinner thickness of t... | 02/20/2007 |
| 7151279 | Thin film transistor array panel and manufacturing method thereof A thin film transistor array panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line formed on the substrate and intersecting the first signal line; a thin film transistor including a gate electrode connected... | 12/19/2006 |
| 7129522 | Semiconductor device and its manufacturing method Protrusions called ridges are formed on the surface of a crystalline semiconductor film formed by a laser crystallization method or the like. A heat absorbing layer are formed below a semiconductor film. When the semiconductor film is crystallized by laser, a temper... | 10/31/2006 |
| 7118981 | Method of fabricating an integrated silicon-germanium heterobipolar transistor and an integrated silicon-germanium heterobipolar transistor In a method of fabricating an integrated silicon-germanium heterobipolar transistor a silicon dioxide layer arranged between a silicon-germanium base layer and a silicon emitter layer is formed by means of Rapid Thermal Processing (RTP) to ensure enhanced component ... | 10/10/2006 |
| 7109108 | Method for manufacturing semiconductor device having metal silicide A thin film transistor device reduced substantially in resistance between the source and the drain by incorporating a silicide film, which is fabricated by a process comprising forming a gate insulator film and a gate contact on a silicon substrate, anodically oxidi... | 09/19/2006 |
| 6703265 | Semiconductor device and method of manufacturing the same The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semicond... | 03/09/2004 |
| 6703275 | Flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell The present invention relates to a flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell. According to the present invention, a source region and a drain region are first formed and a tunne... | 03/09/2004 |
