Class 257/E21.649 - Making connection between transistor and capacitor, e.g., plug (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.648. This subclass
No. of patents: 192
Last issue date: 09/16/2008

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Number	Title	Issue Date
7425489	Self-aligned shallow trench isolation A method of making a semiconductor structure includes etching an isolation oxide. The isolation oxide is in a substrate, a gate layer is on the substrate, a patterned metallic layer is on the gate layer, and a first patterned etch-stop layer is on the metallic layer...	09/16/2008
7419896	Method for forming landing plug contact in semiconductor device A method for forming a landing contact plug in a semiconductor device is provided. The method includes the steps of: forming a plurality of gate structures on a substrate, each gate structure including a gate hard mask; forming an inter-layer insulation layer over t...	09/02/2008
7378737	Structures and methods to enhance copper metallization Disclosed structures and methods inhibit atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure. One exemplary structure includes an inhibiting layer between an insulator and a meta...	05/27/2008
7361591	Method of fabricating semiconductor memory device A method includes preparing a semiconductor substrate having a cell region, a core NMOS region, and a core PMOS region; defining a cell active region, an NMOS active region, and a PMOS active region in the cell region, the core NMOS region, and the core PMOS region,...	04/22/2008
7361974	Manufacturing method for an integrated semiconductor structure The present invention provides a manufacturing method for an integrated semiconductor structure comprising the steps of: providing a semiconductor substrate having a plurality of gate stacks in a first region and at least one gate stack in a second region; forming a...	04/22/2008
7358591	Capacitor device and semiconductor device having the same, and capacitor device manufacturing method In a capacitor device of the present invention, a capacitor parts that has a pair of terminals on both end sides respectively is embedded in an insulating film in a state that a lower surface of the capacitor parts is not covered with the insulating film, then upper...	04/15/2008
7321146	DRAM memory cell and method of manufacturing the same A DRAM memory cell includes a semiconductor substrate, an interlayer dielectric having storage node contact plugs that is formed on the semiconductor substrate, and storage node electrodes that are formed on the interlayer dielectric to contact the storage node cont...	01/22/2008
7314795	Methods of forming electronic devices including electrodes with insulating spacers thereon An electronic device may include a substrate, a conductive layer on the substrate, and an insulating spacer. The conductive electrode may have an electrode wall extending away from the substrate. The insulating spacer may be provided on the electrode wall with porti...	01/01/2008
7312117	Semiconductor device and method of manufacturing the same A semiconductor device includes a word line structure that extends in a first direction on an active region defined on a substrate. First and second contact pads are formed on the active region at both sides of the word line structure. Bit line structures are electr...	12/25/2007
7300841	Capacitor and method of manufacturing the same A capacitor includes a cylindrical storage electrode formed on a substrate. A ring-shaped stabilizing member encloses an upper portion of the storage electrode to structurally support the storage electrode and an adjacent storage electrode. The ring-shaped stabilizi...	11/27/2007
7291556	Method for forming small features in microelectronic devices using sacrificial layers A dielectric layer is formed on a region of a microelectronic substrate. A sacrificial layer is formed on the dielectric layer, and portions of the sacrificial layer and the dielectric layer are removed to form an opening that exposes a portion of the region. A cond...	11/06/2007
7265050	Methods for fabricating memory devices using sacrificial layers A protection layer is formed on a semiconductor substrate having a cell array region and an alignment key region. A plurality of data storage elements are formed on the protection layer in the cell array region. An insulating layer is formed on the data storage elem...	09/04/2007
7238585	Method of forming a storage electrode of a semiconductor device In a storage electrode of a semiconductor device, and a method of forming the same, the storage electrode includes an outer cylinder including a first outer cylindrical portion having a first outer diameter, and a second outer cylindrical portion that is formed on t...	07/03/2007
7223693	Methods for fabricating memory devices using sacrificial layers and memory devices fabricated by same Methods are provided for fabricating contacts in integrated circuit devices, such as phase-change memories. A protection layer and a sacrificial layer are sequentially formed on a semiconductor substrate. A contact hole is formed through the sacrificial layer and th...	05/29/2007
7223661	Method of manufacturing semiconductor device The method includes forming an isolation film on a silicon substrate to define an active region; forming an antireflective film on an entire surface of the substrate containing the isolation film; forming a photosensitive film pattern on the antireflective film whil...	05/29/2007
7199051	Method for fabricating semiconductor device capable of preventing damages to conductive structure Disclosed is a method for fabricating a semiconductor device with protected conductive structures. The method includes the steps of: forming a plurality of conductive structures on a substrate, each conductive structure including a conductive layer and a hard mask i...	04/03/2007
7179716	Method of forming a metal-containing layer over selected regions of a semiconductor substrate The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a si...	02/20/2007
7151314	Semiconductor device with superimposed poly-silicon plugs A semiconductor device includes a first insulating layer; a first poly-silicon plug formed in the first insulating layer; a second insulating layer, formed on the first insulating layer; and a second poly-silicon plug that is formed in the second insulating layer. A...	12/19/2006
7119015	Method for forming polysilicon plug of semiconductor device Disclosed is a method for forming a polysilicon plug of a semiconductor device. The method comprises the steps of: forming a stacked pattern of a wordline and a hard mask film on a semiconductor substrate comprising a cell region and a peripheral circuit region; for...	10/10/2006
7078292	Storage node contact forming method and structure for use in semiconductor memory A storage node contact forming method and structure reduces the number of processes required by the conventional art and increases a critical dimension of a storage node to prevent a leaning phenomenon and reduce a manufacturing cost of semiconductor memory devices....	07/18/2006
6703272	Methods of forming spaced conductive regions, and methods of forming capacitor constructions The invention includes a method of forming spaced conductive regions. A construction is formed which includes a first electrically conductive material over a semiconductor substrate. The construction also includes openings extending through the first elec...	03/09/2004
6703657	DRAM cell having electrode with protection layer A DRAM cell is provided, along with a method for fabricating such a DRAM cell. A protection layer pattern is formed to cover a common drain region of first and second access transistors. Storage node holes are then formed to expose each source region of t...	03/09/2004
6699768	Method for forming capacitor of semiconductor device Methods for forming capacitors of semiconductor devices are disclosed, and more particularly, methods for forming capacitors having a stacked structure of metal layer-insulating film-metal layer and having its storage electrode formed of ruthenium (herein...	03/02/2004
6700153	One-cylinder stack capacitor and method for fabricating the same An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a...	03/02/2004
6700205	Semiconductor devices having contact plugs and local interconnects Provided is, for example, a method for the fabrication of electrical interconnects in semiconductor devices wherein a substrate including two or more transistors having gate regions wherein the gate regions are not exposed (e.g., the gate regions are comp...	03/02/2004
6696713	Semiconductor memory provided with vertical transistor and method of manufacturing the same There is proposed a vertical cell transfer transistor comprising a channel region constituted by a monocrystalline silicon layer which is formed by way of epitaxial growth, source-drain regions constituted by n-type diffusion regions which are formed over...	02/24/2004
6696721	Semiconductor device having a three-dimensional capacitor such as a stack-type capacitor A plurality of storage node electrodes are formed on a semiconductor substrate. A capacitor insulating film is formed on the storage node electrodes. A plate electrode, facing the storage node electrodes, is formed on the capacitor insulating film. A cavi...	02/24/2004
6693015	Method for improved processing and etchback of a container capacitor A capacitor having improved size for enhanced capacitance and a method of forming the same are disclosed. In one embodiment, the capacitor is a stacked container capacitor used in a dynamic random access memory circuit. The capacitor provides a capacitor ...	02/17/2004
6690055	Devices containing platinum-rhodium layers and methods A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula Ly RhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and elec...	02/10/2004
6686238	Method of forming a semiconductor memory device A process for enhancing refresh in Dynamic Random Access Memories wherein n-type impurities are implanted into the capacitor buried contact after formation of the access transistor components. The process comprises forming a gate insulating layer on a sub...	02/03/2004
6682975	Semiconductor memory device having self-aligned contact and fabricating method thereof There is provided a method of fabricating a semiconductor memory device having a self-aligned contact, including the steps of forming a plurality of gate electrodes by interposing a gate insulating layer on an active region of a semiconductor substrate in...	01/27/2004
6680511	Integrated circuit devices providing improved short prevention The present invention provide integrated circuit devices and methods of fabricating the same that include a microelectronic substrate and a conductive layer disposed on the microelectronic substrate. An insulating layer is disposed on the conductive layer...	01/20/2004
6677650	Silicon plugs and local interconnect for embedded memory and system-on-chip (SOC) applications A process for fabricating system-on-chip devices which contain embedded DRAM along with other components such as SRAM or logic circuits is disclosed. Local interconnects, via salicides and tungsten are formed subsequent to polysilicon plugs required for t...	01/13/2004
6677630	Semiconductor device having ferroelectric film and manufacturing method thereof First and second semiconductor regions are formed separately from each other in a semiconductor substrate. A gate electrode is formed above the semiconductor substrate which lies between the first and second semiconductor regions. An interlayer insulating...	01/13/2004
6677636	Structure for reducing contact aspect ratios An intermediate metal plug is used to raise the platform to which contact is to be made. In the illustrated process, a partial bit line plug is formed adjacent a stacked capacitor, and an interlevel dielectric formed over the capacitor. The bit line conta...	01/13/2004
6673670	Method of forming a capacitor structure and DRAM circuitry having a capacitor structure including interior areas spaced apart from one another in a non-overlapping relationship Capacitors, DRAM circuitry, and methods of forming the same are described. In one embodiment, a capacitor comprises a first container which is joined with a substrate node location and has an opening defining a first interior area. A second container is j...	01/06/2004
6670238	Method and structure for reducing contact aspect ratios An intermediate metal plug is used to raise the platform to which contact is to be made. In the illustrated process, a partial bit line plug is formed adjacent a stacked capacitor, and an interlevel dielectric formed over the capacitor. The bit line conta...	12/30/2003
6670682	Multilayered doped conductor A memory device addressing reliability and refresh characteristics through the use of a multilayered doped conductor, and a method making are disclosed. The multilayered doped conductor creates a high dopant concentration in the active area close to the c...	12/30/2003
6667209	Methods for forming semiconductor device capacitors that include an adhesive spacer that ensures stable operation In a method for forming capacitors of semiconductor devices, a contact plug penetrating an interlayer dielectric (ILD) is formed on a semiconductor substrate. A supporting layer, an etch stop layer, and a molding layer are sequentially formed on the semic...	12/23/2003
6667505	Semiconductor device having a plurality of capacitors aligned at regular intervals A semiconductor device includes a capacitor formed to have an approximately elliptical cross-sectional shape and extending upwards from upper surface of each said storage node contact. When an arrangement of capacitors is seen vertically from above, rows ...	12/23/2003

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Class 257/E21.649 - Making connection between transistor and capacitor, e.g., plug (EPO)