Class 257/E21.648 - Capacitor stacked over transfer transis tor (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.647. This subclass
No. of patents: 1340
Last issue date: 10/21/2008

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Number	Title	Issue Date
7439132	Semiconductor device comprising capacitor and method of fabricating the same A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. ...	10/21/2008
7413952	Methods of forming a plurality of circuit components and methods of forming a plurality of structures suspended elevationally above a substrate A plurality of capacitor electrode openings is formed within capacitor electrode-forming material. A first set of the openings is formed to a depth which is greater within the capacitor electrode-forming material than is a second set of the openings. Conductive firs...	08/19/2008
7410865	Method for fabricating capacitor of semiconductor device Disclosed herein is a method for fabricating a capacitor of a semiconductor device. The method comprises the steps of forming an interlayer insulating film on a semiconductor substrate, forming contact plugs connected to the semiconductor substrate though the interl...	08/12/2008
7405121	Semiconductor device with capacitors and its manufacture method An interlayer insulating film (22) is formed on a semiconductor substrate. A conductive plug (25) is embedded in a via hole formed through the interlayer insulating film. An oxygen barrier conductive film (33) is formed on the interlayer insulat...	07/29/2008
7402486	Cylinder-type capacitor and storage device, and method(s) for fabricating the same A one cylinder storage device and a method for fabricating a capacitor are disclosed, realizing simplified fabrication by overexposure with a mask having a plurality of holes, in which the method includes forming a contact hole in an insulating layer on a semiconduc...	07/22/2008
7402488	Method of manufacturing a semiconductor memory device A method of manufacturing a semiconductor memory device includes forming a carbon-containing layer on a semiconductor substrate, forming an insulating layer pattern on the carbon-containing layer, the insulating layer pattern partially exposing an upper surface of t...	07/22/2008
7393753	Method for forming a storage cell capacitor compatible with high dielectric constant materials Described are integrated circuit electrodes and method for fabricating an electrode, which include, in an embodiment forming a silicon, first portion of the electrode in a lower region of a substrate opening. The method may further include forming a second portion o...	07/01/2008
7385235	Spacer chalcogenide memory device The present invention includes devices and methods to form memory cell devices including a spacer comprising a programmable resistive material alloy. Particular aspects of the present invention are described in the claims, specification and drawings. ...	06/10/2008
7381613	Self-aligned MIM capacitor process for embedded DRAM A semiconductor device includes a group of capacitors and a trench. Each capacitor includes a first conductive material layer, a dielectric layer, and a second conductive material layer. The dielectric layer is located between the first and second conductive materia...	06/03/2008
7368344	Methods of reducing floating body effect Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion region and the accompanying electrostatic potential created. In a prefe...	05/06/2008
7361549	Method for fabricating memory cells for a memory device The invention provides a method for fabricating a memory device having memory cells which are formed on a microstructured driving unit (100), in which method a shaping layer (104) is provided and is patterned in such a manner that vertical trench struc...	04/22/2008
7341906	Method of manufacturing sidewall spacers on a memory device, and device comprising same The present invention is generally directed to a method of manufacturing sidewall spacers on a memory device, and a memory device comprising such sidewall spacers. In one illustrative embodiment, the method includes forming sidewall spacers on a memory device compri...	03/11/2008
7329575	Semiconductor device and semiconductor device manufacturing method A semiconductor technique is provided which can achieve both of lowered resistance in a logic formation region and reduced leakage current of the capacitor of a memory device. Source/drain regions (4) are formed in the upper surface of a semiconductor substra...	02/12/2008
7329574	Methods of forming capacitor electrodes using fluorine and oxygen A method of forming a capacitor can include etching a metal-nitride layer in an environment comprising fluorine and oxygen to form a capacitor electrode. ...	02/12/2008
7329576	Double-sided container capacitors using a sacrificial layer Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides...	02/12/2008
7326613	Methods of manufacturing semiconductor devices having elongated contact plugs A method of manufacturing a semiconductor device includes forming conductive structures on a substrate. Each of the conductive structures has a line shape that extends along a first direction parallel to the substrate. Insulating spacers are formed on upper sidewall...	02/05/2008
7320911	Methods of forming pluralities of capacitors A method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes comprising sidewalls. The plurality of capacitor electrodes are supported at least in part with a retaining structure which engages the sidewalls, with the retaining...	01/22/2008
7320943	Capacitor with hafnium, lanthanum and oxygen mixed dielectric and method for fabricating the same Disclosed is a capacitor with a dielectric layer having a low equivalent oxide thickness compared to a HfO2 layer and capable of decreasing a level of a leakage current incidence and a method for fabricating the same. Particularly, the capacitor includes:...	01/22/2008
7312118	Semiconductor device and method of manufacturing the same Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor structure formed above the semiconductor substrate and comprising a first electrode, a second electrode provided below the first electrode, a third electrode provided below the sec...	12/25/2007
7312489	Memory cell having bar-shaped storage node contact plugs and methods of fabricating same According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. A plurality of parallel bit line patterns are placed on the bit line interlayer insulating layer. Each of the bit line patterns has a bit line...	12/25/2007
7312131	Method for forming multilayer electrode capacitor A method of forming a multilayer electrode capacitor is described. A trench is formed in a substrate or in an insulator layer. Two sets of conductive layers are deposited on the inner surface of the trench. The first set of conductive layers is electrically connecte...	12/25/2007
7282405	Semiconductor memory device and method for manufacturing the same A semiconductor memory device includes a plurality of bit line structures arranged in parallel on a semiconductor substrate and having a plurality of bit lines and an insulating material surrounding the bit lines, an isolation layer formed in a portion in spaces bet...	10/16/2007
7273781	Method of forming a capacitor in a semiconductor device without wet etchant damage to the capacitor parts To form a capacitor in a semiconductor device, an etching barrier layer and a mold insulating layer are sequentially formed on an interlayer insulating film having a contact plug. A hole exposing the contact plug is formed by etching the mold insulating layer and th...	09/25/2007
7268034	Methods of forming pluralities of capacitors, and integrated circuitry A method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes comprising sidewalls. The plurality of capacitor electrodes are supported at least in part with a retaining structure which engages the sidewalls, with the retaining...	09/11/2007
7262453	Multiple stacked capacitors formed within an opening with thick capacitor dielectric For forming stacked capacitors, an opening is formed through at least one semiconductor material. A lower electrode material is patterned within the opening to form a plurality of lower electrodes within the opening. The stacked capacitors are formed with the lower ...	08/28/2007
7247903	Semiconductor memory device A semiconductor memory device having a transistor formed on a semiconductor substrate and a capacitor formed on the upper layer of the transistor and electrically connected to the transistor, includes: a cell contact which is formed on a first interlayer insulation ...	07/24/2007
7247537	Semiconductor device including an improved capacitor and method for manufacturing the same In a semiconductor device according to embodiments of the invention, a capacitor includes a storage electrode having a cylindrical storage conductive layer pattern and connecting members formed on the upper portion of the cylindrical storage conductive layer pattern...	07/24/2007
7224015	Method for making a stack of capacitors, in particular for dynamic random access memory [DRAM] The invention concerns a method which consists in forming on a substrate (1) coated with a dielectric material layer (3) provided with a window (3a), a stack of successive layers alternately of germanium or SiGe alloy (4, 6, 8) and...	05/29/2007
7223661	Method of manufacturing semiconductor device The method includes forming an isolation film on a silicon substrate to define an active region; forming an antireflective film on an entire surface of the substrate containing the isolation film; forming a photosensitive film pattern on the antireflective film whil...	05/29/2007
7199419	Memory structure for reduced floating body effect Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion region and the accompanying electrostatic potential created. In a prefe...	04/03/2007
7176082	Analog capacitor in dual damascene process A process for forming a capacitive structure that includes an upper layer having a first capacitor electrode section therein. A capacitor dielectric layer is formed adjacent the upper layer. The capacitor dielectric layer covers the first capacitor electrode section...	02/13/2007
7166882	Semiconductor device and method for fabricating the same The semiconductor device comprises: an insulation film 72 formed over a silicon substrate 10, an insulation film 78 formed on the insulation film 72 and having opening 82, and conductor 84 formed at least in the opening 8...	01/23/2007
7078292	Storage node contact forming method and structure for use in semiconductor memory A storage node contact forming method and structure reduces the number of processes required by the conventional art and increases a critical dimension of a storage node to prevent a leaning phenomenon and reduce a manufacturing cost of semiconductor memory devices....	07/18/2006
6924522	EEPROM transistor for a DRAM A floating gate transistor is formed by simultaneously creating buried contact openings on both EEPROM transistor gates and DRAM access transistor source/drain diffusions. Conventional DRAM process steps are used to form cell storage capacitors in all the buried con...	08/02/2005
6700148	Method for fabricating a DRAM cell capacitor using hemispherical grain (HSG) silicon A stacked DRAM cell capacitor having HSG silicon only on a top portion of a storage node, not on a bottom portion thereof. The storage node has a double layer structure including a bottom layer and a top layer. The bottom layer is made of a conductive mat...	03/02/2004
6699745	Capacitor and memory structure and method A rugged polysilicon electrode for a capacitor has high surface area enhancement with a thin layer by high nucleation density plus gas phase doping which also enhances grain shape and oxygen-free dielectric formation....	03/02/2004
6696722	Storage node of DRAM cell A storage node of a DRAM cell capacitor includes a first insulating layer in which a bit line pattern is formed, a second insulating layer formed on the first insulating layer of which material is different from that of the second insulating layer, a firs...	02/24/2004
6696720	Semiconductor device having stacked capacitor and protection element A semiconductor device of the present invention comprises a capacitor portion composed of a lower electrode, a capacitor insulator film, and an upper electrode sequentially stacked on an inter-layer insulator film on a semiconductor substrate; and a charg...	02/24/2004
6696716	Structures and methods for enhancing capacitors in integrated ciruits Systems, devices, structures, and methods are described that inhibit dielectric degradation in the presence of contaminants. An enhanced capacitor in a dynamic random access memory cell is discussed. The enhanced capacitor includes a first electrode, a di...	02/24/2004
6696719	Semiconductor device with improved peripheral resistance element and method for fabricating same A semiconductor device in which a cell capacitor with an MIM or MIS structure is formed using a conductive material with a low resistivity for the upper electrode and a resistance element is formed using a conductive material with high resistance without ...	02/24/2004

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Class 257/E21.648 - Capacitor stacked over transfer transis tor (EPO)