Class 257/E21.639 - With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.632. This subclass
No. of patents: 148
Last issue date: 08/26/2008

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Number	Title	Issue Date
7416933	Methods of enabling polysilicon gate electrodes for high-k gate dielectrics Complementary transistors and methods of forming the complementary transistors on a semiconductor assembly are described. The transistors are formed with an optional interfacial oxide, such as SiO2 or oxy-nitride, to overlay a semiconductor substrate whic...	08/26/2008
7407850	N+ poly on high-k dielectric for semiconductor devices The present invention facilitates semiconductor fabrication by providing methods of fabrication that employ high-k dielectric layers. An n-type well region (304) is formed within a semiconductor body (302). A threshold voltage adjustment implant is per...	08/05/2008
7405118	Semiconductor device and method of fabricating the same The present invention provides a semiconductor device fabrication method including the steps of: forming first gate insulating films in first to third active regions of a silicon substrate; wet-etching the first gate insulating film of the second active region throu...	07/29/2008
7405120	Method of forming a gate insulator and thin film transistor incorporating the same Disclosed herein is a method of manufacturing a gate insulator and a thin film transistor (“TFT”) incorporating the gate insulator, including forming an oxygen-containing, conductive gate on a substrate; forming a gate insulator material layer on the substrate s...	07/29/2008
7396777	Method of fabricating high-k dielectric layer having reduced impurity Methods of fabricating high-k dielectric layers having reduced impurities for use in semiconductor applications are disclosed. The methods include the steps of: forming a stacked dielectric layer having a first dielectric layer and a second dielectric layer formed o...	07/08/2008
7378358	Method for forming insulating film on substrate, method for manufacturing semiconductor device and substrate-processing apparatus A substrate-processing apparatus (100, 40) comprises a radical-forming unit (26) for forming the nitrogen radicals and oxygen radicals through a high-frequency plasma, a processing vessel (21) in which a substrate (W) to be processed is held, an...	05/27/2008
7378319	Method of forming double gate dielectric layers and semiconductor device having the same A method of forming double gate dielectric layers composed of an underlying oxide layer and an overlying oxy-nitride layer is provided to prevent degradation of gate dielectric properties due to plasma-induced charges. In the method, the oxide layer is thermally gro...	05/27/2008
7351632	Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. An oxide layer is formed in core and I/O regions of a semiconductor device (506). The oxide lay...	04/01/2008
7342290	Semiconductor metal contamination reduction for ultra-thin gate dielectrics A bilayer dielectric structure for substantially reducing or eliminating metal contaminants formed during subsequent polysilicon deposition is provided. The bilayer dielectric structure includes an upper surface region that is rich in chlorine located atop a bottom ...	03/11/2008
7339240	Dual-gate integrated circuit semiconductor device The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high ...	03/04/2008
7329570	Method for manufacturing a semiconductor device An exemplary method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming a P-well and an N-well for high voltage (HV) devices and a first well in a low voltage/medium voltage (LV/MV) region for a logic device, ...	02/12/2008
7297586	Gate dielectric and metal gate integration A CMOS device is provided which comprises (a) a substrate (103); (b) a gate dielectric layer (107) disposed on the substrate, the gate dielectric comprising a metal oxide; (c) an NMOS electrode (105) disposed on a first region of said gate diele...	11/20/2007
7282402	Method of making a dual strained channel semiconductor device According to the embodiments to the present disclosure, the process of making a dual strained channel semiconductor device includes integrating strained Si and compressed SiGe with trench isolation for achieving a simultaneous NMOS and PMOS performance enhancement. ...	10/16/2007
7253061	Method of forming a gate insulator in group III-V nitride semiconductor devices A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer ...	08/07/2007
7244645	Methods of forming electronic devices including high-k dielectric layers and electrode barrier layers and related structures Methods of forming a microelectronic device can include providing a gate dielectric layer on a channel region of a semiconductor substrate wherein the gate dielectric layer is a high-k dielectric material. A gate electrode barrier layer can be provided on the gate d...	07/17/2007
7238996	Semiconductor device A semiconductor device 100 comprises a silicon substrate 102, an N-type MOSFET 118 including a high concentration-high dielectric constant film 108b formed on the silicon substrate 102 and a polycrystalline silicon film 1...	07/03/2007
7226830	Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS dielectric formation The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. A first oxide layer is formed in core and I/O regions of a semiconductor device (506). The firs...	06/05/2007
7220635	Method for making a semiconductor device with a metal gate electrode that is formed on an annealed high-k gate dielectric layer A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, and forming a sacrificial layer on the high-k gate dielectric layer. After etching the sacrificial layer, first and second spacers a...	05/22/2007
7208804	Crystalline or amorphous medium-K gate oxides, Y0and Gd0 A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset of 2 eV or greater. Gate oxi...	04/24/2007
7157378	Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, forming a trench within the dielectric layer, and forming a high-k gate dielectric layer within the trench. After forming a first metal layer on...	01/02/2007
7148100	Methods of forming electronic devices including high-k dielectric layers and electrode barrier layers Methods of forming a microelectronic device can include providing a gate dielectric layer on a channel region of a semiconductor substrate wherein the gate dielectric layer is a high-k dielectric material. A gate electrode barrier layer can be provided on the gate d...	12/12/2006
7144780	Semiconductor device and its manufacturing method The objective of this invention is to provide a semiconductor device and its manufacturing method with which the offset can be kept fixed even in high breakdown voltage MOS transistors, and that can accommodate high voltages for high breakdown voltage MOS transistor...	12/05/2006
6790755	Preparation of stack high-K gate dielectrics with nitrided layer Numerous methods for forming various semiconductor structures are disclosed. In one embodiment, a layered dielectric structure of alternating sub-layers of a first dielectric material and a second dielectric material is formed on a suitable semiconductor substrate. ...	09/14/2004
6703278	Method of forming layers of oxide on a surface of a substrate A method of forming oxide layers of different thickness on a substrate is described, wherein the oxide layers preferably serve as gate insulation layers of field effect transistors. The method allows to form very thin, high quality oxide layers with a red...	03/09/2004
6700170	Insulated gate transistor having a gate insulator containing nitrogen atoms and fluorine atoms An insulated gate transistor in which nitride oxide film having a nitrogen concentration of 1×1020 (/cm3) or more and containing a halogen element is used as a gate insulator. Because the gate insulator has a nitrogen concentration ...	03/02/2004
6696735	Semiconductor device and method for fabricating the same A semiconductor device according to one aspect of the present invention, is a semiconductor device comprising: a first MOS field effect transistor of an n-type including a first oxynitride film as a first gate insulator film; and a second MOS field effect...	02/24/2004
6690046	Semiconductor assemblies, methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates The invention encompasses semiconductor assemblies that include a semiconductor substrate having a first region and a second region defined therein. A first oxide region is on the substrate and covers the first region of the substrate. The first oxide reg...	02/10/2004
6686233	Integration of high voltage self-aligned MOS components The invention relates to a method for forming a high voltage NMOS transistor together with a low voltage NMOS transistor and a low voltage PMOS transistor, respectively, in an n-well CMOS process by adding solely two additional process steps to a conventi...	02/03/2004
6686212	Method to deposit a stacked high-.kappa. gate dielectric for CMOS applications A method of forming a layer of high-.kappa. dielectric material in an integrated circuit includes preparing a silicon substrate; depositing a first layer of metal oxide using ALD with a metal nitrate precursor; depositing another layer of metal oxide usin...	02/03/2004
6683011	Process for forming hafnium oxide films A process for forming a hafnium oxide-containing film on a substrate such as silicon that includes introducing an anhydrous hafnium nitrate-containing precursor into a reactor containing the substrate, and converting the precursor into the hafnium oxide-c...	01/27/2004
6674114	Semiconductor device and manufacturing method thereof In a semiconductor device having P type and N type wells formed bordering on a step on a P type semiconductor substrate, a first transistor (precise transistor) having a first linewidth is formed on the P type well in a step lower region while a second tr...	01/06/2004
6673705	Method of manufacturing a MISFET having post oxide films having at least two kinds of thickness Disclosed is a semiconductor device in which first and second MISFETs are formed, each of the first and second MISFETs including a source region, a drain region, a gate insulating film, a gate electrode and a covering insulating film. The source region an...	01/06/2004
6670248	Triple gate oxide process with high-k gate dielectric A method for forming, on a semiconductor substrate, a dielectric layer having a variable thickness and composition. The dielectric layer so formed can be used to form electronic devices such as MOSFETS and CMOSFETS that require gate dielectrics of differe...	12/30/2003
6667206	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device in which an increase in a parasitic resistance can be prevented, resulting in prevention of a deterioration in a current driving capability and a reduction in an operating speed of a semiconductor integrate...	12/23/2003
6664186	Method of film deposition, and fabrication of structures A method of fabricating aluminum oxide films utilizing aluminum alkoxide precursors is described. The aluminum oxide film is formed by (a) providing an aluminum alkoxide precursor that is dissolved, emulsified or suspended in a liquid; (b) providing a vap...	12/16/2003
6661061	Integrated circuit with differing gate oxide thickness A semiconductor process for producing two gate oxide thicknesses within an integrated circuit in which a semiconductor substrate having a first region and a second region is provided. The first region and the second region are laterally displaced with res...	12/09/2003
6660597	Method for manufacturing semiconductor integrated circuit device In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating...	12/09/2003
6656764	Process for integration of a high dielectric constant gate insulator layer in a CMOS device A CMOS device structure, and a method of fabricating the CMOS device, featuring a gate insulator layer comprised of a high k metal oxide layer, has been developed. The process features formation of recessed, heavily doped source/drain regions, and of vert...	12/02/2003
6656780	Method of manufacturing a semiconductor device having nitrogen ions by twice RTA processes In the fabrication of a MOS transistor, a single process step is performed for controlling the threshold voltage of the transistor and improving the reliability of a gate insulating film so that the number of manufacturing steps is decreased. A desired am...	12/02/2003
6653180	Transistors including gate dielectric layers having different nitrogen concentrations and related structures An electronic device on a semiconductor substrate can include first and second field effect transistors on a substrate. In particular, the first field effect transistor includes a first gate dielectric layer having a first nitrogen concentration, and the ...	11/25/2003

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Class 257/E21.639 - With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (EPO)