Class 257/E21.625 - With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.616. This subclass
No. of patents: 260
Last issue date: 10/14/2008

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Number	Title	Issue Date
7435651	Method to obtain uniform nitrogen profile in gate dielectrics The present invention, in one aspect, provides a method of manufacturing a microelectronics device 100 that includes depositing a first gate dielectric layer 160 over a substrate 115, subjecting the first gate dielectric layer 160 to a fi...	10/14/2008
7422944	Semiconductor device A semiconductor device comprises a semiconductor substrate, a first circuit formed on the substrate, and a second circuit connected to the first circuit as an input/output portion thereof and powered by a voltage higher than that for the first circuit, the first cir...	09/09/2008
7405120	Method of forming a gate insulator and thin film transistor incorporating the same Disclosed herein is a method of manufacturing a gate insulator and a thin film transistor (“TFT”) incorporating the gate insulator, including forming an oxygen-containing, conductive gate on a substrate; forming a gate insulator material layer on the substrate s...	07/29/2008
7400019	Insulating film and electronic device An insulating film comprising: a first barrier layer; a well layer provided; and a second barrier layer is proposed. The first barrier layer consists of a material having a first bandgap and a first relative permittivity. The well layer is provided on the first barr...	07/15/2008
7396719	Method of forming high dielectric film using atomic layer deposition and method of manufacturing capacitor having the high dielectric film A method of forming a high dielectric film using atomic layer deposition (ALD), and a method of manufacturing a capacitor having the high dielectric film, include supplying a precursor containing a metal element to a semiconductor substrate and purging a reactor; su...	07/08/2008
7387921	Method of manufacturing semiconductor device Disclosed is a method of manufacturing a semiconductor device, comprising forming a gate electrode on a main surface of a semiconductor substrate via a gate insulating film, laminating sequentially a first insulating film with oxidation resistance and a silicon film...	06/17/2008
7378322	Semiconductor device having non-uniformly thick gate oxide layer for improving refresh characteristics To improve the refresh characteristics of a semiconductor device, a gate oxide layer comprising a first oxide layer and a second oxide layer are formed on the substrate. A portion of the second oxide layer is isotropically etched using a photoresist layer pattern. A...	05/27/2008
7378358	Method for forming insulating film on substrate, method for manufacturing semiconductor device and substrate-processing apparatus A substrate-processing apparatus (100, 40) comprises a radical-forming unit (26) for forming the nitrogen radicals and oxygen radicals through a high-frequency plasma, a processing vessel (21) in which a substrate (W) to be processed is held, an...	05/27/2008
7378319	Method of forming double gate dielectric layers and semiconductor device having the same A method of forming double gate dielectric layers composed of an underlying oxide layer and an overlying oxy-nitride layer is provided to prevent degradation of gate dielectric properties due to plasma-induced charges. In the method, the oxide layer is thermally gro...	05/27/2008
7371670	Method for forming a (TaO)(TiO)N dielectric layer in a semiconductor device The present invention provides a method for forming an improved dielectric layer for semiconductor devices such as gate structures and capacitors. The method utilizes a layer of (TaO)1-x(TiO)xN (x defined herein) as a substitute for SiO2	05/13/2008
7368400	Method for forming oxide film in semiconductor device The present invention relates to a method for forming an oxide film in semiconductor devices. According to the present invention, after an oxide film is formed, interface trap charge and oxide trap charge can be reduced through a high-temperature thermal treatment p...	05/06/2008
7365403	Semiconductor topography including a thin oxide-nitride stack and method for making the same A semiconductor topography is provided which includes a silicon dioxide layer with a thickness equal to or less than approximately 10 angstroms and a silicon nitride layer arranged upon the silicon dioxide layer. In addition, a method is provided which includes grow...	04/29/2008
7361561	Method of making a metal gate semiconductor device A patterned polysilicon gate is over a metal layer that is over a gate dielectric layer, which in turn is over a semiconductor substrate. A thin layer of material is conformally deposited over the polysilicon gate and the exposed metal layer and then etched back to ...	04/22/2008
7358578	Field effect transistor on a substrate with (111) orientation having zirconium oxide gate insulation and cobalt or nickel silicide wiring Diffusion layers 2-5 are formed on a silicon substrate 1, and gate dielectric films 6, 7 and gate electrodes 8, 9 are formed on these diffusion layers 2-5 so as to be MOS transistors. Zirconium oxide or hafnium oxide ...	04/15/2008
7354830	Methods of forming semiconductor devices with high-k gate dielectric A method of fabricating an integrated circuit is provided. A first gate dielectric portion is formed on a substrate in a first transistor region. The first gate dielectric portion includes a first high-permittivity dielectric material. The first gate dielectric port...	04/08/2008
7339240	Dual-gate integrated circuit semiconductor device The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high ...	03/04/2008
7329568	Method of forming active device on substrate that includes embossing insulating resin layer with metal mold There are provided the steps of forming, on a substrate 10, a semiconductor layer 12 to be a base of a device, forming each of electrodes 14 to be a source electrode and a drain electrode on a surface of the semiconductor layer 12 provide...	02/12/2008
7317231	Method for making a semiconductor device having a high-K gate dielectric and a titanium carbide gate electrode A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected tempera...	01/08/2008
7306994	Semiconductor device having a gate insulating film structure including an insulating film containing metal, silicon and oxygen and manufacturing method thereof Claimed and disclosed is a semiconductor device including a transistor having a gate insulating film structure containing nitrogen or fluorine in a compound, such as metal silicate, containing metal, silicon and oxygen, a gate insulating film structure having a lami...	12/11/2007
7300829	Low temperature process for TFT fabrication Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subject...	11/27/2007
7300847	MOS transistor on an SOI substrate with a body contact and a gate insulating film with variable thickness It is an object to provide an SOI device capable of carrying out body fixation and implementing a quick and stable operation. A gate insulating film (11) having a thickness of 1 to 5 nm is provided between a portion other than a gate contact pad (GP) of a gat...	11/27/2007
7297597	Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG Conventional fabrication of top oxide in an ONO-type memory cell stack usually produces Bird's Beak. Certain materials in the stack such as silicon nitrides are relatively difficult to oxidize. As a result oxidation does not proceed uniformly along the multi-layered...	11/20/2007
7282426	Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof A method for forming a semiconductor device including forming a semiconductor substrate; forming a gate electrode over the semiconductor substrate having a first side and a second side, and forming a gate dielectric under the gate electrode. The gate dielectric has ...	10/16/2007
7259434	Highly reliable amorphous high-k gate oxide ZrO2 A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset in a range of approximately ...	08/21/2007
7253063	Method of fabricating a composite gate dielectric layer A semiconductor device having composite dielectric layer formed between a silicon substrate and a gate electrode. The composite gate dielectric layer including a layer of silicon oxide, SiOx≦2, having a dielectric constant of greater than about 3.9 and ...	08/07/2007
7253061	Method of forming a gate insulator in group III-V nitride semiconductor devices A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer ...	08/07/2007
7208804	Crystalline or amorphous medium-K gate oxides, Y0and Gd0 A gate oxide and method of fabricating a gate oxide that produces a more reliable and thinner equivalent oxide thickness than conventional SiO2 gate oxides are provided. Also shown is a gate oxide with a conduction band offset of 2 eV or greater. Gate oxi...	04/24/2007
7193912	Semiconductor integrated circuit device A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a com...	03/20/2007
7176094	Ultra-thin gate oxide through post decoupled plasma nitridation anneal DPN (decoupled plasma nitridation) is used to improve robustness of ultra thin gate oxides. Conventionally, this is followed by an anneal in pure helium to remove structural defects in the oxide. However, annealing under these conditions has been found to cause a de...	02/13/2007
7169670	Method of forming gate oxide layer in semiconductor device Provided is related to a method of forming a semiconductor device comprises steps of: providing a semiconductor substrate having a low voltage region and a high voltage region; forming a pad oxide layer and a pad nitride layer in sequence on the semiconductor substr...	01/30/2007
7157378	Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode A method for making a semiconductor device is described. That method comprises forming a dielectric layer on a substrate, forming a trench within the dielectric layer, and forming a high-k gate dielectric layer within the trench. After forming a first metal layer on...	01/02/2007
7115461	High permittivity silicate gate dielectric A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substrate 20 having a semiconducting channel region 24 formed therein. A m...	10/03/2006
7087950	Flash memory cell, flash memory device and manufacturing method thereof The present invention relates to a flash memory cell comprising a silicon substrate having an active region comprising a channel region and source-/drain-regions, the active region comprising a projecting portion, which projecting portion at least comprising said ch...	08/08/2006
6927136	Non-volatile memory cell having metal nano-particles for trapping charges and fabrication thereof A non-volatile memory cell is described. The non-volatile memory cell comprises a substrate, a charge-trapping layer, a gate and a source/drain. The charge-trapping layer comprises an insulating layer and metal nano-particles contained therein, wherein the metal nan...	08/09/2005
6703278	Method of forming layers of oxide on a surface of a substrate A method of forming oxide layers of different thickness on a substrate is described, wherein the oxide layers preferably serve as gate insulation layers of field effect transistors. The method allows to form very thin, high quality oxide layers with a red...	03/09/2004
6703322	Method of forming multiple oxide layers with different thicknesses in a linear nitrogen doping process Multiple oxide layers with different thicknesses are formed on a semiconductor substrate with a silicon surface, having a first and second region. A sacrificial oxide layer is formed on the silicon surface to cover both the first region and the second reg...	03/09/2004
6700143	Dummy structures that protect circuit elements during polishing Circuit elements (e.g. transistor gates) formed over a semiconductor substrate are protected by adjacent dummy structures during mechanical or chemical mechanical polishing of an overlying dielectric....	03/02/2004
6699776	MOSFET gate insulating film and method of manufacturing the same A semiconductor device where an interface circuit operating on a high power supply voltage and exchanging signals and data with an external device and an internal circuit operating on a low power supply voltage are integrated in a single chip. The interfa...	03/02/2004
6699743	Masked nitrogen enhanced gate oxide The present invention provides a method for fabricating improved integrated circuit devices. The method of the present invention enables selective hardening of gate oxide layers and includes providing a semiconductor substrate having a gate oxide layer fo...	03/02/2004
6682979	Methods of forming transistors associated with semiconductor substrates The invention encompasses a method of forming an oxide region over a semiconductor substrate. A nitrogen-containing layer is formed across at least some of the substrate. After the nitrogen-containing layer is formed, an oxide region is grown from at leas...	01/27/2004

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Class 257/E21.625 - With particular manufacturing method of gate insulating layer, e.g., different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants (EPO)