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| Number | Title | Issue Date |
| 7435612 | CMOS-MEMS process A fully CMOS compatible MEMS multi-project wafer process comprises coating a layer of thick photoresist on a wafer surface, patterning the photoresist to define a micromachining region, and performing a micromachining in the micromachining region to form suspended m... | 10/14/2008 |
| 7427526 | Deposited thin films and their use in separation and sacrificial layer applications This invention uses large surface to volume ratio materials for separation, release layer, and sacrificial material applications. The invention outlines the material concept, application designs, and fabrication methodologies. The invention is demonstrated using dep... | 09/23/2008 |
| 7425482 | Non-volatile memory device and method for fabricating the same A non-volatile memory device and a method for fabricating the same are provided. The method includes: forming a plurality of gate structures on a substrate, each gate structure including a first electrode layer for a floating gate; forming a first insulation layer c... | 09/16/2008 |
| 7422932 | Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device includes a semiconductor substrate, a memory cell region which is disposed on the semiconductor substrate and has a transistor array of a stacked gate structure having a floating gate, a Ti-containing barrier which is dispos... | 09/09/2008 |
| 7416908 | Method for fabricating a micro structure A method for fabricating a micro structure includes depositing a first layer of a first material over a substrate; patterning a first hard mask over the first layer; depositing a second layer of a second material over the first layer and the first hard mask; pattern... | 08/26/2008 |
| 7407827 | Semiconductor mechanical sensor A semiconductor mechanical sensor having a new structure in which a S/N ratio is improved. In the central portion of a silicon substrate 1, a recess portion 2 is formed which includes a beam structure. A weight is formed at the tip of the beam, and in ... | 08/05/2008 |
| 7351630 | Method of manufacturing flash memory device A method of manufacturing a flash memory device, including the steps of forming a gate on a semiconductor substrate in which a cell region, a source selection line region, and a drain selection line region are defined and then forming spacers on sidewalls of the gat... | 04/01/2008 |
| 7344912 | Method for patterning electrically conducting poly(phenyl acetylene) and poly(diphenyl acetylene) Disclosed are methods of fabricating a memory cell structure. More specifically, a copper substrate, including but not limited to copper contacts and/or bit lines, can be formed within a metal-containing layer, for example. Optionally, one or more via openings can t... | 03/18/2008 |
| 7307280 | Memory devices with active and passive doped sol-gel layers The present memory device includes first and second electrodes, an active layer; and a passive layer, the active and passive layers being between the first and second electrodes, with at least one of the active layer and passive layer being a doped a sol-gel. ... | 12/11/2007 |
| 7303930 | Method of fabricating suspended beam in a MEMS process A method of fabricating a suspended beam in a MEMS process, said method comprising the steps of: (a) etching a pit in a substrate, said pit having a base and sidewalls; (b) depositing sacrificial material on a surf... | 12/04/2007 |
| 7273764 | Sensor with at least one micromechanical structure, and method for producing it The invention relates to a sensor with at least one silicon-based micromechanical structure, which is integrated with a sensor chamber of a foundation wafer, and with at least one covering that covers the foundation wafer in the region of the sensor chamber, and to ... | 09/25/2007 |
| 7271052 | Long retention time single transistor vertical memory gain cell A single transistor vertical memory gain cell with long data retention times. The memory cell is formed from a silicon carbide substrate to take advantage of the higher band gap energy of silicon carbide as compared to silicon. The silicon carbide provides much lowe... | 09/18/2007 |
| 7247511 | Thin film phase-change memory A memory cell comprises a chalcogenide random access memory (CRAM) cell and a CMOS circuit. The CMOS circuit accesses the CRAM cell. The CRAM cell has a cross-sectional area that is determined by a thin film process (e.g., a chalcogenide deposition thin film process... | 07/24/2007 |
| 7211482 | Method of forming a memory cell having self-aligned contact regions A memory cell of a semiconductor device and a method for forming the same, wherein the memory cell includes a substrate having active regions and field regions, a gate layer formed over the substrate, the gate layer including a plurality of access gates formed over ... | 05/01/2007 |
| 7205176 | Surface MEMS mirrors with oxide spacers An MEMS mirror structure is formed using an etching process that forms sidewall oxide spacers while maintaining the integrity of the oxide layer formed over the reflective layer of the MEMS mirror structure. The discrete mirror structure is formed to include a refle... | 04/17/2007 |
| 7183158 | Method of fabricating a non-volatile memory A method of fabricating a nonvolatile memory is provided. The method includes forming a bottom dielectric layer, a charge trapping layer, a top dielectric layer and a conductive layer on the substrate sequentially. Portions of conductive layer, top dielectric layer,... | 02/27/2007 |
| 7172918 | Infrared thermopile detector system for semiconductor process monitoring and control A thermopile-based detector for monitoring and/or controlling semiconductor processes, and a method of monitoring and/or controlling semiconductor processes using thermopile-based sensing of conditions in and/or affecting such processes. ... | 02/06/2007 |
| 7153718 | Micromechanical component as well as a method for producing a micromechanical component A micromechanical component having a substrate beneath at least one structured layer, in the structured layer at least one functional structure being formed, a cap which covers the functional structure, between the cap and the functional structure at least one cavit... | 12/26/2006 |
| 6236059 | Memory cell incorporating a chalcogenide element and method of making same A memory cell incorporating a chalcogenide element and a method of making same is disclosed. In the method, a doped silicon substrate is provided with two or more polysilicon plugs to form an array of diode memory cells. A layer of silicon nitride is disp... | 05/22/2001 |
| 6215140 | Electrically programmable non-volatile memory cell configuration A memory cell configuration in a semiconductor substrate is proposed, in which the semiconductor substrate is of the first conductivity type. Trenches which run parallel to one another are incorporated in the semiconductor substrate, and first address lin... | 04/10/2001 |
| 6153890 | Memory cell incorporating a chalcogenide element A memory cell incorporating a chalcogenide element and a method of making same is disclosed. In the method, a doped silicon substrate is provided with two or more polysilicon plugs to form an array of diode memory cells. A layer of silicon nitride is disp... | 11/28/2000 |
| 5998244 | Memory cell incorporating a chalcogenide element and method of making same A memory cell incorporating a chalcogenide element and a method of making same is disclosed. In the method, a doped silicon substrate is provided with two or more polysilicon plugs to form an array of diode memory cells. A layer of silicon nitride is disp... | 12/07/1999 |
| 5970336 | Method of making memory cell incorporating a chalcogenide element A memory cell incorporating a chalcogenide element and a method of making same is disclosed. In the method, a doped silicon substrate is provided with two or more polysilicon plugs to form an array of diode memory cells. A layer of silicon nitride is disp... | 10/19/1999 |
| 5962900 | High-density diode-based read-only memory device A read-only memory (ROM) device of the type including an array of diode-based memory cells for permanent storage of binary-coded data. The ROM device is partitioned into a memory division and an output division. The memory cells are formed over an insulat... | 10/05/1999 |
| 5907778 | Method of fabricating the high-density diode-based read-only memory device A method is provided for fabricating a read-only memory (ROM) device of the type including an array of diode-based memory cells for permanent storage of binary-coded data. The ROM device is partitioned into a memory division and an output division. The me... | 05/25/1999 |
| 5904526 | Method of fabricating high density semiconductor read-only memory device A ROM device of the type including an array of diode-type memory cells and a method for fabricating the same are provided. The bit lines of this ROM device are a plurality of diffusion regions formed in an alternate manner on the bottom of a plurality of ... | 05/18/1999 |
| 5904527 | Fabricating method for a ROM device using a shockly diode A fabricating method for a ROM device uses the Shockly diode as a memory cell in the ROM device. In the present invention, the current of the memory cell is larger than that of a convention one. In the conventional ROM device, the code is programmed by ma... | 05/18/1999 |
| 5905670 | ROM storage cell and method of fabrication A process and structure are disclosed for a programmable array for use in a read-only memory comprising diode elements and shorted diode elements. The elements are connected across bit and wordlines. The invention utilizes lateral polysilicon diodes and m... | 05/18/1999 |
| 5891778 | Method of fabricating a semiconductor read-only memory device based on a silicon-on-insulation structure A method for fabricating a semiconductor read-only memory (ROM) device of the type including a plurality of diode-type memory cells is provided. The ROM device is based on a silicon-on-insulation (SOI) structure in which all of the memory cells of the ROM... | 04/06/1999 |
| 5891777 | Method of making a ROM diode A method of forming a ROM includes forming a pad oxide layer on a P-type substrate, forming a silicon nitride layer on the pad oxide layer and patterning the silicon nitride layer. A field oxide layer is formed over the substrate. The silicon nitride laye... | 04/06/1999 |
| 5874339 | Method of making a ROM diode A method of forming a ROM includes forming a pad oxide layer on a P-type substrate, forming a silicon nitride layer on the pad oxide layer and patterning the silicon nitride layer. An N well is formed in the P-type substrate, wherein some of the silicon n... | 02/23/1999 |
| 5854111 | ROM device using a schuckly diode A ROM device using a Shockly diode uses the Shockly diode as a memory cell in the ROM device. In the present invention, the current of the memory cell is larger than that of a convention one. In the conventional ROM device, the code is programmed by makin... | 12/29/1998 |
| 5851884 | Structure and manufacturing method for ROM A structure and manufacturing method for ROM suitable for high density component fabrication, mainly consisting of conducting diode memory cells having a forward bias voltage of about 0.4V located above a silicon substrate, and of non-conducting memory ce... | 12/22/1998 |
| 5851885 | Manufacturing method for ROM components having a silicon controlled rectifier structure A manufacturing method and a structure for ROM component having a silicon controlled rectifier as the basic memory instead of a channel transistor in a conventional ROM, and using a formation of contact windows for coding a ROM instead of performing an io... | 12/22/1998 |
| 5847988 | ROM storage cell and method of fabrication A process and structure are disclosed for a programmable array for use in a read-only memory comprising diode elements and shorted diode elements. The elements are connected across bit and wordlines. The invention utilizes lateral polysilicon diodes and m... | 12/08/1998 |
| 5843824 | Diode-based semiconductor read-only memory device and method of fabricating the same A diode-based ROM device and a method for fabricating the same are provided. The ROM device is of the type including an array of diode-based memory cells for permanent storage of binary-coded data therein. In the semiconductor structure of the ROM device,... | 12/01/1998 |
| 5825069 | High-density semiconductor read-only memory device A ROM device of the type including an array of diode-type memory cells and a method for fabricating the same are provided. The bit lines of this ROM device are a plurality of diffusion regions formed in an alternate manner on the bottom of a plurality of ... | 10/20/1998 |
| 5744392 | Process for fabricating a multi-stage read-only memory device A multi-stage ROM device capable of storing multi-stage data and allowing high packing density for a ROM chip thus fabricated and a process for fabricating such a multi-stage ROM device. In the ROM device, the intersection between a first bit line and a w... | 04/28/1998 |
| 5661047 | Method for forming bipolar ROM device A method of forming bipolar ROM device on a semiconductor substrate comprises forming a collector region by doping with a dopant of a first polarity, forming an array of common base regions by doping with a dopant of an opposite polarity, forming a plural... | 08/26/1997 |
| 5643816 | High-density programmable read-only memory and the process for its fabrication A read-only memory device having a memory array composed of memory cells formed as P-N junction diodes when programmed to be in an ON state and as blocking capacitors when remaining in an OFF state. A number of insulators are placed on the surface of a P-... | 07/01/1997 |