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| Number | Title | Issue Date |
| 7442617 | Method for manufacturing bipolar transistor A method for manufacturing a bipolar transistor comprising: forming a device isolation layer in a device isolation region of a semiconductor substrate having therein first and second well regions having a first conductivity; implanting ions of a second conductivity ... | 10/28/2008 |
| 7425754 | Structure and method of self-aligned bipolar transistor having tapered collector A bipolar transistor is provided which includes a tapered, i.e. frustum-shaped, collector pedestal having an upper substantially planar surface, a lower surface, and a slanted sidewall extending between the upper surface and the lower surface, the upper surface havi... | 09/16/2008 |
| 7390720 | Local collector implant structure for heterojunction bipolar transistors and method of forming the same A bipolar transistor structure includes an intrinsic base layer formed over a collector layer, an emitter formed over the intrinsic base layer, and an extrinsic base layer formed over the intrinsic layer and adjacent the emitter. A ring shaped collector implant stru... | 06/24/2008 |
| 7387909 | Methods of forming assemblies displaying differential negative resistance The invention includes a device displaying differential negative resistance characterized by a current-versus-voltage profile having a peak-to-valley ratio of at least about 9. The invention also includes a semiconductor construction comprising a substrate, and a fi... | 06/17/2008 |
| 7371650 | Method for producing a transistor structure A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and... | 05/13/2008 |
| 7342294 | SOI bipolar transistors with reduced self heating A bipolar transistor includes a collector located over a substrate; and a heat conductive path connecting the substrate to the collector. The heat conductive path is filled with a heat conductive material such as metal or polysilicon. In one embodiment the heat cond... | 03/11/2008 |
| 7329584 | Method for manufacturing bipolar transistor A method for manufacturing a bipolar transistor includes: forming a device isolation layer on a semiconductor substrate having first and second well regions of a first conductivity therein; implanting ions of a second conductivity in the first well to form a third w... | 02/12/2008 |
| 6693344 | Semiconductor device having low and high breakdown voltage transistors A base of a low breakdown voltage npn bipolar transistor has p+ diffusion layers. A field insulating layer is formed on the p+ diffusion layer located between the p+ diffusion layer and an emitter, while the p+ ... | 02/17/2004 |
| 6635494 | Method of forming a two-dimensionally arrayed quantum device using a metalloprotein complex as a quantum-dot mask array A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in a metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of t... | 10/21/2003 |
| 6600211 | Bipolar transistor constructions The invention includes a bipolar transistor construction having a collector region, emitter region, and base region extending within a semiconductive material substrate. The construction further comprises separate access regions associated with the base r... | 07/29/2003 |
| 6593628 | Semiconductor device and method of manufacturing same The invention relates to an essentially discrete semiconductor device comprising a semiconductor body (10) having a first, preferably bipolar, transistor (T1) with a first region (1) forming a collector (1) of T1, and a second, preferably also bipolar, tr... | 07/15/2003 |
| 6555440 | Process for fabricating a top side pitted diode device A method of fabricating a diode device, such as a PIN diode, includes forming top and bottom regions of opposite conductivity types and includes anisotropically etching into the top surface to form a pit having side walls that converge with approach to th... | 04/29/2003 |
| 6524921 | Methods of forming bipolar transistor constructions The invention includes a bipolar transistor construction having a collector region, emitter region, and base region extending within a semiconductive material substrate. The construction further comprises separate access regions associated with the base r... | 02/25/2003 |
| 6518197 | Method for manufacturing semiconductor device According to a method for manufacturing a semiconductor device having a junction boundary where SiGe of a first conductivity type and Si or SiGe of a second conductivity type come in contact with each other, a portion where the junction boundary is expose... | 02/11/2003 |
| 6514839 | ESD implantation method in deep-submicron CMOS technology for high-voltage-tolerant applications with light-doping concentrations An implanting method forms high-voltage-tolerant ESD protection devices (ESDPD) for deep-submicron CMOS process activated between LDD implanting and forming sidewall spacers. ESD-Implant (ESDI) regions are located at the ESDPD, without covering the center... | 02/04/2003 |
| 6511889 | Reference voltage supply circuit having reduced dispersion of an output voltage A reference voltage supply circuit is provided with a PNP transistor. The PNP transistor has an N-type well for a base formed at a surface of a P-type semiconductor substrate. The reference voltage supply circuit is further provided with a resistor elemen... | 01/28/2003 |
| 6489665 | Lateral bipolar transistor A substantially concentric lateral bipolar transistor and the method of forming same. A base region is disposed about a periphery of an emitter region, and a collector region is disposed about a periphery of the base region to form the concentric lateral ... | 12/03/2002 |
| 6472288 | Method of fabricating bipolar transistors with independent impurity profile on the same chip Bipolar transistors of different designs, particularly designs optimized for different high frequency applications are formed on the same substrate by separate base layer formation processes for epitaxial growth including different material concentration ... | 10/29/2002 |
| 6437421 | Self-aligned dual-base semiconductor process and structure incorporating multiple bipolar device types A semiconductor process is disclosed which forms openings in a dielectric layer through which the base region of both high-voltage and high-gain bipolar transistors are formed. In one embodiment of the invention, the openings for the high-gain transistors... | 08/20/2002 |
| 6414371 | Process and structure for 50+ gigahertz transistor High frequency performance of transistor designs is enhanced and manufacturing yield improved by removing and reducing sources of parasitic capacitance through combinations of processes from different technologies. After formation of collector, base and e... | 07/02/2002 |
| 6387769 | Method of producing a schottky varicap A method of producing a Schottky varicap (25) including: (a) providing an epitaxial layer (12) on a semiconductor substrate (1); (b) providing an insulating layer including an oxide layer and a nitride layer on a predetermined area of the surface of the epitaxial l... | 05/14/2002 |
| 6319738 | Two-dimensionally arrayed quantum device fabrication method A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in a metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of t... | 11/20/2001 |
| 6313515 | Reference voltage supply circuit A reference voltage supply circuit is provided with a PNP transistor. The PNP transistor has an N-type well for a base formed at a surface of a P-type semiconductor substrate. The reference voltage supply circuit is further provided with a resistor elemen... | 11/06/2001 |
| 6287928 | Two-dimensionally arrayed quantum device A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of the... | 09/11/2001 |
| 6281565 | Semiconductor device and method for producing the same A semiconductor device comprising an isolating layer (diffusion layer) having a deep depth which can be produced with improved productivity and a method of the same. The semiconductor device comprises a semiconductor substrate of a first conductivity type... | 08/28/2001 |
| 6168981 | Method and apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated electronic devices A method and apparatus for the localized reduction of the lifetime of charge carriers in integrated electronic devices. The method comprises the step of implanting ions, at a high dosage and at a high energy level, of a noble gas, preferably helium, in th... | 01/02/2001 |
| 6166426 | Lateral bipolar transistors and systems using such A substantially concentric lateral bipolar transistor and the method of forming same. A base region is disposed about a periphery of an emitter region, and a collector region is disposed about a periphery of the base region to form the concentric lateral ... | 12/26/2000 |
| 6140194 | Method relating to the manufacture of a semiconductor component A manufacturing method for semiconductor components is disclosed which will allow better precision in the definition of the doped areas of the components and the separation of differently doped areas. A selectively shaped area of, for example, polysilicon... | 10/31/2000 |
| 6127236 | Method of forming a lateral bipolar transistor A substantially concentric lateral bipolar transistor and the method of forming same. A base region is disposed about a periphery of an emitter region, and a collector region is disposed about a periphery of the base region to form the concentric lateral ... | 10/03/2000 |
| 6121075 | Fabrication of two-dimensionally arrayed quantum device A quantum device is constituted from a two-dimensional array of quantum dots formed from metal atom aggregates contained in metalloprotein complex. The metalloprotein is arranged on the surface of a substrate having an insulation layer with a pitch of the... | 09/19/2000 |
| 6096618 | Method of making a Schottky diode with sub-minimum guard ring The invention is a method of fabricating a self-aligned, sub-minimum guard ring for a Schottky diode device wherein the sub-minimum guard ring is positioned at the inside edges of adjacent isolation structures and is self-aligned to the intrinsic base imp... | 08/01/2000 |
| 6027963 | Method and mask structure for self-aligning ion implanting to form various device structures A method for making self-aligned sub-micrometer bipolar transistors and FETs on a substrate for BiFET and BiCMOS circuits was achieved using a novel LOCOS structure as a self-aligned implant mask. This LOCOS structure uses a silicon nitride mask comprised... | 02/22/2000 |
| 5976940 | Method of making plurality of bipolar transistors In a semiconductor device comprising a first bipolar transistor and a second bipolar transistor having different voltages formed on a semiconductor substrate made by forming an epitaxial layer on a silicon substrate, in an upper part of the silicon substr... | 11/02/1999 |
| 5965923 | Lateral bipolar transistor and apparatus using same A substantially concentric lateral bipolar transistor and the method of forming same. A base region is disposed about a periphery of an emitter region, and a collector region is disposed about a periphery of the base region to form the concentric lateral ... | 10/12/1999 |
| 5945726 | Lateral bipolar transistor A substantially concentric lateral bipolar transistor having a base region that is disposed about a periphery of an emitter region, and a collector region that is disposed about a periphery of the base region to form the concentric lateral bipolar transis... | 08/31/1999 |
| 5920107 | Semiconductor integrated circuit device with high integration density In a semiconductor device having a PN junction element separating region, in order to reduce a width of the PN junction element separating region without sacrifice of a punch-through breakdown voltage of the PN junction element separating region, the PN j... | 07/06/1999 |
| 5900652 | Apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated electronic devices A method and apparatus for the localized reduction of the lifetime of charge carriers in integrated electronic devices. The method comprises the step of implanting ions, at a high dosage and at a high energy level, of a noble gas, preferably helium, in th... | 05/04/1999 |
| 5846869 | Method of manufacturing semiconductor integrated circuit device A method of manufacturing a bipolar transistor having an improved polysilicon emitter is disclosed. More specifically, hydrogen terminations or OH group terminations adhered (bonded) to an emitter-forming region are eliminated by a heat treatment in an in... | 12/08/1998 |
| 5847440 | Bipolar transistor, semiconductor device having bipolar transistors An n-type epitaxial layer is formed on a main surface of a p-type silicon substrate. An n-type buried diffusion layer is formed extending in both the p-type silicon substrate and the n-type epitaxial layer. An n-type diffusion layer is formed in the surfa... | 12/08/1998 |
| 5691214 | Method of manufacturing semiconductor devices A method of manufacturing a semiconductor device furnished on a silicon substrate with a bipolar element part and a resistance element part formed of an impurity diffusion layer, having (a) a step of forming a first oxide film on said silicon substrate an... | 11/25/1997 |
