Class 257/E21.597 - Formed through semiconductor substrate (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.575. This subclass
No. of patents: 193
Last issue date: 10/07/2008

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Number	Title	Issue Date
7432199	Method of fabricating semiconductor device having reduced contact resistance Provided is a method for fabricating a semiconductor device having reduced contact resistance. In the method, gate patterns defining a narrow opening and a wide opening are formed having an upper portion of a predetermined region of a semiconductor substrate. After ...	10/07/2008
7429529	Methods of forming through-wafer interconnects and structures resulting therefrom Methods for forming conductive vias or through-wafer interconnects in semiconductor substrates and resulting through-wafer interconnect structures are disclosed. In one embodiment of the present invention, a method of forming a through-wafer interconnect structure i...	09/30/2008
7427560	Top layers of metal for high performance IC's A barrier layer is deposited over a layer of passivation including in an opening to a contact pad created in the layer of passivation. A column of three layers of metal is formed overlying the barrier layer and aligned with the contact pad and having a diameter that...	09/23/2008
7411305	Interconnect structure encased with high and low k interlevel dielectrics A structure for improving the electrostatic discharge robustness of an integrated circuit having an electrostatic discharge (ESD) device and a receiver network connected to a pad by interconnects. The interconnect between the pad and the ESD device has a high-k mate...	08/12/2008
7405146	Electroplating method by transmitting electric current from a ball side An electroplating method by transmitting electric current from a ball side is provided. In the electroplating method, the circuit layer is firstly formed on the bump side of the IC board, and the electric current is transmitted to the portion of the circuit layer un...	07/29/2008
7385283	Three dimensional integrated circuit and method of making the same A three dimensional integrated circuit structure includes at least first and second devices, each device comprising a substrate and a device layer formed over the substrate, the first and second devices being bonded together in a stack, wherein the bond between the ...	06/10/2008
7378342	Methods for forming vias varying lateral dimensions Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. A first opening, a second opening, and a third opening are formed in a substrate such that the first opening, the second opening...	05/27/2008
7371682	Production method for electronic component and electronic component A method of manufacturing an electronic part in which on the upper surface of an insulating member covering lower layer wiring, a conductor portion connected from the lower layer wiring is exposed. In this method, electric power supplying film is formed on the upper...	05/13/2008
7371602	Semiconductor package structure and method for manufacturing the same A semiconductor package structure comprises a chip, a plurality of pad extension traces, a plurality of via holes, a lid and a plurality of metal traces, wherein the chip has an optical component and a plurality of pads disposed on its active surface; pad extension ...	05/13/2008
7361596	Semiconductor processing methods The invention includes methods of forming titanium-containing materials, such as, for example, titanium silicide. The invention can use alternating cycles of titanium halide precursor and one or more reductants to form the titanium-containing material. For instance,...	04/22/2008
7354798	Three-dimensional device fabrication method A method is described for fabricating a three-dimensional integrated device including a plurality of vertically stacked and interconnected wafers. Wafers (1, 2, 3) are bonded together using bonding layers (26, 36) of thermoplastic material such as poly...	04/08/2008
7352066	Silicon based optical vias Method of fabricating a semiconductor die with a microlens associated therewith. More particularly, a method for fabricating a vertical channel guide optical via through a silicon substrate wherein the optical via can contain lens elements, a discrete index gradient...	04/01/2008
7344938	Method of fabricating memory A method of fabricating a memory device is described. During the process of forming the memory cell area and the periphery area of a semiconductor device a photoresist layer is formed on the memory cell area before the spacers are formed on the sidewalls of the gate...	03/18/2008
7344994	Multiple layer etch stop and etching method A process for etching semiconductor substrates using a deep reactive ion etching process to produce through holes or slots (hereinafter “slots”) in the substrates. The process includes applying a first layer to a back side of a substrate as a first etch stop mat...	03/18/2008
7341938	Single mask via method and device A method of connecting elements such as semiconductor devices and a device having connected elements such as semiconductor devices. A first element having a first contact structure is bonded to a second element having a second contact structure. A single mask is use...	03/11/2008
7338853	High power radio frequency integrated circuit capable of impeding parasitic current loss A high power RF IC capable of impeding parasitic current loss and method of manufacturing the same. First a step of semiconductor front-side processing for the high power RF components that includes inductive components is performed. Afterwards, the backside of semi...	03/04/2008
7335592	Wafer level package, multi-package stack, and method of manufacturing the same A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least partially surrounds the through hole on the active first surface of t...	02/26/2008
7323785	Semiconductor device A through-electrode that penetrates a semiconductor substrate and that is insulatively separated from the semiconductor substrate includes an inner through-electrode, a quadrangular ring-shaped semiconductor, and an outer peripheral through-electrode. The quadrangul...	01/29/2008
7323410	Dry etchback of interconnect contacts A method and structure for a composite stud contact interface with a decreased contact resistance and improved reliability. A selective dry etch is used which comprises a fluorine containing gas. The contact resistance is reduced by partially dry-etching back the tu...	01/29/2008
7320934	Method of forming a contact in a flash memory device A method of forming a contact between a bitline and a local interconnect in a flash memory device comprises forming a hard mask layer on a planarized surface that includes an exposed top section of the local interconnects prior to depositing an oxide dielectric laye...	01/22/2008
7312530	Semiconductor device with multilayered metal pattern A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first metal pattern, a second metal pattern formed on the second insulatin...	12/25/2007
7304377	Package substrate, integrated circuit apparatus, substrate unit, surface acoustic wave apparatus, and circuit device On a piezoelectric substrate 23, there are provided surface acoustic wave devices F1 and F2 in which predetermined circuit patterns are formed, and a package substrate 11 comprising side vias 16 formed in a caved manner in ...	12/04/2007
7300857	Through-wafer interconnects for photoimager and memory wafers A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Fu...	11/27/2007
7282444	Semiconductor chip and manufacturing method for the same, and semiconductor device The invention provides a semiconductor chip manufacturing method including the steps of: forming a concave portion extended in the thickness direction of a semiconductor substrate which has a front surface and a rear surface and has a function device formed on the f...	10/16/2007
7279776	Method of manufacturing semiconductor device and semiconductor device A silicon substrate has a protective film formed on each side. A semiconductor surface opening not smaller than a given region is formed by removing the protective film. A through-hole having an inner size smaller than the given region is formed in the opening by la...	10/09/2007
7276787	Silicon chip carrier with conductive through-vias and method for fabricating same A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic...	10/02/2007
7265023	Fabrication method for a semiconductor structure The present invention provides a fabrication method for a semiconductor structure having the steps of providing a semiconductor substrate (1); providing and patterning a silicon nitride layer (3) on the semiconductor substrate (1) as topmost lay...	09/04/2007
7265052	Methods of forming conductive through-wafer vias The present invention is generally directed to various methods of forming conductive through-wafer vias. In one illustrative embodiment, the method comprises providing a layer of semiconducting material, forming a layer of metal on a first side of the layer of semic...	09/04/2007
7256497	Semiconductor device with a barrier layer and a metal layer This invention provides a semiconductor device that can minimize deterioration of electric characteristics of the semiconductor device while minimizing the amount of etching required. In the semiconductor device of the invention, a pad electrode layer formed of a fi...	08/14/2007
7232754	Microelectronic devices and methods for forming interconnects in microelectronic devices Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backs...	06/19/2007
7230318	RF and MMIC stackable micro-modules A new method to form shielded vias with microstrip ground plane in the manufacture of an integrated circuit device is achieved. The method comprises, first, providing a substrate. The substrate is etched through to form holes for planned shielded vias with microstri...	06/12/2007
7211510	Stacking circuit elements A method of stacking dice in an electronic circuit includes controlling a size of a hole made in a connection pad on each die of said dice to selectively provide an electrical connection to a particular die in the stack. Additionally, a method of stacking dice in an...	05/01/2007
7208410	Methods relating to forming interconnects Methods relating to forming interconnects through injection of conductive materials, to fabricating semiconductor component assemblies, and to resulting assemblies. A semiconductor component substrate, such as a semiconductor die or other substrate, has dielectric m...	04/24/2007
7192864	Method of forming interconnection lines for semiconductor device The present invention discloses a method of fabricating interconnection lines for a semiconductor device. The method includes forming an interlayer insulating layer on a semiconductor substrate. A via hole is formed through the interlayer insulating layer. A via fil...	03/20/2007
7176127	Method of manufacturing semiconductor device having through hole with adhesion layer thereon An adhesion layer for causing a plug for electrically connecting a lower wiring and an upper wiring opposite to each other with an interlayer insulating film interposed therebetween to adhere to the interlayer insulating film is formed within a through hole for form...	02/13/2007
6696746	Buried conductors Buried conductors within semiconductor devices and structures, and methods for forming such conductors, are disclosed. In one embodiment of the invention, a semiconductor structure includes a substrate and a plurality of conductive elements buried within ...	02/24/2004
6696305	Metal post manufacturing method A method of forming metal posts. A fixture having an array of wire guide heads is provided. A conductive wire is threaded through a hole in each wire guide heads. The wire guide heads have a transient electric arcing mechanism for heating the conductive w...	02/24/2004
6693342	Thin microelectronic substrates and methods of manufacture A microelectronic substrate and method for manufacture. In one embodiment, the microelectronic substrate includes a body having a first surface, a second surface facing a direction opposite from the first surface, and a plurality of voids in the body betw...	02/17/2004
6693358	Semiconductor chip, wiring board and manufacturing process thereof as well as semiconductor device A semiconductor chip which does not increase the thickness or the board area of a semiconductor device wherein semiconductor chips are layered and does not increase the wire length between the semiconductor chips even in the case that a plurality of semic...	02/17/2004
6693361	Packaging of integrated circuits and vertical integration A first level packaging wafer is made of a semiconductor or insulating material. The bumps on the wafer are made using vertical integration technology, without solder or electroplating. More particularly, vias are etched part way into a first surface of t...	02/17/2004

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Class 257/E21.597 - Formed through semiconductor substrate (EPO)