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| Number | Title | Issue Date |
| 7423301 | Semiconductor device including fuse elements and bonding pad A semiconductor device includes a lower-layer substrate, a fuse above the lower-layer substrate and blown by radiation with light, a silicon oxide film on the fuse and on an exposed portion of the surface of the lower-layer substrate, and a silicon nitride film on t... | 09/09/2008 |
| 7413985 | Method for forming a self-aligned nitrogen-containing copper silicide capping layer in a microstructure device By forming a copper/silicon/nitrogen alloy in a surface portion of a copper-containing region on the basis of a precursor layer, highly controllable and reliable process conditions may be established. The precursor layer may be formed on the basis of a liquid precur... | 08/19/2008 |
| 7390726 | Switching ratio and on-state resistance of an antifuse programmed below 5 mA and having a Ta or TaN barrier metal layer A metal-to-metal antifuse is disposed between two metal interconnect layers in an integrated circuit. An insulating layer is disposed above a lower metal interconnect layer. The insulating layer includes a via formed therethrough containing a tungsten plug in electr... | 06/24/2008 |
| 7388273 | Reprogrammable fuse structure and method A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material... | 06/17/2008 |
| 7382036 | Doped single crystal silicon silicided eFuse An eFuse begins with a single crystal silicon-on-insulator (SOI) structure that has a single crystal silicon layer on a first insulator layer. The single crystal silicon layer is patterned into a strip. Before or after the patterning, the single crystal silicon laye... | 06/03/2008 |
| 7371677 | Laterally grown nanotubes and method of formation A semiconductor device has lateral conductors or traces that are formed of nanotubes such as carbon. A sacrificial layer is formed overlying the substrate. A dielectric layer is formed overlying the sacrificial layer. A lateral opening is formed by removing a portio... | 05/13/2008 |
| 7338843 | Method for producing an electronic component, especially a memory chip A method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalize an integrated circuit by means of at least one laser via in a layer at least partially covering the circuit. The component comprises a rewiring of ... | 03/04/2008 |
| 7335537 | Method of manufacturing semiconductor device including bonding pad and fuse elements A method of manufacturing a semiconductor device includes forming a first insulating film supported by a semiconductor substrate, forming an aluminum layer supported by the first insulating film, etching the aluminum layer to form a bonding pad and fuse elements, de... | 02/26/2008 |
| 7301216 | Fuse structure A metal layer structure is disclosed. The metal layer structure includes a substrate, a first dielectric layer on a surface of the substrate, and at least one first conductor and at least one second conductor on the first dielectric layer. The second conductor has a... | 11/27/2007 |
| 7282432 | Semiconductor device, manufacturing method and apparatus for the same A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and dif... | 10/16/2007 |
| 7279380 | Method of forming a chalcogenide memory cell having an ultrasmall cross-sectional area and a chalcogenide memory cell produced by the method A method of fabricating a chalcogenide memory cell is described. The cross-sectional area of a chalcogenide memory element within the cell is controlled by the thickness of a bottom electrode and the width of a word line. The method allows the formation of ultra sma... | 10/09/2007 |
| 7208781 | Semiconductor device having fuses A semiconductor device which includes fuses for relieving defective areas in the semiconductor device is described. There is provided a semiconductor device including a semiconductor substrate having a circuit element, an insulating layer provided on the semiconduct... | 04/24/2007 |
| 7199063 | Process for passivating polysilicon and process for fabricating polysilicon thin film transistor A process for passivating polysilicon and a process for fabricating a polysilicon thin film transistor. A polysilicon layer is formed. Next, high-pressure annealing is performed using a fluorine-containing gas, a chlorine-containing gas, an oxygen-containing gas, a ... | 04/03/2007 |
| 7190044 | Fuse structure for a semiconductor device A fuse structure for a semiconductor device is provided. The fuse structure includes a fuse layer between the upper and bottom insulating layers. The fuse layer is connected to the other metal layers through via plugs. The fuse layer includes separate blocks and at ... | 03/13/2007 |
| 7183141 | Reversible field-programmable electric interconnects A programmable interconnect structure and method of operating the same provides a programmable interconnection between electrical contacts. The interconnect includes material that has a reversibly programmable resistance. The material includes a molecular matrix wit... | 02/27/2007 |
| 7153712 | Electrically-programmable integrated circuit fuses and sensing circuits Programmable fuses for integrated circuits are provided. The fuses may be based on polysilicon or crystalline silicon fuse links coated with silicide or other conductive thin films. Fuses may be formed on silicon-on-insulator (SOI) substrates. A fuse may be blown by... | 12/26/2006 |
| 7129155 | Process for producing a plurality of gate stacks which are approximately the same height and equidistant on a semiconductor substrate Process for producing a plurality of gate stacks approximately the same height and equidistant on a semiconductor substrate. The process includes providing a gate dielectric on the semiconductor substrate and applying and patterning at least a first layer and a seco... | 10/31/2006 |
| 7109050 | Solid state image pickup device and method of fabricating the same Disclosed is a solid state image pickup device including a Si substrate, a conductive pattern such as transfer-accumulation electrodes and a buffer wiring formed above the Si substrate, an insulating film provided above the Si substrate in the state of covering the ... | 09/19/2006 |
| 6682970 | Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer A semiconductor structure includes a dielectric layer having first and second opposing sides. A conductive layer is adjacent to the first side of the dielectric layer and is coupled to a first terminal, and a conductive barrier layer is adjacent to the se... | 01/27/2004 |
| 6682659 | Method for forming corrosion inhibited conductor layer A method for passivating a target layer. There is first provided a substrate. There is then formed over the substrate a target layer, where the target layer is susceptible to corrosion incident to contact with a corrosive material employed for further pro... | 01/27/2004 |
| 6677211 | Method for eliminating polysilicon residue A method for eliminating polysilicon residue is provided by converting the polysilicon residue into silicon nitride in two steps. A tilted ion implantation step is performed to implant nitrogen ions into the polysilicon residue to rich nitrogen containing... | 01/13/2004 |
| 6673668 | Method of forming capacitor of a semiconductor memory device A capacitor having a tantalum-contained-dielectric layer is formed by a fabrication method including the steps of: forming a lower electrode on a semiconductor substrate; forming a dielectric layer containing Ta element on the lower electrode; forming a f... | 01/06/2004 |
| 6670266 | Multilayered diffusion barrier structure for improving adhesion property A method has been provided for improving the adhesion of copper to a nitrided metal diffusion barrier material, such as TiN, in an integrated circuit substrate. The method provided a multilayered diffusion barrier structure, comprising a conducting diffus... | 12/30/2003 |
| 6670693 | Laser synthesized wide-bandgap semiconductor electronic devices and circuits A laser apparatus and methods are disclosed for synthesizing areas of wide-bandgap semi-conductor substrates or thin films, including wide-bandgap semiconductors such as silicon carbide, aluminum nitride, gallium nitride and diamond to produce electronic ... | 12/30/2003 |
| 6664197 | Process for etching thin-film layers of a workpiece used to form microelectronic circuits or components A process for removing at least one thin-film layer from a surface of a workpiece pursuant to manufacturing a microelectronic interconnect or component is set forth. Generally stated, the process comprises the oxidation of at least a portion of the at lea... | 12/16/2003 |
| 6657299 | Semiconductor with a stress reduction layer and manufacturing method therefor A surface of a metal wiring formed over a portion of a substrate is oxidized and annealed to generate a stress reduction layer. Then a passsivation layer is deposited over the stress reduction layer and the remaining portions of the substrate so that a se... | 12/02/2003 |
| 6649539 | Semiconductor contact fabrication method A method for reducing damage to a semiconductor structure resulting from migration of constituents of a first component part (3) of the structure into a subsequently deposited second component part (8) of the structure which makes contact with a surface o... | 11/18/2003 |
| 6642100 | Semiconductor device with capacitor structure having hydrogen barrier layer and method for the manufacture thereof A semiconductor device for use in a memory cell including an active matrix provided with a transistor and a first insulating layer formed around the transistor; a capacitor structure, formed on top of the first insulating layer and composed of a bottom el... | 11/04/2003 |
| 6635571 | Process for forming aluminum or aluminum oxide thin film on substrates Disclosed is a process for depositing an aluminum oxide thin film necessary for semiconductor devices. The process includes the steps of: subjecting a gaseous organoaluminum compound as an aluminum source in contact with a target substrate and depositing ... | 10/21/2003 |
| 6617664 | Semiconductor device having a fuse and a fabrication process thereof In a semiconductor device having a fuse and an etching stopper film covering the fuse, an optical window exposing the etching stopper film and a contact hole exposing a conductor pattern are formed simultaneously. By applying a dry etching process further... | 09/09/2003 |
| 6602653 | Conductive material patterning methods A patterning method includes providing a first material (e.g., copper) and transforming at a least a surface region of the first material to a second material (e.g., copper oxide). One or more portions of the second material (e.g., copper oxide) are conve... | 08/05/2003 |
| 6603207 | Electrode structure for semiconductor device, method for forming the same, mounted body including semiconductor device and semiconductor device An electrode structure for a semiconductor device and a method for forming the electrode structure, and a mounted body including the semiconductor device are provided in which the semiconductor device can be easily connected to a circuit board with high r... | 08/05/2003 |
| 6597009 | Reduced contact area of sidewall conductor A method including, in a dielectric material over a contact on a substrate, forming a trench to the contact; introducing an electrode material along the sidewalls of the trench; introducing a phase change material over material along a first sidewall; and... | 07/22/2003 |
| 6573174 | Method for reducing surface defects of semiconductor substrates A method for reducing surface defects of a semiconductor substrate comprising selectively etching an insulation film formed on a semiconductor substrate and forming a contact hole, forming a conductive layer in a contact hole and on the upper surface of t... | 06/03/2003 |
| 6573194 | Method of growing surface aluminum nitride on aluminum films with low energy barrier An integrated circuit having an interconnect layer (104) that comprises a first barrier layer (106) and an aluminum-based layer (108) overlying the first barrier layer (106). An aluminum-nitride layer (112) is located on the surface of the aluminum-based ... | 06/03/2003 |
| 6573607 | Semiconductor device and manufacturing method thereof There is presented a semiconductor device including multiple levels of copper interconnects; wherein the surface of a copper interconnect corresponding to at least one underlying layer of another copper interconnect layer is turned into copper oxide to a ... | 06/03/2003 |
| 6559412 | Laser processing The invention provides a system and method for vaporizing a target structure on a substrate. According to the invention, a calculation is performed, as a function of wavelength, of an incident beam energy necessary to deposit unit energy in the target str... | 05/06/2003 |
| 6544886 | Process for isolating an exposed conducting surface A method of isolating an exposed conductive surface. An aluminum layer (130) is selectively formed over the exposed conductive (106) surface (e.g., Cu) but not over the surrounding dielectric (110) surface using a thermal CVD process. The aluminum layer (... | 04/08/2003 |
| 6545339 | Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication A semiconductor structure that includes at least one circuit element of a fuse, a diffusion barrier or a capacitor that is formed by refractory metal-silicon-nitrogen is disclosed. A method for fabricating such semiconductor structure that includes a fuse... | 04/08/2003 |
| 6534357 | Methods for forming conductive structures and structures regarding same A method for forming a metal/metal oxide structure that includes forming metal oxide regions, e.g., ruthenium oxide regions, at grain boundaries of a metal layer, e.g., platinum. Preferably, the metal oxide regions are formed by diffusion of oxygen throug... | 03/18/2003 |
