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| Number | Title | Issue Date |
| 5763953 | Semiconductor device and method of manufacturing the same A semiconductor device includes a first metal film formed on a semiconductor substrate, a second metal film formed on the first metal film and containing silver as a main component, and a protective film containing a metal element of the first metal film ... | 06/09/1998 |
| 5763010 | Thermal post-deposition treatment of halogen-doped films to improve film stability and reduce halogen migration to interconnect layers A method of stabilizing a halogen-doped silicon oxide film to reduce halogen atoms migrating from said film during subsequent processing steps. A halogen-doped film is deposited over a substrate and then subjected to a degassing step in which the film is ... | 06/09/1998 |
| 5759913 | Method of formation of an air gap within a semiconductor dielectric by solvent desorption A dielectric material is provided having air gaps which form during dielectric deposition between interconnects. The dielectric is deposited in interconnect-spaced geometries which have certain aspect ratios and which are exposed at the bottom of the geom... | 06/02/1998 |
| 5756397 | Method of fabricating a wiring in a semiconductor device A method of fabricating a wiring in a semiconductor device, including the steps of (1) forming an insulation film on a semiconductor substrate, (2) forming a groove lane having an inclined plane at an upper part thereof by etching the insulation film in a... | 05/26/1998 |
| 5753372 | Wiring structures and method of manufacturing the same The present invention provides the wiring structure having a wiring layer and insulation layer and the method of manufacturing the same, wherein at least a part of the wiring of said wiring layer comprises copper, and said insulation layer comprises the p... | 05/19/1998 |
| 5753305 | Rapid aging technique for aerogel thin films This invention pertains generally to aging methods suited to aerogel thin film fabrication, and particularly to techniques for improving gel strength and/or aerogel dielectric constant by a rapid aging technique, which avoid damage or premature drying of ... | 05/19/1998 |
| 5750403 | Method of forming multi-layer wiring utilizing hydrogen silsesquioxane resin On a first insulating film covering a substrate, wiring layer patterns are formed and thereafter, a second insulating film of plasma CVD--SiO2 or the like is formed thereon. A hydrogen silsesquioxane resin film having a flat surface is spin-coa... | 05/12/1998 |
| 5751066 | Structure with selective gap fill of submicron interconnects A semiconductor device and method having a low-permittivity material between closely-spaced leads in order to decrease unwanted capacitance, while having a more structurally strong dielectric between widely-spaced leads where capacitance is not as critica... | 05/12/1998 |
| 5750415 | Low dielectric constant layers via immiscible sol-gel processing A method for forming air gaps 22 between metal leads 16 of a semiconductor device. A metal layer is deposited on a substrate 12. The metal layer is etched to form metal leads 16, exposing portions of the substrate 12. A disposable liquid 18 is deposited o... | 05/12/1998 |
| 5747880 | Interconnect structure with an integrated low density dielectric This invention provides a semiconductor device and process for making the same with dramatically reduced capacitance between adjacent conductors and an interlayer dielectric construction which emphasizes mechanical strength, etch compatibility, and good h... | 05/05/1998 |
| 5747381 | Technique for the removal of residual spin-on-glass (SOG) after full SOG etchback This invention relates to a method for removing residual spin-on-glass (SOG) during a planarization processing step wherein the SOG is used as a sacrificial planarization medium and subjected to a full etchback to an underlying interlevel dielectric (ILD)... | 05/05/1998 |
| 5744399 | Process for forming low dielectric constant layers using fullerenes A process for lowering the dielectric constant of a layer on a semiconductor wafer is described. The presence of the fullerene in the composite layer changes its dielectric constant. The process forms, on the wafer, a composite layer comprising matrix-for... | 04/28/1998 |
| 5744378 | Method for fabricating a semiconductor device having multilevel interconnections At least one of an interlayer insulating film is formed by fluorine contained silicon oxynitride which is obtained by chemical deposition growth process using fluoroalkoxysilane gas, nitrogen gas contained gas, and oxygen gas contained gas. The at least o... | 04/28/1998 |
| 5744376 | Method of manufacturing copper interconnect with top barrier layer A structure and method for making copper interconnections in an integrated circuit are described. The structure is a damascene copper connector whose upper surface is coplanar with the upper surface of the insulating layer in which it is embedded. Out-dif... | 04/28/1998 |
| 5739579 | Method for forming interconnections for semiconductor fabrication and semiconductor device having such interconnections A method for forming interconnections for semiconductor fabrication and semiconductor devices have such interconnections are described. A first patterned dielectric layer is formed over a semiconductor substrate and has a first opening filed with conducti... | 04/14/1998 |
| 5739589 | Semiconductor integrated circuit device process for fabricating the same and apparatus for fabricating the same Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating fi... | 04/14/1998 |
| 5733817 | Blanket oxidation for contact isolation A method of forming isolated metal contacts during fabrication of semiconductor devices including blanket forming contact metal on a semiconductor device having a mesa structure with a first layer overlying an upper surface, a second layer overlying a low... | 03/31/1998 |
| 5728630 | Method of making a semiconductor device In a semiconductor device and a method of fabrication thereof, a resin film forms an interlayer film of the semiconductor device having a multilayer interconnection structure, and is formed by only one coating using coating liquid containing silicone ladd... | 03/17/1998 |
| 5728631 | Method for forming a low capacitance dielectric layer An improved structure and a process for forming an interlevel dielectric layer having a low capacitance between closely spaced metallurgy lines is provided. The method begins with a substrate surface having closely spaced metallurgy lines. A silicon oxide... | 03/17/1998 |
| 5728628 | Two-step metal etch process for selective gap fill of submicron inter-connects and structure for same A semiconductor device and method having a low-permittivity material between closely-spaced leads in order to decrease unwanted capacitance, while having a more structurally strong dielectric between widely-spaced leads where capacitance is not as critica... | 03/17/1998 |
| 5723909 | Semiconductor device and associated fabrication method A first metallization layer is locally formed on the surface of a semiconductor substrate thereby leaving portions of the semiconductor substrate's surface exposed. A first silicon oxide layer is then formed in such a manner that it covers the exposed por... | 03/03/1998 |
| 5723386 | Method of manufacturing a semiconductor device capable of rapidly forming minute wirings without etching of the minute wirings In a method of manufacturing a semiconductor device having a multilayer interconnection structure, when a silicon oxide film is formed onto an electric wiring on a semiconductor substrate by the use of plasma deposition, a first high frequency wave of a c... | 03/03/1998 |
| 5719084 | Method for the controlled formation of voids in doped glass dielectric films A method is provided for the controlled formation of voids in integrated circuit doped glass dielectric films. The film can be formed of borophosphosilica glass (BPSG) or other types of doped glass. The method involves the steps of providing a substrate o... | 02/17/1998 |
| 5717251 | Semiconductor integrated circuit device having minature multi-level wiring structure low in parasitic capacitance After a pattern transfer of a first pattern image to a lower photo-sensitive layer of first material, a second pattern image is transferred to an upper photo-sensitive layer of second material higher in photo-sensitivity than the first material, and the f... | 02/10/1998 |
| 5716890 | Structure and method for fabricating an interlayer insulating film The present invention provides a structure and method of manufacturing an interlevel/intermetal dielectric layer for a semiconductor device. The method begins by forming a stepped pattern 16 on a semiconductor structure 12. A barrier layer 20 composed of ... | 02/10/1998 |
| 5714418 | Diffusion barrier for electrical interconnects in an integrated circuit An electrical interconnect structure comprising a diffusion barrier and a method of forming the structure over a semiconductor substrate. A bi-layer diffusion barrier is formed over the substrate. The barrier comprises a capturing layer beneath a blocking... | 02/03/1998 |
| 5712194 | Semiconductor device including interlayer dielectric film layers and conductive film layers A first interlayer dielectric film layer is formed on a P-type semiconductor substrate. First connection holes are formed at specified positions of the first interlayer dielectric film layer. A first conductive film layer is formed in a region including a... | 01/27/1998 |
| 5712509 | Semiconductor integrated circuit interconnection structures A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting i... | 01/27/1998 |
| 5702980 | Method for forming intermetal dielectric with SOG etchback and CMP A defect free intermetal dielectric, IMD, and method of forming the defect free IMD are described. The IMD uses spacers formed by means of etchback of a layer of spin-on-glass, SOG. In order to use an oxide layer formed by means of plasma enhanced tetra-e... | 12/30/1997 |
| 5702568 | Method of forming a via hole of a semiconductor device with spin-on-glass film sealed by an oxide film The present invention discloses a method of forming a via hole of a semiconductor device, which includes the steps of: forming a plurality of first metal wires on a wafer; after coating a SOG film on the first oxide film, forming a groove in the SOG film ... | 12/30/1997 |
| 5702773 | Method for preparing a fluoro-containing polyimide film A method for blending fluorine into a polyimide free of fluorine comprises the steps of generating fluorine radicals in a fluorine based gas, removal of any charge particles from the gas to leave the fluorine radicals in the gas, and exposing a polyimide ... | 12/30/1997 |
| 5700349 | Method for forming multi-layer interconnections A method of forming a multi-layer interconnection in which through-holes are formed in an interlayer insulating layer positioned between two neighboring mid interconnection layers, which through-hole is used for establishing an electrical interconnection ... | 12/23/1997 |
| 5700720 | Method of manufacturing semiconductor device having multilayer interconnection According to the method of manufacturing a semiconductor device having a multilayer interconnection structure, lower wires are formed on a semiconductor substrate. Then, a first reflow SiO2 film having a reflow form is formed on the semiconduct... | 12/23/1997 |
| 5698901 | Semiconductor device with amorphous carbon layer for reducing wiring delay The invention provides a semiconductor device in which interlayer insulative layers are composed of amorphous carbon film. The amorphous carbon film may include fluorine (F) therein. The invention further provides a method of fabricating a semiconductor d... | 12/16/1997 |
| 5691565 | Integrated circuitry having a pair of adjacent conductive lines A method of forming integrated circuitry includes, a) providing a pair of spaced and adjacent electrically conductive elongated lines; and b) providing electrically insulative material over the pair of spaced lines in a manner which leaves an elongated vo... | 11/25/1997 |
| 5683940 | Method of depositing a reflow SiO2 film In a method of manufacturing a semiconductor device, a first plasma insulating film having a thickness of 0.1 μm or more is formed on the semiconductor substrate with lower-surface wirings thereon. The semiconductor substrate is moved into a pressure-red... | 11/04/1997 |
| 5681425 | Teos plasma protection technology An improved method of gap filling in the dielectric layer is described. Semiconductor device structures are formed in and on a semiconductor substrate and the top surface of the substrate is planarized. A conducting layer is deposited over the surface of ... | 10/28/1997 |
| 5679606 | method of forming inter-metal-dielectric structure A process for forming an planar dielectric layer over metallurgy lines using an in situ multi-step electron cyclotron resonance (ECR) oxide deposition process. A substrate with metallurgy lines on its surface is covered with a protective ECR oxide layer. ... | 10/21/1997 |
| 5677241 | Integrated circuitry having a pair of adjacent conductive lines and method of forming A method of forming integrated circuitry includes, a) providing a pair of spaced and adjacent electrically conductive elongated lines; and b) providing electrically insulative material over the pair of spaced lines in a manner which leaves an elongated vo... | 10/14/1997 |
| 5677239 | Method for fabricating multi-level interconnection structure for semiconductor device A method for fabricating a semiconductor device includes the steps of forming an interconnect metal film on an insulating layer and forming, on a surface of the interconnect metal film, a first insulating film formed of P--SiN. The first insulating film a... | 10/14/1997 |
