Class 257/E21.573 - Air gaps (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.54. This subclass
No. of patents: 217
Last issue date: 10/28/2008

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Number	Title	Issue Date
7444253	Air bridge structures and methods of making and using air bridge structures A probe card assembly, according to some embodiments of the invention, can comprise a tester interface configured to make electrical connections with a test controller, a plurality of electrically conductive probes disposed to contact terminals of an electronic devi...	10/28/2008
7396728	Methods of improving drive currents by employing strain inducing STI liners A method forms a semiconductor device comprising isolation structures that selectively induce strain into active regions of NMOS and PMOS devices. Form a hard mask layer over a semiconductor body. A resist layer is formed on the hard mask layer that exposes and defi...	07/08/2008
7335965	Packaging of electronic chips with air-bridge structures A circuit assembly for fabricating an air bridge structure and a method of fabricating an integrated circuit package capable of supporting a circuit assembly including an air bridge structure. A circuit assembly comprises an electronic chip and a conductive structur...	02/26/2008
7316957	Semiconductor device and method for manufacturing the same A semiconductor device and a method for manufacturing the same are provided. A gate insulating film is formed under a vacuum condition to prevent deterioration of reliability of the device due to degradation of a gate insulating material and to have stable operating...	01/08/2008
7312512	Interconnect structure with polygon cell structures Interconnect structures with polygonal cell structures. An exemplary interconnect structure comprises a substrate and a first dielectric layer, overlying the substrate and exposing a conductive feature formed therethrough and connected with the substrate, wherein th...	12/25/2007
7307011	Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber A method (and structure) that selectively forms a dielectric chamber on an electronic device by forming a dummy structure over a semiconductor substrate, depositing a dielectric layer over the dummy structure, forming an opening through the dielectric layer to the d...	12/11/2007
7235456	Method of making empty space in silicon To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate. ...	06/26/2007
7211496	Freestanding multiplayer IC wiring structure A dielectric wiring structure and method of manufacture therefor. The wiring structure includes air dielectric formed in a hemisphere. The wiring structure also includes, in embodiments, a method of simultaneously forming a MEMS structure with a transistor circuit u...	05/01/2007
7208839	Semiconductor component assemblies having interconnects Methods relating to forming interconnects through injection of conductive materials, to fabricating semiconductor component assemblies, and to resulting assemblies. A semiconductor component substrate, such as a semiconductor die or other substrate, has dielectric m...	04/24/2007
7190046	Bipolar transistor having reduced collector-base capacitance Structure and method are provided for forming a bipolar transistor. As disclosed, an intrinsic base layer is provided overlying a collector layer. A low-capacitance region is disposed laterally adjacent the collector layer. The low-capacitance region includes at lea...	03/13/2007
7166486	Optical modulator, optical modulator manufacturing method, light information processing apparatus including optical modulator, image formation apparatus including optical modulator, and image projection and display apparatus including optical modulator A center beam which is formed out of a thin film constituted to be combined with a light reflection film provided on one surface of the center beam, which has both ends fixed and which is deformed by an electronic force; a substrate electrode which is opposed to the...	01/23/2007
7163869	Shallow trench isolation structure with converted liner layer A STI (shallow trench isolation) structure is formed with a liner layer that is converted from an initial material to a subsequent material. For example, the liner layer is initially comprised of nitride during wet etch-back of a dielectric fill material comprised o...	01/16/2007
7145215	Semiconductor device with a cavity therein and a method of manufacturing the same A semiconductor device includes a semiconductor substrate, cavities, and an element isolating region. The cavities, which are each shaped like a flat plate, are made in the semiconductor substrate. The element isolating region is formed in the surface of the semicon...	12/05/2006
7138720	Semiconductor component assemblies having interconnects Methods relating to forming interconnects through injection of conductive materials, to fabricating semiconductor component assemblies, and to resulting assemblies. A semiconductor component substrate, such as a semiconductor die or other substrate, has dielectric m...	11/21/2006
6909154	Sacrificial annealing layer for a semiconductor device and a method of fabrication Numerous embodiments of a method and apparatus for a sacrificial annealing layer are disclosed. In one embodiment, a method of forming a sacrificial annealing layer for a semiconductor device comprises forming one or more sacrificial layers on at least a portion of ...	06/21/2005
6682981	Stress controlled dielectric integrated circuit fabrication General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a sem...	01/27/2004
6670257	Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting...	12/30/2003
6664193	Device isolation process flow for ARS system A device isolation process flow for an atomic resolution storage (ARS) system inserts device isolation into a process flow of the ARS system so that diodes may be electrically insulated from one another to improve signal to noise ratio. In addition, since...	12/16/2003
6661068	Semiconductor device and method of providing regions of low substrate capacitance A semiconductor structure (1), comprising a isolation region (5) formed on a semiconductor material (10). A pillar (15) is formed in the semiconductor material under the isolation region, where the pillar is capped with a first dielectric material (20) to...	12/09/2003
6653656	Semiconductor device formed on insulating layer and method of manufacturing the same In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an uppe...	11/25/2003
6639327	Semiconductor member, semiconductor device and manufacturing methods thereof In a bonded semiconductor member, microgaps are formed on a substrate side of a bonding interface to thereby constitute a gettering site, and heavy metal elements contaminated in the substrate are captured by the microgaps. The bonded semiconductor member...	10/28/2003
6621096	Device isolation process flow for ARS system A device isolation process flow for an atomic resolution storage (ARS) system inserts device isolation into a process flow of the ARS system so that diodes may be electrically insulated from one another to improve signal to noise ratio. In addition, since...	09/16/2003
6621136	Semiconductor device having regions of low substrate capacitance A semiconductor device (10) includes an electrical component (70) formed on a dielectric region (22) of a semiconductor substrate (12). The dielectric region is formed with a first plurality of voids (58) extending into the substrate to a first depth (D	09/16/2003
6613652	Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performance A method to form SOI devices using wafer bonding. A first substrate is provided having trenches in a first side. A first insulating layer is formed over the first side of the first substrate and filling the trenches. We planarize the first insulating laye...	09/02/2003
6613644	Method for forming a dielectric zone in a semiconductor substrate A method for forming a dielectric zone in a region of a semiconductor substrate is described. A first trench and a second trench are formed in the region of the semiconductor substrate resulting in a web being formed between the first trench and the secon...	09/02/2003
6579738	Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials A method of aligning a plurality of empty-spaced buried patterns formed in semiconductor monocrystalline substrates is disclosed. In an exemplary embodiment, high-temperature metal marks are formed to include a conductive material having a melting tempera...	06/17/2003
6569702	Triple layer isolation for silicon microstructure and structures formed using the same An isolation method for a single crystalline silicon microstructure using a triple layer structure is disclosed. The method includes forming the triple layer composed of an insulation layer formed over an exposed surface of the silicon microstructure, a c...	05/27/2003
6566206	Semiconductor structure having more usable substrate area and method for forming same A semiconductor structure includes a first substrate portion having a surface and a first active region disposed in the first substrate portion. An insulator region is disposed on the first substrate portion outside of the first active region and extends ...	05/20/2003
6563190	Capacitor array preventing crosstalk between adjacent capacitors in semiconductor device A capacitor array of a semiconductor device including a plurality of capacitors is provided. The capacitor array includes a plurality of lower electrodes, which are formed over a semiconductor substrate. A dielectric layer formed over the lower electrodes...	05/13/2003
6548883	Reduced RC between adjacent substrate wiring lines A void is defined between adjacent wiring lines to minimize RC coupling. The void has a low dielectric value approaching 1.0. For one approach, hollow silicon spheres define the void. The spheres are fabricated to a known inner diameter, wall thickness an...	04/15/2003
6531376	Method of making a semiconductor device with a low permittivity region A method of making a semiconductor device (10) having a low permittivity region (24) includes forming a first layer (30/42) over a surface of a trench (20), and etching through an opening (70) in the first layer that is smaller than a width (W2) of the tr...	03/11/2003
6518641	Deep slit isolation with controlled void An isolation region for a memory array in which the isolation region includes at least one trench region having sidewalls that extend to a bottom surface and a slit region formed beneath the final trench region, wherein the slit region is narrower than th...	02/11/2003
6518134	Method for fabricating a semiconductor device with an air tunnel formed in the lower part of a transistor channel A method for fabricating a semiconductor device, which improves the threshold voltage by forming an air tunnel in the lower part of the transistor channel of a semiconductor device, and also improves the short channel effect by making better the sub-thres...	02/11/2003
6509210	Semiconductor device and method for fabricating the same A semiconductor device and method of fabricating the same. The semiconductor device includes a first insulating film formed on a substrate and having a plurality of holes therein; a cavity formed under the first insulating film; an impurity region formed ...	01/21/2003
6509583	Semiconductor device formed on insulating layer and method of manufacturing the same In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an uppe...	01/21/2003
6509623	Microelectronic air-gap structures and methods of forming the same An improved microelectronic structure is disclosed. The improved structure includes an air-gap region formed by removing an insulating material through an aperture residing in a mask....	01/21/2003
6498382	Semiconductor configuration The invention relates to a semiconductor configuration in which electrodes are insulated by a gas-filled or evacuated cavity. The semiconductor configuration includes at least two rigid electrodes; body regions; an active zone; a drift path; and an insula...	12/24/2002
6498069	Semiconductor device and method of integrating trench structures A method of making a semiconductor device (10) includes filling a plurality of trenches (30, 32-34) in a substrate (11) with a first fill material (40, 42-44) and lined with a first liner material (36-39) to form an isolation structure (50) in a first tre...	12/24/2002
6495900	Insulator for electrical structure Structures and methods are disclosed for insulating a polysilicon gate adjacent to an electrically active region with a silicon base layer. A layer of silicon nitride having a thickness in a range from about 100 Å to about 150 Å is conformally deposited...	12/17/2002
6492245	Method of forming air gap isolation between a bit line contact structure and a capacitor under bit line structure A process for forming air gap isolation regions between a bit line contact structure and adjacent capacitor structures, to reduce the capacitance of the space between these structures, has been developed. The process features the formation of insulator sp...	12/10/2002

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Class 257/E21.573 - Air gaps (EPO)