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| Number | Title | Issue Date |
| 7439140 | Formation of standard voltage threshold and low voltage threshold MOSFET devices Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked, and a first voltage threshold implant adjustment is performed within... | 10/21/2008 |
| 7365413 | Reduced power distribution mesh resistance using a modified swiss-cheese slotting pattern Electrical interconnects with a slotting pattern are provided in the present invention. In addition, the masks for making such interconnects and semiconductor devices incorporating such interconnects are also provided in the present invention. The slotting pattern m... | 04/29/2008 |
| 7314792 | Method for fabricating transistor of semiconductor device A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to fo... | 01/01/2008 |
| 7247555 | Method to control dual damascene trench etch profile and trench depth uniformity A method of forming trench openings in a dual damascene trench and via etch process by using a two component hard mask layer, termed a bi-layer, over different intermetal dielectrics, IMD, to solve dual damascene patterning problems, such as, fencing and sub-trench ... | 07/24/2007 |
| 6613651 | Integrated circuit isolation system A method of forming a narrow isolation structure in a semiconducting substrate. The isolation structure is a trench that has a bottom and sidewalls, and that is to be filled with an isolating material. The isolating material has desired electrical propert... | 09/02/2003 |
| 6579777 | Method of forming local oxidation with sloped silicon recess A method of forming a localized oxidation having reduced bird's beak encroachment in a semiconductor device by providing an opening in the silicon substrate that has sloped sidewalls with a taper between about 10° and about 75° as measured from the vert... | 06/17/2003 |
| 6475875 | Shallow trench isolation elevation uniformity via insertion of a polysilicon etch layer A process for forming insulator filled, shallow trench isolation (STI), regions in a semiconductor substrate, featuring a disposable polysilicon stop layer used to allow uniform insulator fill to be obtained, independent of shallow trench width, has been ... | 11/05/2002 |
| 6461070 | Document folder and method A document folder has a cover formed of relatively flexible sheet material with a back and front panels, and a spine hingedly connecting the panels so that they may be disposed in an overlying position and provide an enclosure for documents therebetween. ... | 10/08/2002 |
| 6448157 | Fabrication process for a semiconductor device A surface of a substrate is oxidized at a temperature equal to or higher than 1050° C., or at a oxidation speed equal to or higher than 7.5 nm/min to form an oxide film with a thickness equal to or more than 1500 nm. when the oxide film is removed, a den... | 09/10/2002 |
| 6444539 | Method for producing a shallow trench isolation filled with thermal oxide A semiconductor apparatus and method for producing shallow trench isolation. The method includes the steps providing a semiconductor substrate member fabricated having a thin barrier oxide layer on which are fabricated a plurality of spaced apart silicon ... | 09/03/2002 |
| 6429091 | Patterned buried insulator A patterned buried insulator is formed beneath the source and drain by forming a mask over the body area and implanting a dose of n or p type ions in the areas where the source and drains will be formed, then etching the STI and etching out the implanted ... | 08/06/2002 |
| 6399462 | Method and structure for isolating integrated circuit components and/or semiconductor active devices A method of forming a field oxide or isolation region in a semiconductor die. A nitride layer (over an oxide layer disposed over a substrate) is patterned and subsequently etched so that the nitride layer has a nearly vertical sidewall. The oxide layer an... | 06/04/2002 |
| 6316300 | Method of manufacturing a semiconductor device having an oxidation process for selectively forming an oxide film A method of manufacturing of a semiconductor device having a thermal oxidation process for selectively forming an oxide film by a thermal oxidation, which can reduce the generation of lattice defects in the semiconductor device during the thermal oxidatio... | 11/13/2001 |
| 6291311 | Semiconductor device and method for producing same On the surface of a field oxide film (3 of FIG. 2e) formed-on a substrate region where the effective thickness in the vertical direction of a substrate is diminished due to the presence of a crystal defect (2 of FIG. 1a), the field oxide film is etched by... | 09/18/2001 |
| 6261966 | Method for improving trench isolation A method for improving trench isolation is disclosed. A trench is etched into the substrate by using a photo mask. A bottom oxide layer, a sidewall oxide layer and a polycrystalline silicon layer are deposited into the trench and over the wafer, and are e... | 07/17/2001 |
| 6255191 | Method of fabricating an isolation structure in an integrated circuit A semiconductor fabrication method is provided for the fabrication of an isolation structure including a shallow-trench isolation (STI) structure in an integrated circuit. This method is characterized by the increase in the thickness of the adhesive layer... | 07/03/2001 |
| 6249035 | LOCOS mask for suppression of narrow space field oxide thinning and oxide punch through effect A novel design of an oxidation mask for improved control of birds beak and more specifically for tailoring and smoothing the field oxide isolation profile in the vicinity of the birds beak. The mask design is particularly advantageous for narrow field iso... | 06/19/2001 |
| 6232646 | Shallow trench isolation filled with thermal oxide A semiconductor apparatus and method for producing shallow trench isolation. The method includes the steps providing a semiconductor substrate member fabricated having a thin barrier oxide layer on which are fabricated a plurality of spaced apart silicon ... | 05/15/2001 |
| 6214700 | Semiconductor device and method for producing same On the surface of a field oxide film (3 of FIG. 2e) formed on a substrate region where the effective thickness in the vertical direction of a substrate is diminished due to the presence of a crystal defect (2 of FIG. 1a), the field oxide film is etched by... | 04/10/2001 |
| 6133115 | Formation of gate electrode The invention relates to an improvement in formation of a gate electrode. In the invention, there are formed first and second oxides on a surface of a substrate. The second oxides have a top surface higher by a height H than top surfaces of the first oxid... | 10/17/2000 |
| 6071793 | Locos mask for suppression of narrow space field oxide thinning and oxide punch through effect A novel design of an oxidation mask for improved control of birds beak and more specifically for tailoring and smoothing the field oxide isolation profile in the vicinity of the birds beak. The mask design is particularly advantageous for narrow field iso... | 06/06/2000 |
| 6046483 | Planar isolation structure in an integrated circuit A method is provided for forming an isolation structure at a semiconducting surface of a body, and the isolation structure formed thereby. A masking layer is formed over selected regions of the substrate surface; the masking layer preferably comprising a ... | 04/04/2000 |
| 6033971 | Semiconductor device having an element isolating oxide film and method of manufacturing the same There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that tG represents a thickness of a gate electrode layer 6, a height t... | 03/07/2000 |
| 6033991 | Isolation scheme based on recessed locos using a sloped Si etch and dry field oxidation A method of forming a field oxide or an isolation region in a semiconductor die. An oxidation mask layer (over an oxide layer disposed over the substrate) is patterned and subsequently etched, preferably so that the oxidation mask layer may have a nearly ... | 03/07/2000 |
| 6027985 | Method for forming element isolating film of semiconductor device A method for forming an element isolating film of a semiconductor device, which is capable of achieving a reduction in topology and a reduction in the occurrence of a bird's beak phenomenon, so that subsequent processes can be easily carried out to fabric... | 02/22/2000 |
| 6008106 | Micro-trench oxidation by using rough oxide mask for field isolation A method of forming isolation region of an integrated circuit by using rough oxide mask is described. First, a layer of first dielectric is formed on the surface of a silicon substrate. The first dielectric layer is then patterned to define active device ... | 12/28/1999 |
| 5998280 | Modified recessed locos isolation process for deep sub-micron device processes A trench is etched in a silicon substrate covered with an oxide/nitride stack and a field oxide layer is then grown through oxidation of the silicon in the substrate such that the trench is partly filled. There is reduced oxide encroachment into the activ... | 12/07/1999 |
| 5956599 | Method for forming isolation layer in semiconductor device The method for forming a semiconductor device isolation layer, which advantageously simplifies the manufacture and planarization of the device, includes the steps of forming a V-shaped groove of a predetermined width and depth in a device isolation region... | 09/21/1999 |
| 5940719 | Method for forming element isolating film of semiconductor device A method for forming an element isolating film of a semiconductor device, which is capable of achieving a reduction in topology and a reduction in the occurrence of a bird's beak phenomenon, so that subsequent processes can be easily carried out to fabric... | 08/17/1999 |
| 5866467 | Method of improving oxide isolation in a semiconductor device A silicon substrate has patterned thereon a pad oxide layer and a nitride layer. The exposed surface of the silicon substrate is cleaned of residual oxide, and a layer of oxidizable material such as polysilicon is deposit over the resulting structure. The... | 02/02/1999 |
| 5834360 | Method of forming an improved planar isolation structure in an integrated circuit A method is provided for forming an isolation structure at a semiconducting surface of a body, and the isolation structure formed thereby. A masking layer is formed over selected regions of the substrate surface; the masking layer preferably comprising a ... | 11/10/1998 |
| 5831323 | Semiconductor device having an element isolating oxide film and method of manufacturing the same There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that tG represents a thickness of a gate electrode layer 6, a height t... | 11/03/1998 |
| 5471091 | Techniques for via formation and filling Via filling is enhanced by the techniques of 1) providing pillars immediately underneath semiconductor features, such as metal layer contacts (inter-connection points), and 2) polishing off excess via-filling material so that the via-filling plug is flush... | 11/28/1995 |
| 5466624 | Isolation between diffusion lines in a memory array A method of forming a memory device with improved isolation between diffusion lines. Parallel, spaced apart thick oxide strips are grown on a substrate. Next, spaced apart, parallel strips having a polysilicon and nitride layer, oriented perpendicular to ... | 11/14/1995 |
| 5441094 | Trench planarization techniques Various techniques for quantifying polishing performance are disclosed, and provide insight on the progression from a planarization regime to a smoothing regime to a blanket polish back regime, as well as providing a single, definable parameter (Quality C... | 08/15/1995 |
| 5413966 | Shallow trench etch A trench mask is formed of two dissimilar layers of material deposited over a substrate. The lower of the two layers is an insulating layer such as silicon dioxide or silicon nitride, or combinations of both, and the upper of the two layers is doped or un... | 05/09/1995 |
| 5393693 | "Bird-beak-less" field isolation method A method of forming field oxide isolation regions for submicron technology using oxygen implantation is described. A first insulating layer is formed over a silicon substrate. A second insulating layer is formed over the first insulating layer. A first op... | 02/28/1995 |
| 5371036 | Locos technology with narrow silicon trench A new method of local oxidation by means of stress-releasing narrow trenches is described. Pad silicon oxide, silicon nitride, and silicon dioxide layers are formed on a silicon substrate. Portions of these layers not covered by a mask are etched away to ... | 12/06/1994 |
| 5360753 | Manufacturing method for a semiconductor isolation region In an element isolation method of a semiconductor device which can form an element isolation region having a flat surface without regard to the width of the element isolation region, and whose width is below the resolution limit, an insulating film having... | 11/01/1994 |
| 5312770 | Techniques for forming isolation structures Various techniques of forming isolation structures between adjacent diffusion regions are disclosed. In one technique, a thermally-grown oxide isolation structure is gouged out, and subsequent poly extending into the gouged out isolation structure is subs... | 05/17/1994 |
