Did You Know...
...that the Slinky toy was the result of a failed attempt by engineer Richard James to produce an antivibration device for ship instruments? His goal was to develop a spring that would instantaneously counterbalance the wave motion that rocks a ship at sea. Instead, he developed the Slinky.
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| Number | Title | Issue Date |
| 7436030 | Strained MOSFETs on separated silicon layers A method of fabricating and a structure of an IC incorporating strained MOSFETs on separated silicon layers are disclosed. N-channel field effect transistors (nFET) and P-channel FETs (pFET) are formed on the separated silicon layers, respectively. Shallow trench in... | 10/14/2008 |
| 7371693 | Manufacturing method of semiconductor device with chamfering Cost is reduced and reliability is improved with a CSP type semiconductor device. A glass substrate which works as a supporting plate is bonded through an adhesive to a first surface of a semiconductor wafer on which first wirings are formed. Thickness of the semico... | 05/13/2008 |
| 7365413 | Reduced power distribution mesh resistance using a modified swiss-cheese slotting pattern Electrical interconnects with a slotting pattern are provided in the present invention. In addition, the masks for making such interconnects and semiconductor devices incorporating such interconnects are also provided in the present invention. The slotting pattern m... | 04/29/2008 |
| 7361572 | STI liner modification method A new and improved liner modification method for a liner oxide layer in an STI trench is disclosed. According to the method, an STI trench is etched in a substrate and a liner oxide layer is formed on the trench surfaces by oxidation techniques. The method further i... | 04/22/2008 |
| 7314792 | Method for fabricating transistor of semiconductor device A method for fabricating a transistor of a semiconductor device is provided. The method includes: forming device isolation layers in a substrate including a bottom structure, thereby defining an active region; etching the active region to a predetermined depth to fo... | 01/01/2008 |
| 7279396 | Methods of forming trench isolation regions with nitride liner The invention includes methods of forming trench isolation regions. In one implementation, a masking material is formed over a semiconductor substrate. The masking material comprises at least one of tungsten, titanium nitride and amorphous carbon. An opening is form... | 10/09/2007 |
| 7220640 | Method of fabricating recess transistor in integrated circuit device and recess transistor in integrated circuit device fabricated by the same Provided is a method of fabricating a recess transistor in an integrated circuit device. In the provided method, a device isolation region, which contacts to the sidewall of a gate trench and a substrate region remaining between the sidewall of the device isolation ... | 05/22/2007 |
| 7199450 | Materials and method to seal vias in silicon substrates Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to admi... | 04/03/2007 |
| 7157781 | Enhancement of membrane characteristics in semiconductor device with membrane A semiconductor device having a membrane includes a semiconductor substrate, which has an active surface, and a membrane. A cavity is located between the active surface and the membrane and hermetically sealed. The membrane includes a first film, which has a through... | 01/02/2007 |
| 6800917 | Bladed silicon-on-insulator semiconductor devices and method of making A semiconductor device includes an elongated, blade-shaped semiconductor element isolated from a surrounding region of a semiconductor substrate by buried and side oxide layers. A polysilicon post disposed at one end of the element has a bottom portion extending thr... | 10/05/2004 |
| 6620704 | Method of fabricating low stress semiconductor devices with thermal oxide isolation A method is provided of fabricating a semiconductor device that includes forming a silicon oxide film on a semiconductor substrate. A silicon nitrite film may be formed on the silicon oxide film. A portion of the silicon nitrite film and the silicon oxide... | 09/16/2003 |
| 6610580 | Flash memory array and a method and system of fabrication thereof In a first aspect of the present invention, a flash memory array is disclosed. The flash memory array comprises a substrate comprising active regions, wherein the active regions are defined by a layer of nitride, the layer of nitride including a top surfa... | 08/26/2003 |
| 6610581 | Method of forming isolation film in semiconductor device There is disclosed a method of forming an isolation film in a semiconductor device, the method including the steps of: forming a silicon oxide film and a silicon nitride film in that order on a silicon substrate, using a resist pattern as a mask, etching ... | 08/26/2003 |
| 6599798 | Method of preparing buried LOCOS collar in trench DRAMS The vertical DRAM capacitor with a buried LOCOS collar characterized by: a self-aligned bottle and gas phase doping; no consumption of silicon at the depth of the buried strap; no reduction of trench diameter; and a nitride layer to protect trench sidewal... | 07/29/2003 |
| 6580088 | Semiconductor devices and methods for manufacturing the same Certain embodiments relate to semiconductor devices having an improved dielectric strength and methods for manufacturing the same. A semiconductor device 1000 may have a field effect transistor 100. The field effect transistor 100 includes a gate dielectr... | 06/17/2003 |
| 6559032 | Method of fabricating an isolation structure on a semiconductor substrate A method of forming an isolated structure of sufficient size to permit the fabrication of an active device thereon is comprised of the steps of depositing a gate oxide layer on a substrate. Material, such as a polysilicon layer and a nitride layer, is dep... | 05/06/2003 |
| 6489205 | Semiconductor device and method for manufacturing the same There is described a method for manufacturing a semiconductor device, in which an isolation oxide film having a superior dimensional accuracy and an isolation oxide film of a high withstanding voltage are manufactured in simple processes. A semiconductor ... | 12/03/2002 |
| 6479370 | Isolated structure and method of fabricating such a structure on a substrate A method of forming an isolated structure of sufficient size to permit the fabrication of an active device thereon is comprised of the steps of depositing a gate oxide layer on a substrate. Material, such as a polysilicon layer and a nitride layer, is dep... | 11/12/2002 |
| 6465865 | Isolated structure and method of fabricating such a structure on a substrate A method of forming an isolated structure of sufficient size to permit the fabrication of an active device thereon is comprised of the steps of depositing a gate oxide layer on a substrate. Material, such as a polysilicon layer and a nitride layer, is dep... | 10/15/2002 |
| 6376331 | Method for manufacturing a semiconductor device A semiconductor device is herein disclosed which comprises a plurality of element regions formed on a first conductive type semiconductor substrate, element isolation regions for isolating the element regions from each other, and gate electrodes on parts ... | 04/23/2002 |
| 6340624 | Method of forming a circuitry isolation region within a semiconductive wafer A method of forming a circuitry isolation region within a semiconductive wafer comprises defining active area and isolation area over a semiconductive wafer. Semiconductive wafer material within the isolation area is wet etched using an etch chemistry whi... | 01/22/2002 |
| 6326672 | LOCOS fabrication processes and semiconductive material structures In one aspect, the invention encompasses a LOCOS process. A pad oxide layer is provided over a silicon-comprising substrate. A silicon nitride layer is provided over the pad oxide layer and patterned with the pad oxide layer to form masking blocks. The pa... | 12/04/2001 |
| 6306726 | Method of forming field oxide In one aspect, the invention encompasses a LOCOS process. A pad oxide layer is provided over a silicon-comprising substrate. A silicon nitride layer is provided over the pad oxide layer and patterned with the pad oxide layer to form masking blocks. The pa... | 10/23/2001 |
| 6274455 | Method for isolating semiconductor device A method for isolating a semiconductor device is disclosed. The method includes the steps of forming a buffer film on a semiconductor substrate and an oxide prevention film on the buffer film, etching the buffer,film and the oxide prevention film of a dev... | 08/14/2001 |
| 6258694 | Fabrication method of a device isolation structure A fabrication method of a device isolation structure. A patterned mask layer is formed on a silicon substrate. A dopant is doped into an exposed substrate to prevent a bird's beak silicon region from being oxidized in a first doping step. A spacer is form... | 07/10/2001 |
| 6255218 | Semiconductor device and fabrication method thereof A semiconductor device that enables to avoid short-circuit between an interconnection film and an underlying conductive region even when a contact hole is partially overlapped with an isolation insulator. A conductive region is selectively formed in an ac... | 07/03/2001 |
| 6251750 | Method for manufacturing shallow trench isolation A method of manufacturing a shallow trench isolation in a substrate. The substrate has a pad oxide layer and a mask layer formed thereon in sequence and a trench penetrating through the mask layer and the pad oxide layer and into the substrate. A thermal ... | 06/26/2001 |
| 6245643 | Method of removing polysilicon residual in a LOCOS isolation process using an etching selectivity solution A method of forming a field oxide isolation region includes: forming a first pad oxide layer over a semiconductor substrate; forming a silicon nitride layer over the first pad oxide layer; patterning and etching the silicon nitride layer and the first pad... | 06/12/2001 |
| 6239003 | Method of simultaneous fabrication of isolation and gate regions in a semiconductor device A method of forming a semiconductor device includes forming a moat stack outwardly from a substrate, the moat stack comprising a dielectric pad disposed outwardly from the substrate, a silicon buffer structure disposed outwardly from the dielectric pad, a... | 05/29/2001 |
| 6239002 | Thermal oxidizing method for forming with attenuated surface sensitivity ozone-teos silicon oxide dielectric layer upon a thermally oxidized silicon substrate layer A method for forming a trench isolation region within a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then formed over the silicon substrate and filling the trench a silicon oxide t... | 05/29/2001 |
| 6225186 | Method for fabricating LOCOS isolation A method for fabricating a LOCOS isolation in accordance with the present invention, involves first forming a masking layer on the active region of a silicon substrate. Next, the masking layer is used as the etching mask and the silicon substrate is etche... | 05/01/2001 |
| 6225674 | Semiconductor structure and method of manufacture A semiconductor structure (10) having device isolation structures (43, 44) and shielding structures (39, 40). The shielding structures (39, 40) are formed in a semiconductor material (11) and the device isolation structures (43, 44) are formed within the ... | 05/01/2001 |
| 6184106 | Method for manufacturing a semiconductor device The present invention provides a method of forming an isolation region comprising a trench isolation region involved in a semiconductor device. A silicon oxide film is grown on a surface of a trench groove formed within a semiconductor substrate, followed... | 02/06/2001 |
| 6175147 | Device isolation for semiconductor devices Exemplary embodiments of the present invention disclose a semiconductor assembly having at least one isolation structure formed. The semiconductor assembly comprises: a first trench in a semiconductive substrate; a second trench extending the overall tren... | 01/16/2001 |
| 6153482 | Method for fabricating LOCOS isolation having a planar surface which includes having the polish stop layer at a lower level than the LOCOS formation A method for fabricating LOCOS isolation having a planar surface. The method utilizes a polysilicon spacer to prevent bird beak. The method adds the steps of forming a polishing stop layer and removing said edge-protrusion portion of the local oxide by ch... | 11/28/2000 |
| 6144047 | Semiconductor device having impurity concentrations for preventing a parasitic channel A semiconductor device is herein disclosed which comprises a plurality of element regions 50 formed on a first conductive type semiconductor substrate 60, element isolation regions 58 for isolating the element regions from each other, and gate electrodes ... | 11/07/2000 |
| 6133118 | Edge polysilicon buffer LOCOS isolation The present invention discloses an isolation method for fabricating isolation regions with less bird's peak sizes in semiconductor devices. A first pad oxide layer and a silicon nitride layer are first formed on a wafer substrate. After an undercut proces... | 10/17/2000 |
| 6118167 | Polysilicon coated nitride-lined shallow trench A polycrystalline silicon coated nitride-lined shallow trench technique for isolating active regions on an integrated circuit involves reducing the oxide encroachment and the "bird's beak" structure. The technique involves forming an isolation trench, or ... | 09/12/2000 |
| 6103595 | Assisted local oxidation of silicon A method for forming a semiconductor device comprises the steps of providing a semiconductor substrate having first and second surfaces, the second surface having an inferior plane with respect to the first surface. An oxidizing-resistant layer such as ni... | 08/15/2000 |
| 6100162 | Method of forming a circuitry isolation region within a semiconductive wafer A method of forming a circuitry isolation region within a semiconductive wafer comprises defining active area and isolation area over a semiconductive wafer. Semiconductive wafer material within the isolation area is wet etched using an etch chemistry whi... | 08/08/2000 |
