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| Number | Title | Issue Date |
| 7413914 | Method and apparatus for manufacturing semiconductor device, method and apparatus for controlling the same, and method and apparatus for simulating manufacturing process of semiconductor device A process of manufacturing a semiconductor device utilizing a thermo-chemical reaction is started based on preset initial settings, a state function of an atmosphere associated with the thermo-chemical reaction is measured, a state of the atmosphere and a change the... | 08/19/2008 |
| 7402474 | Manufacturing method of semiconductor device A method of manufacturing a semiconductor device comprises the following steps: a step of depositing a silicon oxide film on the top surface of an epitaxial layer of the region where a high withstand voltage MOS transistor is formed; a step of subsequently depositin... | 07/22/2008 |
| 7211523 | Method for forming field oxide A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer, performing a dry oxidation process to form a first field oxide on the substra... | 05/01/2007 |
| 7192840 | Semiconductor device fabrication method using oxygen ion implantation A method of fabricating a semiconductor device having a silicon layer disposed on an insulating film. Oxygen ions are implanted into selected parts of the silicon layer, which are then oxidized to form isolation regions dividing the silicon layer into a plurality of... | 03/20/2007 |
| 6693341 | Semiconductor device When an element isolation film is formed by the LOCOS technique, as an underlying buffer layer of an oxidation resisting film, a pad oxidation film and pad poly-Si film are used. When an element is formed, they are used as a gate oxide film and a part of ... | 02/17/2004 |
| 6670690 | Method of making an improved field oxide isolation structure for semiconductor integrated circuits having higher field oxide threshold voltages A method and structure for forming a modified field oxide region having increased field oxide threshold voltages (Vth) and/or reduced leakage currents between adjacent device areas is achieved. The method involves forming a field oxide using th... | 12/30/2003 |
| 6649487 | Method of manufacturing semiconductor integrated circuit device A method of manufacturing a semiconductor integrated circuit device according to this invention, comprises a step of forming in a semiconductor substrate a deep groove for trench isolation with an aspect ratio of greater than 1, a step of burying a first ... | 11/18/2003 |
| 6645827 | Method for forming isolation regions on semiconductor device A method for forming isolation regions on a semiconductor substrate, includes partially covering the surface of the semiconductor substrate with oxidation inhabiting films, and heat-treating the portions of the semiconductor substrate which are exposed fr... | 11/11/2003 |
| 6611038 | Semiconductor wafer isolation structure formed by field oxidation A method of forming isolation structures in semiconductor substrates comprising exposing a region of the semiconductor simultaneously to a transforming agent and to a viscosity reducing agent so that the transforming agent transforms a portion of the subs... | 08/26/2003 |
| 6610578 | Methods of manufacturing bipolar transistors for use at radio frequencies A bipolar transistor of type NPN has an active region at the surface of the component, which is surrounded, as seen along the surface of the component, in the conventional way by thick field oxide areas. The active region is partly covered by an electrica... | 08/26/2003 |
| 6610581 | Method of forming isolation film in semiconductor device There is disclosed a method of forming an isolation film in a semiconductor device, the method including the steps of: forming a silicon oxide film and a silicon nitride film in that order on a silicon substrate, using a resist pattern as a mask, etching ... | 08/26/2003 |
| 6605511 | Method of forming nitridated tunnel oxide barriers for flash memory technology circuitry and STI and LOCOS isolation A method of fabricating an improved flash memory device, having shallow trench isolation in the periphery region and LOCOS isolation in the core region is provided, by first creating the shallow trench isolation using a hard mask; then creating the LOCOS ... | 08/12/2003 |
| 6605502 | Isolation using an antireflective coating A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed ... | 08/12/2003 |
| 6599793 | Memory array with salicide isolation The present invention provides a memory array fabricated by complementary metal-oxide-semiconductor salicide process. The memory array comprises a semiconductor substrate. Multitudes of first isolation devices are aligned in the semiconductor substrate an... | 07/29/2003 |
| 6583453 | Semiconductor device having a voltage-regulator device A semiconductor device providing an improved effect of suppressing variation with time of reverse breakdown voltage applied to PN junction, particularly, a voltage-regulator device, is provided. The semiconductor device includes an impurity diffusion laye... | 06/24/2003 |
| 6566207 | Semiconductor device fabricating method A method of fabricating a semiconductor device in which a LOCOS profile characteristic is applied to a normal shallow trench isolation (STI) structure thereby lowering compressive stress that is concentrated on the side of the STI and preventing a thinnin... | 05/20/2003 |
| 6559032 | Method of fabricating an isolation structure on a semiconductor substrate A method of forming an isolated structure of sufficient size to permit the fabrication of an active device thereon is comprised of the steps of depositing a gate oxide layer on a substrate. Material, such as a polysilicon layer and a nitride layer, is dep... | 05/06/2003 |
| 6531356 | Semiconductor devices and methods of manufacturing the same Embodiments include a semiconductor device including a well structure such that well areas can be formed with a higher density of integration and a plurality of high-voltage endurable transistors can be driven independently of one another with different v... | 03/11/2003 |
| 6525393 | Semiconductor substrate having an isolation region A method for producing an isolation region on a surface of a semiconductor substrate includes: forming and patterning a masking layer; forming an isolating layer so that a notch exists between an edge of the masking layer and the upper surface of the isol... | 02/25/2003 |
| 6511893 | Radiation hardened semiconductor device A method for manufacturing a radiation hardened semiconductor device, having defined active region and isolation region. The isolation region containing an isolation material and active region containing a transition region between active and isolation re... | 01/28/2003 |
| 6509604 | Nitridation barriers for nitridated tunnel oxide for circuitry for flash technology and for LOCOS/STI isolation A semiconductor chip having a plurality of flash memory devices, shallow trench isolation in the periphery region, and LOCOS isolation in the core region. A hard mask is used first to create the shallow trench isolation. The LOCOS isolation is then create... | 01/21/2003 |
| 6506641 | Use of selective oxidation to improve LDMOS power transistors The invention includes a laterally diffused metal oxide semiconductor transistor comprising a gate electrode and comprising tapered oxide self aligned to the gate electrode and a method of making the transistor.... | 01/14/2003 |
| 6504232 | Integrated circuit components thereof and manufacturing method The present invention relates to a collector pin and a trench in an integrated circuit intended for high speed communication, and to a manufacturing method for these items. The collector pin is achieved by creating an area which is implantation damaged or... | 01/07/2003 |
| 6503841 | Oxide etch The invention includes a method of etching silicon dioxide, comprising doping a layer of silicon dioxide to form a layer of doped silicon dioxide and etching the doped silicon dioxide layer with phosphoric acid.... | 01/07/2003 |
| 6497827 | Method for etching dielectric films A method for removing a plurality of dielectric films from a supporting substrate by providing a substrate with a second dielectric layer overlying a first dielectric layer, contacting the substrate at a first temperature with a first acid solution exhibi... | 12/24/2002 |
| 6495450 | Isolation using an antireflective coating A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed ... | 12/17/2002 |
| 6495477 | Method for forming a nitridized interface on a semiconductor substrate A surface treatment method for forming a fluorine-doped nitridized interface on a semiconductor substrate. The fluorine-doped nitridized interface may be formed using an ammonia plasma CVD process having a treatment gas doped with a fluorine component, su... | 12/17/2002 |
| 6489661 | Method of manufacturing semiconductor device and semiconductor device When an element isolation film is formed by the LOCOS technique, as an underlying buffer layer of an oxidation resisting film, a pad oxidation film and pad poly-Si film are used. When an element is formed, they are used as a gate oxide film and a part of ... | 12/03/2002 |
| 6479370 | Isolated structure and method of fabricating such a structure on a substrate A method of forming an isolated structure of sufficient size to permit the fabrication of an active device thereon is comprised of the steps of depositing a gate oxide layer on a substrate. Material, such as a polysilicon layer and a nitride layer, is dep... | 11/12/2002 |
| 6468099 | Semiconductor device fabricating method A method of fabricating a semiconductor device applies a LOCOS profile characteristic to an edge portion of an STI in a HV region to thereby lower compressive stress that is concentrated on the side of the STI. A field oxide film is formed so that only ed... | 10/22/2002 |
| 6465326 | Methods of forming field oxide and active area regions on a semiconductor substrate Methods of forming a field oxide region and an adjacent active area region are described. A semiconductive substrate is masked with an oxidation mask while an adjacent area of the substrate remains unmasked. The substrate is exposed to conditions effectiv... | 10/15/2002 |
| 6462385 | Semiconductor memory device with latch-up suppression A semiconductor memory device has a semiconductor substrate, a peripheral circuit region and a memory cell region on the principal surface of the semiconductor substrate. The semiconductor memory device has a first well formed in the peripheral circuit re... | 10/08/2002 |
| 6461985 | Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers In one aspect, the invention includes a method of semiconductive wafer processing comprising forming a silicon nitride layer over a surface of a semiconductive wafer, the silicon nitride layer comprising at least two portions, one of said at least two por... | 10/08/2002 |
| 6448157 | Fabrication process for a semiconductor device A surface of a substrate is oxidized at a temperature equal to or higher than 1050° C., or at a oxidation speed equal to or higher than 7.5 nm/min to form an oxide film with a thickness equal to or more than 1500 nm. when the oxide film is removed, a den... | 09/10/2002 |
| 6440818 | Method of reducing leakage current of a semiconductor wafer A semiconductor wafer includes a silicon substrate, an active area positioned on the silicon substrate, and a field oxide layer positioned on the surface of the silicon substrate surrounding the active area. The present invention forms a doped area in the... | 08/27/2002 |
| 6437416 | Semiconductor structure having a planar junction termination with high breakdown voltage and low parasitic capacitance The breakdown voltage of a semiconductor device, such as a transistor fabricated in a device region in and abutting the surface of a semiconductor body with a field oxide surrounding the device region, is improved by etching the field oxide abutting the d... | 08/20/2002 |
| 6432799 | Method of manufacturing semiconductor integrated circuit device A method of manufacturing a semiconductor integrated circuit device according to this invention, comprises a step of forming in a semiconductor substrate a deep groove for trench isolation with an aspect ratio of greater than 1, a step of burying a first ... | 08/13/2002 |
| 6429151 | Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers In one aspect, the invention includes a method of semiconductive wafer processing comprising forming a silicon nitride layer over a surface of a semiconductive wafer, the silicon nitride layer comprising at least two portions, one of said at least two por... | 08/06/2002 |
| 6423631 | Isolation using an antireflective coating A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed ... | 07/23/2002 |
| 6420771 | Trench isolated bipolar transistor structure integrated with CMOS technology A bipolar transistor is vertically isolated from underlying silicon by an isolation layer of conductivity type opposite that of the collector. This isolation layer lies beneath the heavily doped buried layer portion of the collector, and is formed either ... | 07/16/2002 |
