Class 257/E21.503 - Encapsulation of active face of flip chip device, e.g., under filling or under encapsulation of flip-chip, encapsulation perform on chip or mounting substrate (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.502. This subclass
No. of patents: 930
Last issue date: 10/18/2011

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Number	Title	Issue Date
8040148	System in package with built-in test-facilitating circuit This invention relates to a system in package including a plurality of integrated circuit chips and a substrate on which the plurality of integrated circuit chips are mounted and characterized in that a testability circuit for facilitating a test on at least one of ...	10/18/2011
7422914	Fabrication method of semiconductor integrated circuit device A memory test is carried out on semiconductor integrated circuit devices including a semiconductor memory at low cost with efficiency. In a test burn-in system, twenty-four test boards are processed in sequence with time differences, and the test boards are circulat...	09/09/2008
7419852	Low temperature methods of forming back side redistribution layers in association with through wafer interconnects, semiconductor devices including same, and assemblies Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be...	09/02/2008
7420129	Semiconductor package including a semiconductor device, and method of manufacturing the same A method and apparatus of manufacturing a semiconductor device and the semiconductor device used in a semiconductor package are disclosed. The semiconductor device may include a main body having one or more supporting layers, a plurality of metal wires that may be f...	09/02/2008
7419851	Method of making a semiconductor chip assembly with a metal containment wall and a solder terminal A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a metal containment wall and a solder layer in which the metal containment wall includes a cavity and the solder terminal contacts the metal containment wall in the cav...	09/02/2008
7413935	Semiconductor device and method of fabricating the same A method of fabricating a semiconductor device includes hardening resin at a temperature that is less than or equal to the boiling point of the resin and until the hardening reaction ratio of the resin has reached at least 80%, the resin being disposed between a wir...	08/19/2008
7402459	Quad flat no-lead (QFN) chip package assembly apparatus and method In one embodiment the present invention includes a method of fabricating a quad flat no-lead (QFN) chip package. The method includes forming a stamped lead frame; forming a die pad and a lead shrink on one side of the stamped lead frame; mounting a die on the die pa...	07/22/2008
7397132	Semiconductor device Disclosed is a semiconductor device including an organic material substrate, a semiconductor chip flip chip connected to substantially a center of one surface of the organic material substrate, and a semiconductor package mounted on another surface of the organic ma...	07/08/2008
7393718	Unmolded package for a semiconductor device A semiconductor device that does not include a molded body or package. The semiconductor device includes a substrate and a die coupled to the substrate. The die is coupled to the substrate such that the source and gate regions of the die, assuming a MOSFET-type devi...	07/01/2008
7393712	Fluidic MEMS device A method of manufacturing a fluidic MEMS package includes attaching a cover plate with a plurality of openings to a substrate with a plurality of bond rings with breaches such that the cover plate, the substrate and the bond rings define a plurality of respective in...	07/01/2008
7390688	Semiconductor device and manufacturing method thereof A semiconductor device includes a semiconductor substrate which has an integrated circuit formed on a front surface thereof, and a rough surface with a height difference of 1 to 5 μm on a rear surface thereof. A protective film is provided on the rear surface of th...	06/24/2008
7388294	Semiconductor components having stacked dice A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as a...	06/17/2008
7381997	Lateral silicided diodes A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the...	06/03/2008
7365438	Semiconductor device with semiconductor components connected to one another The present invention relates to a semiconductor device which provides a shortest possible connection between two semiconductor components 10a and 10b arranged in a manner lying opposite on a substrate 2. The two semiconductor comp...	04/29/2008
7364944	Method for fabricating thermally enhanced semiconductor package A thermally enhanced semiconductor package and a fabrication method thereof are provided. A plurality of conductive bumps are formed on bond pads on an active surface of a chip. A heat sink is attached to an inactive surface of the chip and has a surface area larger...	04/29/2008
7358119	Thin array plastic package without die attach pad and process for fabricating the same A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contact pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over ...	04/15/2008
7344938	Method of fabricating memory A method of fabricating a memory device is described. During the process of forming the memory cell area and the periphery area of a semiconductor device a photoresist layer is formed on the memory cell area before the spacers are formed on the sidewalls of the gate...	03/18/2008
7338853	High power radio frequency integrated circuit capable of impeding parasitic current loss A high power RF IC capable of impeding parasitic current loss and method of manufacturing the same. First a step of semiconductor front-side processing for the high power RF components that includes inductive components is performed. Afterwards, the backside of semi...	03/04/2008
7335532	Method of assembly for multi-flip chip on lead frame on overmolded IC package A multichip module package uses bond wire with plastic resin on one side of a lead frame to package an integrated circuit and flip chip techniques to attach one or more mosfets to the other side of the lead frame. The assembled multichip module 30 has an inte...	02/26/2008
7317322	Interconnect for bumped semiconductor components An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped contacts on the components. Each contact includes a recess and a pattern of leads cantilevered over the r...	01/08/2008
7314779	Semiconductor device, manufacturing method for semiconductor device and mounting method for the same A semiconductor device in accordance with the present invention reduces cracks occurring in a junction between a semiconductor device and a mounting substrate due to a heat stress when the semiconductor device is mounted on a printed circuit board or the like. The s...	01/01/2008
7314778	Wafer-level processing of chip-packaging compositions including bis-maleimides A process of packaging a microelectronic chip includes wafer-level application of a chip-packaging composition that includes a polymer of a bis-maleimide. A process includes wafer-level addition of the chip-packaging compositions that include adding particulate fill...	01/01/2008
7306976	Technique for enhancing thermal and mechanical characteristics of an underfill material of a substrate/die assembly During the formation of an underfill material provided between a carrier substrate and a semiconductor chip, a common motion of particles contained in the underfill material is initiated towards the semiconductor chip, thereby adjusting the thermal and mechanical be...	12/11/2007
7306971	Semiconductor chip packaging method with individually placed film adhesive pieces Individual pieces of film adhesive (42) are placed on a support surface (46). Diced semiconductor chips (24) are individually placed on the individual pieces of the film adhesive thereby securing the diced semiconductor chips to the support surf...	12/11/2007
7304391	Modified chip attach process and apparatus A method of packaging a die includes reflowing the solder to electrically connect the die to a substrate at a first temperature, cooling the die and substrate to a second temperature, and placing a heated epoxy in contact with the die and the substrate. The method a...	12/04/2007
7294533	Mold compound cap in a flip chip multi-matrix array package and process of making same A molding compound cap structure is disclosed. A process of forming the molding compound cap structure is also disclosed. A microelectronic package is also disclosed that uses the molding compound cap structure. A method of assembling a microelectronic package is al...	11/13/2007
7291900	Lead frame-based semiconductor device packages incorporating at least one land grid array package A lead frame-based semiconductor device package including at least one land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the semiconductor die connected to terminal pads on the same side of the interpose...	11/06/2007
7288435	Method for producing a cover, method for producing a packaged device In a method for producing a cover for a region of a substrate, first a frame structure is produced in the region of the substrate, and then a cap structure is attached to the frame structure so that the region under the cap structure is covered. Thus, sensitive devi...	10/30/2007
7285443	Stacked semiconductor module The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically co...	10/23/2007
7279407	Selective nickel plating of aluminum, copper, and tungsten structures A method of selectively plating nickel on an intermediate semiconductor device structure. The method comprises providing an intermediate semiconductor device structure having at least one aluminum or copper structure and at least one tungsten structure. One of the a...	10/09/2007
7276401	Adhesion by plasma conditioning of semiconductor chip surfaces A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method c...	10/02/2007
7271494	Adhesion by plasma conditioning of semiconductor chip surfaces A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method c...	09/18/2007
7271495	Chip bond layout for chip carrier for flip chip applications A chip carrier for flip chip applications, according to the present invention, provides peripheral bumps and inner bumps. The inputs and outputs related to the inner bumps are routed out on an additional wiring layer by means of vias. The proposed bond layout provid...	09/18/2007
7262507	Semiconductor-mounted device and method for producing same Semiconductor-mounted device comprises wired board, first semiconductor chip mounted on first side of wired board, second semiconductor chip mounted on second side of wired board and sealing resin sealing, with a same height, a region disposed at and around first se...	08/28/2007
7262077	Capillary underfill and mold encapsulation method and apparatus A method of packaging a die includes attaching the die to a substrate; underfilling the space between the die and the substrate with a first material, and placing a second material in contact with at least a portion of the die and the substrate after underfilling th...	08/28/2007
7263707	Information processing medium and information processing apparatus using the same An information processing medium includes a substrate, a single layered or multilayered thin film layer formed on the substrate, and a thin protective film formed to cover at least one surface of the thin film layer. The thin protective film is mainly comprised of a...	08/28/2007
7259449	Method and system for sealing a substrate A method of sealing a microelectromechanical system (MEMS) device from ambient conditions is described, wherein the MEMS device is formed on a substrate and a substantially hermetic seal is formed as part of the MEMS device manufacturing process. The method comprise...	08/21/2007
7245022	Semiconductor module with improved interposer structure and method for forming the same Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an elastomeric, compliant material that includes metallurgic through connections ...	07/17/2007
7241675	Attachment of integrated circuit structures and other substrates to substrates with vias Vias (210, 210B) are formed in a surface of a substrate. At least portions of contact pads (139, 350) are located in the vias. Contact pads (150, 340) of an integrated circuit structure are inserted into the vias and attached to the contact pads...	07/10/2007
7239024	Semiconductor package with recess for die A semiconductor package is disclosed with a recess (51) for an integrated circuit die (52). The recess is made by bending or deforming all layers of a package substrate, and therefore the recess contains circuitry to connect to the integrated circuit d...	07/03/2007

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Class 257/E21.503 - Encapsulation of active face of flip chip device, e.g., under filling or under encapsulation of flip-chip, encapsulation perform on chip or mounting substrate (EPO)