Class 257/E21.499 - Assembling semiconductor devices, e.g., packaging , including mounting, encapsulating, or treatment of packaged semiconductor (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.04. This subclass
No. of patents: 416
Last issue date: 08/23/2011

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Number	Title	Issue Date
8002436	LED chip package structure using a substrate as a lampshade and method for making the same An LED chip package structure using a substrate as a lampshade includes a substrate unit and a light-emitting unit. The substrate unit has a substrate body with a lampshade shape. The light-emitting unit has a plurality of light-emitting elements electrically dispos...	08/23/2011
7442564	Dispensed electrical interconnections An electronic device includes a substrate, an electrical element on the substrate, a nonconductive adhesive material on the substrate, and a conductive adhesive material on the electrical element and extending onto the nonconductive adhesive material. Methods of for...	10/28/2008
7442576	Placement of absorbing material in a semiconductor device A semiconductor device is provided that includes a hermetically sealed housing having a top member and a bottom member. A semiconductor die is enclosed within the housing and absorbing material is positioned under the semiconductor die. ...	10/28/2008
7439097	Taped lead frames and methods of making and using the same in semiconductor packaging The invention provides a taped lead frame for use in manufacturing electronic packages. The taped lead frame is composed of a tape and a lead frame formed from a plurality of individual metal features attached to the tape and arranged in a footprint pattern. The met...	10/21/2008
7436061	Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device A semiconductor device includes a first semiconductor package, in which a first semiconductor chip is mounted and a second semiconductor package, in which a second semiconductor chip is mounted and which is supported above the first semiconductor package so as to ex...	10/14/2008
7435623	Integrated micro channels and manifold/plenum using separate silicon or low-cost polycrystalline silicon A method and apparatus for cooling an electronics chip with a cooling plate having integrated micro channels and manifold/plenum made in separate single-crystal silicon or low-cost polycrystalline silicon. Forming the microchannels in the cooling plate is more econo...	10/14/2008
7432601	Semiconductor package and fabrication process thereof A semiconductor package mainly includes a chip, a substrate, an encapsulant, a plurality of external terminals and a stress release layer. The substrate has an upper surface and a lower surface. The chip is disposed on the upper surface of the substrate by a chip-at...	10/07/2008
7429498	Integrated circuitry and method for manufacturing the same The integrated circuitry on a semiconductor substrate includes an integrated circuit arranged in a circuit area of the semiconductor substrate and a stress-sensitive structure on the semiconductor substrate for detecting a mechanical stress component in the semicond...	09/30/2008
7427532	Method of manufacturing a device having a contacting structure According to the invention, a layer made of an electrically insulating material is applied to a substrate and a component that is arranged thereupon in such way that said layer follows the surface contour formed by the substrate and the component. ...	09/23/2008
7422929	Wafer-level packaging of optoelectronic devices In an embodiment, the invention provides a method for forming a wafer-level package. A bonding pad is formed on a first wafer. After forming the bonding pad, an optoelectronic device is located on the first wafer. A gasket is formed on a second wafer. After a gasket...	09/09/2008
7419885	Method for cutting a wafer using a protection sheet The method for dicing a wafer including the steps of: reducing a thickness of a wafer to at least 0.1mm or less; forming a protection sheet tightly on one side of the wafer, the protection sheet having a Vickers hardness of 2 or more; and dicing the wafer by a grind...	09/02/2008
7416920	Semiconductor device protective structure and method for fabricating the same The present invention provides a semiconductor device protective structure. The structure comprises a die with contact metal balls formed thereon electrically coupling with a print circuit board. A back surface of the die is directly adhered on a substrate and a fir...	08/26/2008
7410825	Metal and electronically conductive polymer transfer The invention relates to a donor laminate comprising in order, a substrate, an electronically conductive polymer layer in contact with said substrate, and a metal layer. ...	08/12/2008
7410835	Method for fabricating semiconductor package with short-prevented lead frame A short-prevented lead frame and a method for fabricating a semiconductor package with the lead frame are proposed, wherein each lead of the lead frame is formed with a thickness-reduced portion at a peripheral position of the lead frame, allowing thickness-reduced ...	08/12/2008
7410832	Semiconductor chip package having an adhesive tape attached on bonding wires The invention provides a semiconductor chip package, and a means of forming such a semiconductor chip package, in which one or more semiconductor chips are electrically connected to a mounting substrate by wire bonding in which an adhesive tape is provided on the ac...	08/12/2008
7407825	Optical microsystem and method for making same The invention relates to the fabrication of optical microsystems for miniature cameras or miniature matrix displays. It is proposed that N dot matrix arrays and associated circuits should be collectively fabricated, on the front of a semiconductor wafer, to produce ...	08/05/2008
7405144	Method for manufacturing probe card A method for manufacturing a probe card is provided. A first inactive layer, a first patterned photoresist layer and a first metal layer are sequentially formed on a substrate. The first metal layer has first through holes exposing a portion of the first patterned p...	07/29/2008
7405103	Process for fabricating chip embedded package structure A process for fabricating a chip embedded package structure is provided. A stiffener is disposed on a tape. A chip is disposed on the tape inside a chip opening of the stiffener such that an active surface of the chip faces the tape. Through holes are formed passing...	07/29/2008
7402459	Quad flat no-lead (QFN) chip package assembly apparatus and method In one embodiment the present invention includes a method of fabricating a quad flat no-lead (QFN) chip package. The method includes forming a stamped lead frame; forming a die pad and a lead shrink on one side of the stamped lead frame; mounting a die on the die pa...	07/22/2008
7402901	Semiconductor device and method of manufacturing semiconductor device The present invention provides a semiconductor device that is inexpensive and can suppress signal transmission delay, and a manufacturing method thereof. The semiconductor device includes: a plurality of semiconductor chips; a semiconductor substrate that has, on th...	07/22/2008
7396702	Module assembly and method for stacked BGA packages Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid substrates. The ball grid array packages additionally comprise an arrange...	07/08/2008
7396701	Electronic device and manufacturing method of the same A technique that makes it possible to enhance the reliability of a module using PCB as its module substrate is provided. Solder connection of a single-chip component 43, an integrated chip component 44, and a semiconductor chip IC2 by Pb-free so...	07/08/2008
7396739	Method for integrating an electronic component or similar into a substrate A method for integrating an electronic component or the like into a substrate includes following process steps: formation of a dielectric insulating layer on the front side of a substrate; complete back-etching of an area of the substrate from the back of the substr...	07/08/2008
7390700	Packaged system of semiconductor chips having a semiconductor interposer A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215	06/24/2008
7387913	3D optoelectronic micro system A 3D micro optical switching system (3D-MOSS) is fabricated by dividing an optical switching system into several blocks, creating optoelectronic layers where optical switches or tunable filters in each block are disposed, laminating the optoelectronic layers by conn...	06/17/2008
7387914	Semiconductor device and process for fabrication thereof A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not m...	06/17/2008
7381592	Method of making a semiconductor device with improved heat dissipation A method of making a heat dissipation member comprising the steps of forming a resist on a substrate, removing a portion or portions of said resist formed on the substrate in places where posts are to be formed, forming the posts on the substrate in said places wher...	06/03/2008
7378287	Wafer matching methods for use in assembling micromirror array devices The invention provides a method for matching micromirror wafers and electrode wafers so as to form micromirror array devices while the production yield is maximized. Each micromirror wafer and/or electrode wafer may have one or more non-passing dies and a plurality ...	05/27/2008
7374967	Multi-stack chip size packaging method In multi-stack chip size packaging a plurality chips, a first chip is electrically interconnected on a top surface of a substrate using a bump. Next, an epoxy is coated on the first chip and is stacked a second chip thereon, wherein the second chip is electrically i...	05/20/2008
7371607	Method of manufacturing semiconductor device and method of manufacturing electronic device A method of manufacturing a semiconductor device includes mounting a first semiconductor chip on each partitioned region of a frame substrate partitioned for each first semiconductor package; mounting a second semiconductor package, where a second semiconductor chip...	05/13/2008
7371610	Process for fabricating an integrated circuit package with reduced mold warping A process for fabricating an integrated circuit package includes mounting a semiconductor die on a first surface of a metal carrier and forming electrical connections between the semiconductor die and ones of a plurality of contacts on the metal carrier. Next, using...	05/13/2008
7371613	Semiconductor device and method of manufacturing the same A semiconductor device manufacturing method capable of improving the semiconductor device manufacturing yield is disclosed. Semiconductor chips are mounted respectively over semiconductor device regions of a matrix wiring substrate having plural semiconductor device...	05/13/2008
7361532	Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes: preparing a semiconductor wafer; forming a conductive portion by forming holes in an active surface, forming an insulating film, and embedding a conductive material; forming a first groove; bonding the semic...	04/22/2008
7361533	Stacked embedded leadframe A method of forming a stackable embedded leadframe package includes coupling an electronic component having bond pads to a substrate; coupling on the substrate a leadframe having a plurality of leads, each lead having a lower mounting portion; encapsulating the elec...	04/22/2008
7358178	Semiconductor substrates including I/O redistribution using wire bonds and anisotropically conductive film, methods of fabrication and assemblies including same Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An anisotropically conductive (z-axis) conductive layer in the form of a film o...	04/15/2008
7354804	Method for fabricating lead frame and method of fabricating semiconductor device using the same A method of fabricating a lead frame for a semiconductor device. The lead frame has a lead electrically connected to a semiconductor chip within sealing resin and sealed into the sealing resin such that at least a part of its lower surface is exposed from a lower su...	04/08/2008
7351608	Method of precisely aligning components in flexible integrated circuit module The present invention is a method of aligning components on a flexible integrated circuit. First a rigid substrate is selected. Next a flexible interconnect is deposited on the substrate, the interconnect preferably consisting of alternating polyimide and metal laye...	04/01/2008
7348210	Post bump passivation for soft error protection A structure and a method for forming the same. The method includes (a) providing a structure which includes (i) a dielectric layer, (ii) an electrically conducting bond pad on and in direct physical contact with the dielectric layer top surface, (iii) a first passiv...	03/25/2008
7348219	Method of mounting memory device on PCB for memory module A memory module and a method of mounting memory devices on a PCB to form the memory module substantially reduce unnecessary routing space and improve signal attenuation characteristics. In the method of mounting and sequentially connecting at least two memory device...	03/25/2008
7348212	Interconnects for semiconductor light emitting devices A semiconductor light emitting device including a light emitting layer disposed between an n-type region and a p-type region and contacts electrically connected to the n-type region and the p-type region is connected to a mount. A metal layer arbitrarily patterned t...	03/25/2008

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Class 257/E21.499 - Assembling semiconductor devices, e.g., packaging , including mounting, encapsulating, or treatment of packaged semiconductor (EPO)