Class 257/E21.476 - Manufacture of electrodes on semiconductor bodies using processes or apparatus other than epitaxial growth, e.g., coating, diffusion, or alloying, or radiation treatment (EPO)

Subclass of Class 257 - Active solid-state devices (e.g., transistors, solid-state diodes)
Definition: This subclass is indented under subclass E21.459. This subclass
No. of patents: 22
Last issue date: 10/21/2008

Number	Title	Issue Date
7439198	Method for fabricating a buried metallic layer in a semiconductor body and semiconductor component having a buried metallic layer A method for fabricating a buried metallic layer at a predetermined vertical position in a semiconductor body having a first and second side includes a step of applying a metal layer to one of the first and second sides at least in sections. The method also includes...	10/21/2008
7439170	Design structure for final via designs for chip stress reduction A design structure to provide a package for a semiconductor chip that minimizes the stresses and strains that arise from differential thermal expansion in chip to substrate or chip to card interconnections. An improved set of design structure vias above the final co...	10/21/2008
7416976	Method of forming contacts using auxiliary structures A semiconductor product includes a substrate having a substrate surface. A plurality of wordlines are arranged at a distance from one another and running along a first direction. A plurality of conductive contact structures are provided between the wordlines. The pr...	08/26/2008
7413971	Method of producing a layered arrangement and layered arrangement An arrangement and process for producing a circuit arrangement is disclosed. The process includes having a layer arrangement, in which two electrically conductive interconnects running substantially parallel to one another are formed on a substrate. At least one aux...	08/19/2008
7407888	Semiconductor device and a fabrication process thereof A method of fabricating a semiconductor device comprises the steps of forming a contact hole in an insulation film so as to extend therethrough and so as to expose a conductor body at a bottom part of the contact hole, forming a barrier metal film of tungsten nitrid...	08/05/2008
7405154	Structure and method of forming electrodeposited contacts A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the diel...	07/29/2008
7405156	Method of forming wiring pattern A photoresist pattern is formed on an insulating substrate so that it has a reverse tapered cross section and a reverse pattern of a wiring pattern to be formed. Next, a nanoparticles-containing ink is injected on a wiring region using an inkjet system, followed by ...	07/29/2008
7381634	Integrated circuit system for bonding An integrated circuit system provides a precursor for an integrated wire bond and flip chip structure. The precursor has a plurality of contact pads thereon. A layer of titanium is deposited on the precursor. A layer of nickel-vanadium is deposited on the layer of t...	06/03/2008
7358175	Serial thermal processor arrangement A serial thermal processing arrangement for treating a wafer of semiconductor material, the steps including: loading the wafer into a chamber at an initial station and purging the chamber with nitrogen gas; introducing formic acid vapor and nitrogen and heating the ...	04/15/2008
7338889	Method of improving copper interconnects of semiconductor devices for bonding An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond is described whe...	03/04/2008
7335596	Method for fabricating copper-based interconnections for semiconductor device Cu-based interconnections are fabricated in a semiconductor device by depositing a thin film of Cu or Cu alloy on a dielectric film by sputtering, the dielectric film having trenches and/or via holes at least one groove and being arranged on or above a substrate, an...	02/26/2008
7291558	Copper interconnect wiring and method of forming thereof Capping layer or layers on a surface of a copper interconnect wiring layer for use in interconnect structures for integrated circuits and methods of forming improved integration interconnection structures for integrated circuits by the application of gas-cluster ion...	11/06/2007
7232773	Liquid drop jetting apparatus using charged beam and method for manufacturing a pattern using the apparatus The invention drastically improves the accuracy of adhesion position of a liquid drop discharged by a liquid drop discharge method and makes it possible to form a fine and highly accurate pattern directly on a substrate. Therefore, one object of the invention is to ...	06/19/2007
7138335	Method of forming electrode for flat display panel A reducing agent is discharged by an ink-jet method into a groove between partition walls of a glass substrate formed by sandblasting, that is, a desired region where an electrode is to be formed. After fixing the reducing agent to the glass substrate, the entire su...	11/21/2006
5783459	Method for fabricating a semiconductor device A metal wiring is fabricated for a semiconductor device by fabricating an metal layer made of, a aluminum alloy on a semiconductor substrate through an insulation layer and an undercoating layer for the metal layer, optically patterning a resist layer for...	07/21/1998
5767536	II-VI group compound semiconductor device A II-VI group compound semiconductor device comprising a ZnX Mg1-X SY Se1-Y (0ࣘXࣘ1, 0ࣘYࣘ1) semiconductor layer, an intermediate layer comprising a compound of an element constituting the semiconductor la...	06/16/1998
5610413	Group II-VI compound semiconductor light emitting devices and an ohmic contact therefor Group II-VI compound semiconductor light emitting devices which include at least one II-VI quantum well region of a well layer disposed between first and second barrier layers is disclosed. The quantum well region is sandwiched between first and second cl...	03/11/1997
4801990	HgCdTe avalanche photodiode An HgCdTe avalanche photodiode for use at ambient temperature comprises an Hg1-x Cdx Te crystal substrate in which x is chosen between substantially 0.35 and substantially 0.5, a PN junction is formed in the substrate with low concen...	01/31/1989
4734381	Method of making a thin film cadmium telluride solar cell A phosphorous doped layer of cadmium telluride is deposited onto a conductive window layer to form a thin film cadmium telluride solar cell. Back contacts to the solar cell are made by first depositing a layer of p conductivity type lead telluride upon th...	03/29/1988
4650921	Thin film cadmium telluride solar cell A phosphorous doped layer of cadmium telluride is deposited onto a conductive window layer to form a thin film cadmium telluride solar cell. Back contacts to the solar cell are made by first depositing a layer of p conductivity type lead telluride upon th...	03/17/1987
4614957	Electromagnetic radiation detectors An improved electromagnetic radiation-sensitive semiconductor device together with a method of making same is disclosed in which surface regions directly beneath the active portion of the electrical contacts are provided with a layer of semiconductor mate...	09/30/1986
4404731	Method of forming a thin film transistor In the formation of a thin film device, integrity of the semiconductor-insulator and semiconductor-conductor interfaces is preserved by depositing layers of insulator, semiconductor, and conductor in successive sequence under continuous vacuum. In a prefe...	09/20/1983

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Class 257/E21.476 - Manufacture of electrodes on semiconductor bodies using processes or apparatus other than epitaxial growth, e.g., coating, diffusion, or alloying, or radiation treatment (EPO)