Quotables
"What, sir, would you make a ship sail against the wind and currents by lighting a bonfire under her deck? I pray you, excuse me, I have not the time to listen to such nonsense."
Napoleon Bonaparte ; When told of the Robert Fulton steamboat
PatentStorm News
Make the Most of Our Site
See this month's Top Inventors and Most Cited Patents.
Stay on top of the latest innovations by subscribing to an RSS feed.
Registered users: Manage your profile.
| Number | Title | Issue Date |
| 7442600 | Methods of forming threshold voltage implant regions The invention includes methods of forming channel region implants for two transistor devices simultaneously, in which a mask is utilized to block a larger percentage of a channel region location of one of the devices relative to the other. The invention also pertain... | 10/28/2008 |
| 7396745 | Formation of ultra-shallow junctions by gas-cluster ion irradiation Method of forming one or more doped regions in a semiconductor substrate and semiconductor junctions formed thereby, using gas cluster ion beams. ... | 07/08/2008 |
| 7262119 | Method for incorporating germanium into a semiconductor wafer A method of fabricating a semiconductor wafer includes fabricating a gate electrode on a silicon substrate of the semiconductor device and incorporating germanium into the silicon substrate thereafter. ... | 08/28/2007 |
| 7192853 | Method of improving the breakdown voltage of a diffused semiconductor junction A method is provided for forming a graded junction in a semiconductor material having a first conductivity type. Dopant having a second conductivity type opposite the first conductivity type is introduced into a selected region of the semiconductor material to defin... | 03/20/2007 |
| 5252499 | Wide band-gap semiconductors having low bipolar resistivity and method of formation A wide band-gap semiconductor, such as a II-VI semiconductor having low bipolar resistivity and a method for producing such a semiconductor. To form this semiconductor, atomic hydrogen is used to neutralize compensating contaminants. Alternatively, the se... | 10/12/1993 |
| 5227328 | Method of producing epitaxial layers of II-VI semiconductors with high acceptor concentrations Epitaxial layers of II-VI semiconductors in-situ doped with high concentrations of a stable acceptor-type impurity and capped with a diffusion-limiting layer, when subjected to a rapid thermal anneal at a temperature between 700 and 950 degrees C., exhibi... | 07/13/1993 |
| 5024967 | Doping procedures for semiconductor devices A process is described for making semiconductor devices with highly controlled doping profiles. The process involves minimizing or eliminating segregation effects caused by surface electric fields created by Fermi-level pinning. These electric fields act ... | 06/18/1991 |
| 4904618 | Process for doping crystals of wide band gap semiconductors Non-equilibrium impurity incorporation is used to dope hard-to-dope crystals of wide band gap semiconductors, such as zinc selenide and zinc telluride. This involves incorporating into the crystal a compensating pair of primary and secondary dopants, ther... | 02/27/1990 |
| 4105472 | Preparation of silicon doped mercury cadmium telluride Mercury cadmium telluride is described having a quantity of a silicon dispersed therein in an amount to measurably increase the donor concentration of the mercury cadmium telluride. Silicon has been found to substitute for metal, either mercury or cadmium... | 08/08/1978 |
| 4087293 | Silicon as donor dopant in Hg1-x Cdx Te Mercury cadmium telluride is described having a quantity of a silicon dispersed therein in an amount to measurably increase the donor concentration of the mercury cadmium telluride. Silicon has been found to substitute for metal, either mercury or cadmium... | 05/02/1978 |
| 4053350 | Methods of defining regions of crystalline material of the group III-V compounds A thin coating of carbon is used as a mask to define regions of a crystalline material of the group III-V compounds. A carbon mask is coated on portions of a surface of a substrate and the masked substrate contacted with the group III-V material to deposi... | 10/11/1977 |
| 4038110 | Planarization of integrated circuit surfaces through selective photoresist masking An integrated circuit substrate surface, particularly a surface of electrically insulative material, having a pattern of elevated areas and a complementary pattern of unelevated areas is planarized by forming the photoresist pattern in registration with t... | 07/26/1977 |
