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| Number | Title | Issue Date |
| 7442612 | Nitride-encapsulated FET (NNCFET) A double-gate field effect transistor (DGFET) structure and method of forming such a structure in which the parasitic capacitance under the source/drain regions is substantially reduced are provided. In the present invention, self-aligned isolation regions are provi... | 10/28/2008 |
| 7439574 | Silicon/oxide/nitride/silicon nonvolatile memory with vertical channels Provided are a silicon/oxide/nitride/oxide/silicon (SONOS) memory, a fabricating method thereof, and a memory programming method. The SONOS memory includes a substrate; a first insulating layer stacked on the substrate; a semiconductor layer, which is patterned on t... | 10/21/2008 |
| 7432593 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 10/07/2008 |
| 7425484 | Method of manufacturing semiconductor device A method of manufacturing a semiconductor device includes forming on a semiconductor substrate, a plurality of multi-layered structures each including a first semiconductor layer and a second semiconductor layer that is deposited over the first semiconductor layer a... | 09/16/2008 |
| 7414299 | Semiconductor package assembly and method for electrically isolating modules A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394. ... | 08/19/2008 |
| 7393724 | Reduced dielectric breakdown/leakage semiconductor device and a method of manufacturing the same, integrated circuit, electro-optical device, and electric apparatus Aspects of the invention provide a method, in a semiconductor device, such as a thin film transistor, a technology capable of preventing or reducing the electric field concentration at the edge section of the semiconductor film to enhance the reliability. The method... | 07/01/2008 |
| 7388257 | Multi-gate device with high k dielectric for channel top surface A multi-gate device has a high-k dielectric layer for a top channel of the gate and a protective layer for use in a finFET device. The high-k dielectric layer is placed on the top surface of the channel of the finFET and may reduce or eliminate silicon consumption i... | 06/17/2008 |
| 7384851 | Buried stress isolation for high-performance CMOS technology A field effect transistor (FET) comprises a substrate; a buried oxide (BOX) layer over the substrate; a current channel region over the BOX layer; source/drain regions adjacent to the current channel region; a buried high-stress film in the BOX layer and regions of ... | 06/10/2008 |
| 7378692 | Integrated electronic circuit comprising superposed components An integrated electronic circuit with at least at least one passive electronic component and at least one active electronic component. The passive electronic component is formed within an insulating material disposed on a substrate. The active component is formed wi... | 05/27/2008 |
| 7374986 | Method of fabricating field effect transistor (FET) having wire channels In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, t... | 05/20/2008 |
| 7361534 | Method for fabricating SOI device A method is provided for fabricating a semiconductor on insulator (SOI) device. The method includes, in one embodiment, providing a monocrystalline silicon substrate having a monocrystalline silicon layer overlying the substrate and separated therefrom by a dielectr... | 04/22/2008 |
| 7339236 | Semiconductor device, driver circuit and manufacturing method of semiconductor device The present invention provides a semiconductor technology capable of suppressing an increase in threshold voltage of a transistor and, also, improving a withstand voltage between a source region and a drain region. Source and drain regions of a p channel type MOS tr... | 03/04/2008 |
| 7309637 | Method to enhance device performance with selective stress relief A structure and method of fabrication of a semiconductor device having a stress relief layer under a stress layer in one region of a substrate. In a first example, a stress relief layer is formed over a first region of the substrate (e.g., PFET region) and not over ... | 12/18/2007 |
| 7288480 | Thin film integrated circuit and method for manufacturing the same, CPU, memory, electronic card and electronic device A salicide process is conducted to a thin film integrated circuit without worrying about damages to a glass substrate, and thus, high-speed operation of a circuit can be achieved. A base metal film, an oxide and a base insulating film are formed over a glass substra... | 10/30/2007 |
| 7259049 | Self-aligned isolation double-gate FET A double-gate field effect transistor (DGFET) structure and method of forming such a structure in which the parasitic capacitance under the source/drain regions is substantially reduced are provided. Two new means to reduce the parasitic capacitance under the source... | 08/21/2007 |
| 7235830 | Semiconductor device and process for manufacturing the same The present invention provides a semiconductor device comprising: a semiconductor layer (3); a gate electrode (11) formed on the semiconductor layer (3) via a gate insulation film (10); and a first insulation film (13) formed at on... | 06/26/2007 |
| 7232731 | Method for fabricating transistor of semiconductor device A method for fabricating a transistor of semiconductor is disclosed. A disclosed method comprises: forming an STI structure and a well region in a silicon substrate; forming a first dummy gate electrode including spacers and a first gate oxide layer on the well regi... | 06/19/2007 |
| 7229867 | Process for producing a field-effect transistor and transistor thus obtained A substrate supporting a portion of a semiconductor material is used to produce a field-effect transistor. A portion of a temporary material lies between the portion of semiconductor material and the substrate. A gate is formed, which comprises an upper part in rigi... | 06/12/2007 |
| 7229889 | Methods for metal plating of gate conductors and semiconductors formed thereby A method of metal plating a gate conductor on a semiconductor is provided. The method includes defining an organic polymer plating mandrel on the semiconductor, activating one or more sites of the organic polymer plating mandrel, and binding a seed layer to the one ... | 06/12/2007 |
| 7214597 | Electronic components and method of fabricating the same A method is provided for fabricating integrated electronic components. According to the method, an initial structure is produced on the surface of a first substrate. This initial structure incorporates a defined pattern formed from volumes of differentiated material... | 05/08/2007 |
| 7195962 | Ultra short channel field effect transistor and method of fabricating the same Provided is a MOSFET with an ultra short channel length and a method of fabricating the same. The ultra short channel MOSFET has a silicon wire channel region with a three-dimensional structure, and a source/drain junction formed in a silicon conductive layer formed... | 03/27/2007 |
| 7176067 | Methods of fabricating fin field effect transistors A method of forming a fin field effect transistor on a semiconductor substrate includes forming an active region in the substrate, forming an epitaxial layer on the active region, and removing a portion of the epitaxial layer to form a vertical fin on the active reg... | 02/13/2007 |
| 7157295 | Method of manufacturing liquid crystal display A conductive layer, a metal layer and a doped layer are sequentially formed on a glass substrate. A CMOS circuit region, a transistor region, a reflective region, a transmission region and a capacitor region are defined. Next, a polysilicon layer and an insulating l... | 01/02/2007 |
| 7071042 | Method of fabricating silicon integrated circuit on glass A method of fabricating a silicon integrated circuit on a glass substrate includes preparing a glass substrate; fabricating a silicon layer on the glass substrate; implanting ions into the active areas of the silicon layer; covering the silicon layer with a heat pad... | 07/04/2006 |
| 6800885 | Asymmetrical double gate or all-around gate MOSFET devices and methods for making same An asymmetric double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a first fin formed on a substrate; a second fin formed on the substrate; a first gate formed adjacent first sides of the first and second fins, the first gate being doped w... | 10/05/2004 |
| 6699758 | Semiconductor device and method for manufacturing the same The first insulating film (81) and the second insulating film (82) are so layered in this order on a SOI layer (3) as to cover a gate electrode (6) and a side wall (5) and dry-etched with different etching selection ratio (the etching rate of the second i... | 03/02/2004 |
| 6689650 | Fin field effect transistor with self-aligned gate The present invention provides a process for fabricating a metal oxide semiconductor field effect transistor (MOSFET) having a double-gate and a double-channel wherein the gate region is self-aligned to the channel regions and the source/drain diffusion j... | 02/10/2004 |
| 6686630 | Damascene double-gate MOSFET structure and its fabrication method The present invention provides a method for fabricating sub-0.05 μm double-gated MOSFET devices utilizing a damascene-gate process. The damascene-gate process provides sub-0.05 μm double-gated MOSFET devices which include a frontside poly gate electrode... | 02/03/2004 |
| 6682966 | Semiconductor device and method for producing the same A semiconductor device according to the present invention includes a semiconductor substrate; device isolation regions provided in the semiconductor substrate; a first conductivity type semiconductor layer provided between the device isolation regions; a ... | 01/27/2004 |
| 6680240 | Silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide A silicon-on-insulator (SOI) device with a strained silicon film has a substrate, and a buried oxide layer on the substrate. Silicon islands are formed on the buried oxide layer, the silicon islands being separated from each other by gaps. The buried oxid... | 01/20/2004 |
| 6677193 | Method of producing semiconductor device and its structure A method of producing a semiconductor device having an SOI transistor and a multi-layer wiring, including: preparing a silicon substrate having a front face and a back face; forming an inter-layer insulation layer on the front face of the silicon substrat... | 01/13/2004 |
| 6677646 | Method and structure of a disposable reversed spacer process for high performance recessed channel CMOS A high-performance recessed channel CMOS device including an SOI layer having a recessed channel region and adjoining extension implant regions and optional halo implant regions; and at least one gate region present atop the SOI layer and a method for fab... | 01/13/2004 |
| 6677645 | Body contact MOSFET A body contact structure utilizing an insulating structure between the body contact portion of the active area and the transistor portion of the active area is disclosed. In one embodiment, the present invention substitutes an insulator for at least a por... | 01/13/2004 |
| 6677190 | Self-aligned body contact in a semiconductor device A method of forming an electrical contact is provided. The method includes forming a gate dielectric layer adjacent a body region of a transistor structure and forming a layer of dielectric material at least partially defining a trench adjacent the body r... | 01/13/2004 |
| 6677644 | Semiconductor integrated circuit having low voltage and high voltage transistors An integrated circuit formed on a SOI substrate has a low withstand voltage MOS transistors formed in the SOI substrate and comprising source and drain regions formed in the semiconductor film of the SOI substrate, a gate insulating film formed over the s... | 01/13/2004 |
| 6674136 | Semiconductor device having driver circuit and pixel section provided over same substrate In a manufacturing method of an active matrix type liquid crystal display device, a semiconductor device having good TFT characteristics is realized. LDD regions of a driver circuit NTFT and LDD regions of a pixel section NTFT are given different impurity... | 01/06/2004 |
| 6670675 | Deep trench body SOI contacts with epitaxial layer formation A silicon-on-insulation (SOI) body contact is formed within a device region of an SOI substrate so that no space of the SOI substrate is wasted for implementing a body contact. The body contact is formed by epitaxially growing silicon and depositing polys... | 12/30/2003 |
| 6667517 | Electrooptical device and electronic device An electrooptical device including a semiconductor device which is formed in a semiconductor layer on an insulating layer in such a manner that floating substrate effects which are essential in a SOI structure is suppressed without reducing the aperture r... | 12/23/2003 |
| 6664598 | Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control A method of forming a silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) device is provided. The SOI MOSFET device includes a polysilicon back-gate which controls the threshold voltage of a polysilicon-containing front-g... | 12/16/2003 |
| 6664150 | Active well schemes for SOI technology A semiconductor device fabricated on a silicon-on-insulator substrate and having an active well scheme as well as methods, including a non-self-aligned and self-aligned, of fabricating such a device are disclosed herein. The semiconductor device includes ... | 12/16/2003 |
